LM833N - STMICROELECTRONICS

August 2009 Doc ID 2169 Rev 3 1/12

LM833

Low noise dual operational amplifier

Features

■Low voltage noise: 4.5 nV/√Hz

■High gain bandwidth product: 15 MHz

■High slew rate: 7 V/µs

■Low distortion: 0.002%

■Excellent frequency stability

■ESD protection 2 kV

Applications

■Audio systems

■Preamplification, filtering

Description

The LM833 is a monolithic dual operational

amplifier particularly well-suited to audio

applications.

It offers low voltage noise (4.5 nV/√Hz) and high

frequency performances (15 MHz gain bandwidth

product, 7 V/µs slew rate).

In addition, the LM833 has a very low distortion

(0.002%) and excellent phase/gain margins.

DIP8

(Plastic package)

SO-8

(Plastic micropackage)

Output 1

Inverting input 1

Non-inverting input 1

Output 2

Inverting input 2

Non-inverting input 2

Pin connections (top view)

www.st.com

Absolute maximum ratings LM833

2/12 Doc ID 2169 Rev 3

1 Absolute maximum ratings

Table 1. Key parameters and their absolute maximum ratings

Symbol Parameter Value Unit

VCC Supply voltage ±18 or +36 V

Vid Differential input voltage(1)

1. Either or both input voltages must not exceed the magnitude of Vcc+ or Vcc-.

±30 V

ViInput voltage(1) ±15 V

Iin

Input current (2): Vin driven negative

Input current (3): Vin driven positive above

AMR value

2. This input current only exists when the voltage at any of the input leads is driven negative. It is due to the

collector-base junction of the input PNP transistor becoming forward-biased and thereby acting as input

diode clamp. In addition to this diode action, there is NPN parasitic action on the IC chip. This transistor

action can cause the output voltages of the Op-amps to go to the VCC voltage level (or to ground for a large

overdrive) for the time during which an input is driven negative.

This is not destructive and normal output is restored for input voltages above -0.3 V.

3. The junction base/substrate of the input PNP transistor polarized in reverse must be protected by a resistor

in series with the inputs to limit the input current to 400 µA max (R = (Vin - 36 V)/400 µA).

5 mA in DC or 50 mA in

AC (duty cycle = 10%,

T=1s)

0.4

Output short-circuit duration Infinite s

TjJunction temperature +150 °C

Tstg Storage temperature -65 to +150 °C

Ptot Maximum power dissipation(4)

4. Power dissipation must be considered to ensure maximum junction temperature (Tj) is not exceeded.

500 mW

ESD

HBM: human body model(5)

5. Human body model: 100 pF discharged through a 1.5 kΩ resistor between two pins of the device, done for

all couples of pin combinations with other pins floating.

2kV

MM: machine model(6)

6. Machine model: a 200 pF capacitor is charged to the specified voltage, then discharged directly between

two pins of the device with no external series resistor (internal resistor < 5 Ω), done for all couples of pin

combinations with other pins floating.

200 V

CDM: charged device model(7)

7. Charged device model: all pins plus package are charged together to the specified voltage and then

discharged directly to the ground.

1.5 kV

Table 2. Operating conditions

Symbol Parameter Value Unit

VCC Supply voltage ±2.5 to ±15 V

Toper Operating free-air temperature range -40 to 105 °C

LM833 Typical application schematics

Doc ID 2169 Rev 3 3/12

2 Typical application schematics

Figure 1. Schematic diagram (1/2 LM833)

Inverting

Input

Non-inverting

Input

Output

Electrical characteristics LM833

4/12 Doc ID 2169 Rev 3

3 Electrical characteristics

Table 3. VCC+ = +15 V, VCC- = -15 V, Tamb = 25° C (unless otherwise specified)

Symbol Parameter Min. Typ. Max. Unit

Vio Input offset voltage (Rs = 10 Ω, Vo = 0 V, Vic = 0 V) 0.3 5 mV

DVio

Input offset voltage drift

Rs = 10 Ω, Vo = 0 V, Tmin. ≤ Tamb ≤ Tmax. 2µV/°C

Iio Input offset current (Vo = 0 V, Vic = 0 V) 25 200 nA

Iib Input bias current (Vo = 0 V, Vic = 0 V) 300 1000 nA

Vicm Input common mode voltage range ±12 ±14 V

Avd Large signal voltage gain (RL = 2 kΩ, Vo = ±10 V) 90 100 dB

±Vopp

Output voltage swing (Vid = ±1 V)

RL = 2.0 kΩ

RL = 10 kΩ

13.7

-14

13.9

-14.4

-10

-12

CMR Common-mode rejection ratio (Vic = ±13 V) 80 100 dB

SVR Supply voltage rejection ratio

(VCC+/VCC- = +15 V/-15 V to +5 V/-5 V) 80 105 dB

ICC Supply current (Vo = 0 V, all amplifiers) 48 mA

SR Slew rate (Vi = -10 V to +10 V, RL = 2 kΩ, AV = +1) 57 V/µs

GBP Gain bandwidth product

(RL = 2 kΩ, CL = 100 pF, f = 100 kHz) 10 15 MHz

B Unity gain bandwidth (open loop) 9 MHz

φmPhase margin (RL = 2 kΩ)60 Degrees

enEquivalent input noise voltage (RS = 100 Ω, f = 1 kHz) 4.5

inEquivalent input noise current (f = 1 kHz) 0.5

THD Total harmonic distortion

(RL = 2 kΩ, f = 20 Hz to 20 kHz, Vo = 3 Vrms, AV = +1) 0.002 %

VO1/VO2 Channel separation (f = 20 Hz to 20 kHz) 120 dB

FPB Full power bandwidth (Vo = 27 Vpp, RL = 2 kΩ, THD ≤ 1%) 120 kHz

------------

LM833 Electrical characteristics

Doc ID 2169 Rev 3 5/12

Figure 2. Total supply current vs. supply

voltage

Figure 3. Output voltage vs. supply voltage

0.5

1.5

2.5

3.5

4.5

0 5 10 15 20 25 30

Supply Voltage (V)

Total Supply Current (mA)

-15

-10

-5

0 5 10 15

Supply Voltage (V)

Output Voltage (V)

Vid = ±1V

RL = 600Ω

Figure 4. Equivalent input noise voltage vs.

frequency

Figure 5. Output short circuit current vs.

output voltage

VCC = ±15V, G = 100

Rs = 100, Tamb = 25°C

-40

-30

-20

-10

0102030

Output Voltage (V)

Output Short Circuit Current (mA

)

VCC = 0/30V

Tamb = 25°C

Figure 6. Output voltage vs. supply voltage Figure 7. THD+ noise vs. frequency

-15

-10

-5

0 5 10 15

Supply Voltage (V)

Output Voltage (V)

Vid = ±1V

RL = 2kΩ

0.001

0.01

0.1

0.01 0.1 1 10 100

Frequency (kHz)

THD+Noise (%)

RL = 2kΩ, Vo = 3Vrms

VCC = ±15V, Av = 1

Electrical characteristics LM833

6/12 Doc ID 2169 Rev 3

Figure 8. Voltage gain and phase vs.

frequency

Figure 9. THD + noise vs. Vout

-30

-20

-10

10 100 1000 10000 100000

Frequency (kHz)

Gain (dB)

-120

-60

120

180

Phase (Deg)

RL = 2kΩ, CL = 100pF

VCC = ±15V, G = -100

phase

gain

0.001

0.010

0.100

1.000

12345678910

Vout (Vrms)

THD+Noise (%)

RL = 2kΩ, f = 1kHz

VCC = ±15V, Av = 10

LM833 Package information

Doc ID 2169 Rev 3 7/12

4 Package information

In order to meet environmental requirements, ST offers these devices in different grades of

ECOPACK® packages, depending on their level of environmental compliance. ECOPACK®

specifications, grade definitions and product status are available at: www.st.com.

ECOPACK® is an ST trademark.

Package information LM833

8/12 Doc ID 2169 Rev 3

4.1 DIP8 package information

Figure 10. DIP8 package mechanical drawing

Table 4. DIP8 package mechanical data

Ref.

Dimensions

Millimeters Inches

Min. Typ. Max. Min. Typ. Max.

A5.330.210

A1 0.38 0.015

A2 2.92 3.30 4.95 0.115 0.130 0.195

b 0.36 0.46 0.56 0.014 0.018 0.022

b2 1.14 1.52 1.78 0.045 0.060 0.070

c 0.20 0.25 0.36 0.008 0.010 0.014

D 9.02 9.27 10.16 0.355 0.365 0.400

E 7.62 7.87 8.26 0.300 0.310 0.325

E1 6.10 6.35 7.11 0.240 0.250 0.280

e 2.54 0.100

eA 7.62 0.300

eB 10.92 0.430

L 2.92 3.30 3.81 0.115 0.130 0.150

LM833 Package information

Doc ID 2169 Rev 3 9/12

4.2 SO-8 package information

Figure 11. SO-8 package mechanical drawing

Table 5. SO-8 package mechanical data

Ref.

Dimensions

Millimeters Inches

Min. Typ. Max. Min. Typ. Max.

A1.750.069

A1 0.10 0.25 0.004 0.010

A2 1.25 0.049

b 0.28 0.48 0.011 0.019

c 0.17 0.23 0.007 0.010

D 4.80 4.90 5.00 0.189 0.193 0.197

E 5.80 6.00 6.20 0.228 0.236 0.244

E1 3.80 3.90 4.00 0.150 0.154 0.157

e 1.27 0.050

h 0.25 0.50 0.010 0.020

L 0.40 1.27 0.016 0.050

L1 1.04 0.040

k 0 8° 1° 8°

ccc 0.10 0.004

Ordering information LM833

10/12 Doc ID 2169 Rev 3

5 Ordering information

Table 6. Order codes

Part number Temperature

range Package Packing Marking

LM833N -40, +105° C DIP8 Tube LM833N

LM833D/DT SO-8 Tube or tape & reel 833

LM833 Revision History

Doc ID 2169 Rev 3 11/12

6 Revision History

Table 7. Document revision history

Date Revision Changes

01-Nov-2001 1 Initial release.

01-Jul-2005 2 PPAP references inserted in the datasheet seeTable on page 1.

ESD protection inserted in Table 1 on page 2.

20-Aug-2009 3

Document reformatted.

Minor text changes.

Updated packages in Chapter 4: Package information.

Removed automotive grade versions (LM833YD/DT) from

Chapter 5: Ordering information

LM833

12/12 Doc ID 2169 Rev 3

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