LM48822 LM48822 Ground-Referenced, Ultra High PSRR, Ultra Low Noise, 35mW/Channel Stereo Headphone Amplifier with Common Mode Sense, and I 2 C Volume Control Literature Number: SNAS456B March 9, 2011 Ground-Referenced, Ultra High PSRR, Ultra Low Noise, 35mW/Channel Stereo Headphone Amplifier with Common Mode Sense, and I2C Volume Control General Description Key Specifications The LM48822 is a single supply, ground-referenced stereo headphone amplifier designed for portable devices, such as cell phones, where board space is at a premium. The LM48822 features National's ground-referenced architecture, which eliminates the large DC blocking capacitor required by traditional headphone amplifiers, saving board space and minimizing system cost. The LM48822 features common-mode sensing that corrects for any differences between the amplifier ground and the potential at the headphone return terminal, minimizing noise created by any ground mismatches. The LM48822 delivers 35mW/channel into a 16 load with <1% THD+N with a 3.6V supply. High power supply rejection ratio (PSRR), of 110dB at 217Hz, allows the device to operate in noisy environments without additional power supply conditioning. Flexible power supply requirements allow operation from 2.4V to 5.5V. The LM48822 has a differential inputs for improved noise rejection. High output impedance in Shutdown mode, combined with a charge pump-only mode allows the LM48822's outputs to be driven by an external source without degrading the source signal. Additionally, the LM48822 features a 64-step I2C volume control and mute function. The low power Shutdown mode reduces supply current consumption to 0.06A. Superior click and pop suppression eliminates audible transients on power-up/down and during shutdown. The LM48822 is available in an ultra-small 16-bump micro SMD package (2mmx2mm). Output Power/channel at VDD = 3.6V RL = 16, THD+N 1% 35mW (typ) Output Power/channel at VDD = 3.6V RL = 32, THD+N 1% 40mW (typ) Quiescent Power Supply Current at 3.6V 3.5mA (typ) PSRR at 217Hz 110dB (typ) Shutdown current 0.06A (typ) Features Ground Referenced Outputs - Eliminates Output Coupling Capacitors Common-Mode Sense Ultra-High PSRR I2C Volume and Mode Control High Output Impedance in Shutdown Differential Inputs Advanced Click-and-Pop Suppression Low Supply Current Minimum external components Micro-power shutdown Available in space-saving 16-bump SMD package Applications Mobile Phones PDAs Notebook PCs Portable Electronic Devices MP3 Players Boomer(R) is a registered trademark of National Semiconductor Corporation. (c) 2011 National Semiconductor Corporation 300610 www.national.com LM48822 Ground-Referenced, Ultra High PSRR, Ultra Low Noise, 35mW/Channel Stereo Headphone Amplifier with Common Mode Sense, and I2C Volume Control LM48822 LM48822 Typical Application 30061013 FIGURE 1. Typical Audio Amplifier Application Circuit www.national.com 2 LM48822 Connection Diagrams TL Package 2mm x 2mm x 0.8mm 30061011 Top View Order Number LM48822TL See NS Package Number TLA1611A 16-Bump micro SMD Marking 30061017 Top View XY = Date code TT = Die traceability G = Boomer Family K1 = LM48822TL 3 www.national.com LM48822 Absolute Maximum Ratings (Note 1, Note Junction Temperature Thermal Resistance 2) JA TLA1611A 63C/W Soldering Information See AN-1112 "Micro SMD Wafer Level Chip Scale package" If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. Supply Voltage (Note 1) Storage Temperature Input Voltage Power Dissipation (Note 3) ESD Rating(Note 4) ESD Rating (Note 5) Operating Ratings 6V -65C to +150C -0.3V to VDD + 0.3V Internally Limited 2000V 150V Electrical Characteristics VDD = 3.6V 150C Temperature Range TMIN TA TMAX -40C TA +85C 2.4V VDD 5.5V Supply Voltage (VDD) (Note 1, Note 2) The following specifications apply for AV = 0dB, RL = 16, f = 1kHz, unless otherwise specified. Limits apply to TA = 25C. LM48822 Symbol Parameter Conditions Units (Limits) Typical (Note 6) Limit (Note 7) RL = 3.5 3.5 4.5 4.5 mA (max) mA (max) Shutdown Enabled 0.06 1.2 A (max) 1 5 mV (max) dB (max) dB (min) VIN = 0V, both channels active IDD Quiescent Power Supply Current RL = 16 ISD Shutdown Current VOS Differential Output Offset Voltage VIN = 0V, RL = 16 TWU Wake Up Time AV RIN PO THD+N Minimum Gain Setting -59.5 +0.5 -0.5 Maximum Gain Setting 3.8 +0.5 -0.5 dB (max) dB (min) AV = 4dB AV = -60dB 25 60 30 70 k (max) k (max) RL= 16, f = 1kHz, THD+N = 1% Single channel Two channels in phase 70 35 27 mW mW (min) RL= 32, f = 1kHz, THD+N = 1% Single channel Two channels in phase 65 40 mW mW PO = 50mW, f = 1kHz, RL = 16 single channel 0.04 % PO = 40mW, f = 1kHz, RL = 32 single channel 0.02 % Voltage Gain Input Resistance Output Power Total Harmonic Distortion + Noise s 200 VRIPPLE = 200mVP-P, Inputs AC GND PSRR CMRR Power Supply Rejection Ratio Common Mode Rejection Ratio CIN = 1F, input referred, SD_BIAS = 0 fRIPPLE = 217Hz fRIPPLE = 1kHz 110 100 VRIPPLE = 1VP-P 95 100 dB (min) dB RL 16, POUT = 1.6mW, f = 1kHz 80 70 dB (min) RL 10k, VOUT = 1VRMS, f = 1kHz 95 85 dB (min) 100 dB 7 V XTALK Crosstalk SNR Signal-to-Noise Ratio RL = 16, f = 1kHz OS Output Noise AV = 4dB, Input referred A-Weighted Filter www.national.com 4 dB ROUT VOUT Parameter Conditions Output Impedance Charge pump-only mode enabled Maximum Voltage Swing Voltage applied to amplifier outputs in charge pump-only mode I2C Interface Characteristics VDD = 3.6V Units (Limits) Typical (Note 6) Limit (Note 7) 40 25 k (min) 2 VRMS (min) (Note 1, Note 2) The following specifications apply for AV = 0dB, RL = 16, f = 1kHz, unless otherwise specified. Limits apply to TA = 25C. LM48822 Symbol Parameter Conditions Typical (Note 6) Units (Limits) Limit (Note 7) t1 SCL Period 2.5 s (min) t2 SDA Setup Time 100 ns (min) t3 SDA Stable Time 0 ns (min) t4 Start Condition Time 100 ns (min) t5 Stop Condition Time 100 ns (min) VIH Input High Voltage 1.3 V (min) VIL Input Low Voltage 0.4 V (max) Note 1: "Absolute Maximum Ratings" indicate limits beyond which damage to the device may occur, including inoperability and degradation of device reliability and/or performance. Functional operation of the device and/or non-degradation at the Absolute Maximum RatingsRatings or other conditions beyond those indicated in the Recommended Operating Conditions is not implied. The Recommended Operating Conditions indicate conditions at which the device is functional and the device should not be operated beyond such conditions. All voltages are measured with respect to the ground pin, unless otherwise specified Note 2: The Electrical Characteristics tables list guaranteed specifications under the listed Recommended Operating Conditions except as otherwise modified or specified by the Electrical Characteristics Conditions and/or Notes. Typical specifications are estimations only and are not guaranteed. Note 3: maximum allowable power dissipation is PDMAX = (TJMAX - TA) / JA or the number given in Absolute Maximum Ratings, whichever is lower. Note 4: Human body model, applicable std. JESD22-A114C. Note 5: Machine model, applicable std. JESD22-A115-A. Note 6: Typical values represent most likely parametric norms at TA = +25C, and at the Recommended Operation Conditions at the time of product characterization and are not guaranteed. Note 7: Datasheet min/max specification limits are guaranteed by test or statistical analysis. Bump Descriptions Pin Name Function A1 C1N Charge Pump Flying Capacitor Negative Terminal A2 C1P Charge Pump Flying Capacitor Positive Terminal A3 CPGND Charge Pump Ground A4 VDD B1 OUTL Power Supply Left Channel Output B2 CPVSS Charge Pump Output B3 INL+ Left Channel Non-Inverting Input B4 INL- Left Channel Inverting Input C1 BIAS Bias Voltage Bypass C2 GND Ground C3 INR+ Right Channel Non-Inverting Input C4 INR- Right Channel Inverting Input D1 OUTR Right Channel Output D2 SCL I2C Serial Clock Input D3 SDA I2C Serial Data Input D4 COM Common-Mode Sense Input 5 www.national.com LM48822 LM48822 Symbol LM48822 Typical Performance Characteristics THD+N vs Frequency VDD = 2.5V, POUT = 10mW, RL = 32 THD+N vs Frequency VDD = 2.5V, POUT = 12mW, RL = 16 30061095 30061092 THD+N vs Frequency VDD = 3.6V, POUT = 20mW, RL = 16 THD+N vs Frequency VDD = 3.6V, POUT = 30mW, RL = 32 30061096 30061093 THD+N vs Frequency VDD = 5.0V, POUT = 20mW, RL = 16 THD+N vs Frequency VDD = 5.0V, POUT = 30mW, RL = 32 30061097 30061094 www.national.com 6 LM48822 THD+N vs Output Power AV = 0dB, RL = 16, f = 1kHz Both Outputs in Phase THD+N vs Output Power AV = 0dB, RL = 32, f = 1kHz Both Outputs in Phase 30061091 30061090 THD+N vs Output Power AV = 9dB, RL = 16, f = 1kHz Both Outputs in Phase Power Dissipation vs Output Power RL = 16, f = 1kHz 30061098 300610a7 Power Dissipation vs Output Power RL = 32, f = 1kHz Output Power vs Supply Voltage RL = 16, f = 1kHz 30061099 300610a0 7 www.national.com LM48822 Output Power vs Supply Voltage RL = 32, f = 1kHz CMRR vs Frequency VDD = 3.6V, VCM = 1VP-P, RL = 32 300610a3 300610a1 PSRR vs Frequency VDD = 3.6V, VRIPPLE = 20mVP-P, RL = 32 Crosstalk vs Frequency VDD = 3.6V, VRIPPLE = 1VP-P, RL = 32 300610a4 300610a2 Ground Noise vs Frequency VDD = 3.6V, VRIPPLE = 20mVP-P, RL = 32 Supply Current vs Supply Voltage No Load 300610a6 300610a5 www.national.com 8 I2C COMPATIBLE INTERFACE The LM48822 is controlled through an I2C compatible serial interface that consists of a serial data line (SDA) and a serial clock (SCL). The clock line is uni-directional. The data line is bi-directional (open collector). The LM48822 and the master can communicate at clock rates up to 400kHz. Figure 2 shows the I2C interface timing diagram. Data on the SDA line must be stable during the HIGH period of SCL. The LM48822 is a transmit/receive slave-only device, reliant upon the master to generate the SCL signal. Each transmission sequence is framed by a START condition and a STOP condition Figure 3. Each data word, device address and data, transmitted over the bus is 8 bits long as is always followed by an acknowledge pulse (Figure 4). The LM48822 device address is 1100000. I2C BUS FORMAT The I2C bus format is shown in Figure 4. The START signal, the transition of SDA from HIGH to LOW while SDA is HIGH, 30061001 FIGURE 2. I2C Timing Diagram 30061002 FIGURE 3. Start and Stop Diagram 30061014 FIGURE 4. Example I2C Write Cycle 9 www.national.com LM48822 is generated, altering all devices on the bus that a device address is being written to the bus. The 7-bit device address is written to the bus, most significant bit (MSB) first, followed by the R/W bit. R/W = 0 indicates the master is writing to the slave device, R/W = 1 indicates the master wants to read data from the slave device. The LM48822 is a WRITE-ONLY device and will not respond the R/W = 1. The data is latched in on the rising edge of the clock. Each address bit must be stable while SDA is HIGH. After the last address bit is transmitted, the master device releases SDA, during which time, an acknowledge clock pulse is generated by the slave device. If the LM48822 receives the correct address, the device pulls the SDA line low, generating and acknowledge bit (ACK). Once the master device registers the ACK bit, the 8-bit register data word is sent. Each data bit should be stable while SCL is HIGH. After the 8-bit register data word is sent, the LM48822 sends another ACK bit. Following the acknowledgement of the register data word, the master issues a STOP bit, allowing SDA to go high while SDA is high. Application Information LM48822 TABLE 1. Device Address Device Address B7 B6 B5 B4 B3 B2 B1 B0 (R/W) 1 1 0 0 0 0 0 0 TABLE 2. I2C Control Registers Register Address Register Name B7 B6 B5 B4 B3 B2 B1 B0 0 MODE CONTROL 0 SDL SD_BIAS CP_ONLY 0 MUTE_ LEFT SDR MUTE_ RIGHT 1 VOLUME CONTROL 1 SHDN VOL5 VOL4 VOL3 VOL2 VOL1 VOL0 TABLE 3. Mode Control Register Bit B6 Name SDL B5 SD_BIAS B4 CP_ONLY B3 UNUSED B2 MUTE_LEFT B1 SDR B0 MUTE_RIGHT Value Description 0 Left channel enabled 1 Left channel disabled 0 Bias enabled 1 Bias disabled 0 Normal operation 1 Charge-pump only mode. Amplifiers and Bias disabled. 0 Set B3 to 0 0 Left channel Normal Operation 1 Left channel Mute 0 Right channel enabled 1 Right channel disabled. Right channel audio inputs summed with left channel audio inputs and routed to OUTL 0 Right channel Normal Operation 1 Right channel Mute GENERAL AMPLIFIER FUNCTION The LM48822 headphone amplifier feature National's ground referenced architecture that eliminates the large DC-blocking capacitors required at the outputs of traditional headphone amplifiers. A low-noise inverting charge pump creates a negative supply (CPVSS) from the positive supply voltage (VDD). The headphone amplifiers operate from these bipolar supplies, with the amplifier outputs biased about GND, instead of a nominal DC voltage (typically VDD/2), like traditional amplifiers. Because there is no DC component to the headphone output signals, the large DC-blocking capacitors (typically 220F) are not necessary, conserving board space and system cost, while improving frequency response. CHARGE PUMP ONLY MODE In applications where the headphone jack is used as both an output and input port, signals such as a microphone input can appear on the headphone amplifier output. Traditional charge pump headphone amplifiers can clamp or distort the signals that appear on their output. Without the charge pump active, generating the negative voltage supply, the internal protection diodes of the amplifier clamp the incoming signal, distorting the negative half cycle, see Figure 5. The LM48822 charge pump only mode eliminates this problem. In charge pump only mode, the amplifiers are disabled, while the charge pump remains active. The disabled amplifier outputs present a high impedance (1M) load to the incoming signal. The charge pump maintains the negative rail, allowing the incoming signal to swing between VDD and VSS without any interference from the device. Set bit B4 (CP_ONLY) of the MODE CONTROL register to 1 for charge pump only mode. Setting CP_ONLY = 1 disables both the left and right channels, regardless of the status of the shutdown control bits. Set CP_ONLY = 0 for normal operation. GENERAL AMPLIFIER EXPLANATION The LM48822 features a differential input stage, which offers improved noise rejection compared to a single-ended input amplifier. Because a differential input amplifier amplifies the difference between the two input signals, any component common to both signals is cancelled. An additional benefit of the differential input structure is the possible elimination of the DC input blocking capacitors. Since the DC component is common to both inputs, and thus cancelled by the amplifier, the LM48822 can be used without input coupling capacitors when configured with a differential input signal. www.national.com 10 LM48822 30061015 FIGURE 5. Back-Driving the LM48822 Outputs or any ground imbalance between the headphone return and device ground, improving audio reproduction. Connect COM directly to the headphone return terminal of the headphone jack Figure 6. No additional external components are required. Connect COM to GND if the common-mode sense feature is not in use. COMMON MODE SENSE The LM48822 features a ground (common mode) sensing feature. In noisy applications, or where the headphone jack is used as a line out to other devices, noise pick up and ground imbalance can degrade audio quality. The LM48822 COM input senses and corrects any noise at the headphone return, 30061016 FIGURE 6. COM Connection Example 11 www.national.com LM48822 VOLUME CONTROL Volume Control Table VOLUME STEP VOL5 VOL4 VOL3 VOL2 VOL1 VOL0 HP GAIN (dB) 1 0 0 0 0 0 0 -96 2 0 0 0 0 0 1 -60 3 0 0 0 0 1 0 -57 4 0 0 0 0 1 1 -54 5 0 0 0 1 0 0 -51 6 0 0 0 1 0 1 -48 7 0 0 0 1 1 0 -45 8 0 0 0 1 1 1 -42 9 0 0 1 0 0 0 -39 10 0 0 1 0 0 1 -36 11 0 0 1 0 1 0 -34.5 12 0 0 1 0 1 1 -33 13 0 0 1 1 0 0 -31.5 14 0 0 1 1 0 1 -30 15 0 0 1 1 1 0 -28.5 16 0 0 1 1 1 1 -27 17 0 1 0 0 0 0 -25.5 18 0 1 0 0 0 1 -24 19 0 1 0 0 1 0 -22.5 20 0 1 0 0 1 1 -21 21 0 1 0 1 0 0 -19.5 22 0 1 0 1 0 1 -18 23 0 1 0 1 1 0 -16.5 24 0 1 0 1 1 1 -16 25 0 1 1 0 0 0 -15.5 26 0 1 1 0 0 1 -15 27 0 1 1 0 1 0 -14.5 28 0 1 1 0 1 1 -14 29 0 1 1 1 0 0 -13.5 30 0 1 1 1 0 1 -13 31 0 1 1 1 1 0 -12.5 32 0 1 1 1 1 1 -12 33 1 0 0 0 0 0 -11.5 34 1 0 0 0 0 1 -11 35 1 0 0 0 1 0 -10.5 36 1 0 0 0 1 1 -10 37 1 0 0 1 0 0 -9.5 38 1 0 0 1 0 1 -9 39 1 0 0 1 1 0 -8.5 40 1 0 0 1 1 1 -8 41 1 0 1 0 0 0 -7.5 42 1 0 1 0 0 1 -7 43 1 0 1 0 1 0 -6.5 44 1 0 1 0 1 1 -6 45 1 0 1 1 0 0 -5.5 46 1 0 1 1 0 1 -5 47 1 0 1 1 1 0 -4.5 www.national.com 12 VOL5 VOL4 VOL3 VOL2 VOL1 VOL0 48 1 0 1 1 1 1 -4 49 1 1 0 0 0 0 -3.5 50 1 1 0 0 0 1 -3 51 1 1 0 0 1 0 -2.5 52 1 1 0 0 1 1 -2 53 1 1 0 1 0 0 -1.5 54 1 1 0 1 0 1 -1 55 1 1 0 1 1 0 -0.5 56 1 1 0 1 1 1 0 57 1 1 1 0 0 0 0.5 58 1 1 1 0 0 1 1 59 1 1 1 0 1 0 1.5 60 1 1 1 0 1 1 2 61 1 1 1 1 0 0 2.5 62 1 1 1 1 0 1 3 63 1 1 1 1 1 0 3.5 64 1 1 1 1 1 1 4 13 HP GAIN (dB) www.national.com LM48822 VOLUME STEP LM48822 SHUTDOWN FUNCTION The LM48822 features three shutdown controls. Bits B6 (SDL) and B1 (SDR) of the MODE CONTROL register control the left and right channels, respectively. Set the control bits to 1 to disable the corresponding channel. When SDR = 1 and SDL = 0, the right channel is disabled, the right and left inputs are summed and output as a mono signal on the OUTL. When SDL = 1 and SDR = 0, the left channel is disabled, while only the right input signal is output on OUTR. Setting both SDL and SDR = 1 disables both channels, while the charge pump remains active. Bit B6 (SHDN) of the VOLUME CONTROL register is the global shutdown control for the entire device. Set SHDN = 1 to disable the entire device; both amplifiers and charge pump are disabled. Set SHDN = 0 for normal operation. SHDN = 1 overrides any other shutdown control bit. Charge Pump Flying Capacitor (C1) The flying capacitor (C1) affects the load regulation and output impedance of the charge pump. A C1 value that is too low results in a loss of current drive, leading to a loss of amplifier headroom. A higher valued C1 improves load regulation and lowers charge pump output impedance to an extent. Above 2.2F, the RDS(ON) of the charge pump switches and the ESR of C1 and C2 dominate the output impedance. A lower value capacitor can be used in systems with low maximum output power requirements. Charge Pump Flying Capacitor (C2) The value and ESR of the hold capacitor (C2) directly affects the ripple on CPVSS. Increasing the value of C2 reduces output ripple. Decreasing the ESR of C2 reduces both output ripple and charge pump output impedance. A lower value capacitor can be used in systems with low maximum output power requirements. MUTE FUNCTION Set bits B2 (MUTE_LEFT) and B0 (MUTE_RIGHT) of the MODE CONTROL register to 1 to mute the respective channels. Set MUTE_LEFT and MUTE_RIGHT to 0 for normal operation. Input Capacitor Selection Input capacitors may be required for some applications, or when the audio source is single-ended. Input capacitors block the DC component of the audio signal, eliminating any conflict between the DC component of the audio source and the bias voltage of the LM48822. The input capacitors create a highpass filter with the input resistors RIN. The -3dB point of the high pass filter is found using Equation 1 below. SD_BIAS FUNCTION The LM48822 BIAS is controlled through the I2C interface. Set bit B5 (SD_BIAS) of the MODE CONTROL register to 1 to enable the LM48822 BIAS. BIAS provides the voltage for both the amplifiers and the charge pump. When enabled, VBIAS will track VDD for VDD < 3V. Once VDD exceeds 3V, VBIAS remains fixed at 3V, limiting the output swing of the device the 6VP-P. Set SD_BIAS = 0 to disable BIAS. Disabling BIAS allows the amplifier and charge pump to track VDD, increasing output swing; however, a slight degradation in PSSR will occur. Limit VDD to 4.2V or less when BIAS is disabled. f = 1 / 2RINCIN (Hz) (1) Power Supply Bypassing/Filtering Proper power supply bypassing is critical for low noise performance and high PSRR. Place the supply bypass capacitors as close to the supply pins as possible. Place a 1F ceramic capacitors from VDD to GND. Additional bulk capacitance may be added as required. Where the value of R IN is given in the Electrical Characteristics Table. High pass filtering the audio signal helps protect the speakers. When the LM48822 is using a single-ended source, power supply noise on the ground is seen as an input signal. Setting the high-pass filter point above the power supply noise frequencies, 217Hz in a GSM phone, for example, filters out the noise such that it is not amplified and heard on the output. Capacitors with a tolerance of 10% or better are recommended for impedance matching and improved CMRR and PSRR. Charge Pump Capacitor Selection Use low ESR ceramic capacitors (less than 100m) for optimum performance. SINGLE-ENDED AUDIO AMPLIFIER CONFIGURATION The LM48822 is compatible with single-ended sources. Figure 7 shows the typical single-ended applications circuit. PROPER SELECTION OF EXTERNAL COMPONENTS 30061056 FIGURE 7. Single-Ended Input Configuration www.national.com 14 15 www.national.com LM48822 improves audio performance, minimizes crosstalk between channels and prevents switching noise from interfering with the audio signal. Use of power and ground planes is recommended. Place all digital components and route digital signal traces as far as possible from analog components and traces. Do not run digital and analog traces in parallel on the same PCB layer. If digital and analog signal lines must cross either over or under each other, ensure that they cross in a perpendicular fashion. PCB LAYOUT CONFIGURATION Minimize trace impedance of the power, ground and all output traces for optimum performance. Voltage loss due to trace resistance between the LM48822 and the load results in decreased output power and efficiency. Trace resistance between the power supply and ground has the same effect as a poorly regulated supply, increased ripple and reduced peak output power. Use wide traces for power supply inputs and amplifier outputs to minimize losses due to trace resistance, as well as route heat away from the device. Proper grounding LM48822 LM48822TL Demoboard of Materials TABLE 4. LM48822TL Demoboard Bill of Materials Designator www.national.com Quantity Description C1 1 10F 10% 16V 500 Tantalum Capacitor (B Case) AVX TPSB106K016R0500 C2 1 1F 10% 16V X5R Ceramic Capacitor (603) Panasonic ECJ-1VB1C105K C3, C8, C9 3 2.2F 10% 10V X5R Ceramic Capacitor (603) Panasonic ECJ-1VB1A225K C4 -- C7 4 1F 10% 16V X7R Ceramic Capacitor (1206) Panasonic ECJ-3YB1C105K R1, R2 2 5k 5% 1/10W Thick Film Resistor (603) Vishay CRCW06035R1KJNEA J1 1 Stereo Headphone Jack J2 1 16-Pin Boardmount Socket 3M 8516-4500JL JU1 1 3 Pin Header JU2 1 2 Pin Header LM4822TL 1 LM48822TL (16-Bump microSMD) 16 LM48822 Demoboard Schematic 30061057 FIGURE 8. LM48822 Demoboard Schematic 17 www.national.com LM48822 Demonstration Board PCB Layout 30061068 30061066 FIGURE 10. Top Silkscreen FIGURE 9. Solder Mask 30061067 30061062 FIGURE 11. Top Layer FIGURE 12. Layer 2 (GND) 30061064 30061058 FIGURE 13. Layer 3 (VDD) www.national.com FIGURE 14. Bottom Layer 18 LM48822 30061060 FIGURE 15. Bottom Silkscreen 19 www.national.com LM48822 Revision History Rev Date 0.1 04/15/08 Initial PDF. 0.2 04/23/08 Added the demo boards and schematic. 0.3 04/30/08 Text edits. 0.4 07/10/08 Text edits. 0.5 03/09/11 Changed the bit B7 into B6 under the SHUTDOWN FUNCTION section. www.national.com Description 20 LM48822 Physical Dimensions inches (millimeters) unless otherwise noted 14 - Bump micro SMD Order Number LM48822TL NS Package Number TLA1611A X1 = 1970 X2 = 1970 X3 = 600 21 www.national.com LM48822 Ground-Referenced, Ultra High PSRR, Ultra Low Noise, 35mW/Channel Stereo Headphone Amplifier with Common Mode Sense, and I2C Volume Control Notes For more National Semiconductor product information and proven design tools, visit the following Web sites at: www.national.com Products Design Support Amplifiers www.national.com/amplifiers WEBENCH(R) Tools www.national.com/webench Audio www.national.com/audio App Notes www.national.com/appnotes Clock and Timing www.national.com/timing Reference Designs www.national.com/refdesigns Data Converters www.national.com/adc Samples www.national.com/samples Interface www.national.com/interface Eval Boards www.national.com/evalboards LVDS www.national.com/lvds Packaging www.national.com/packaging Power Management www.national.com/power Green Compliance www.national.com/quality/green Switching Regulators www.national.com/switchers Distributors www.national.com/contacts LDOs www.national.com/ldo Quality and Reliability www.national.com/quality LED Lighting www.national.com/led Feedback/Support www.national.com/feedback Voltage References www.national.com/vref Design Made Easy www.national.com/easy www.national.com/powerwise Applications & Markets www.national.com/solutions Mil/Aero www.national.com/milaero PowerWise(R) Solutions Serial Digital Interface (SDI) www.national.com/sdi Temperature Sensors www.national.com/tempsensors SolarMagicTM www.national.com/solarmagic PLL/VCO www.national.com/wireless www.national.com/training PowerWise(R) Design University THE CONTENTS OF THIS DOCUMENT ARE PROVIDED IN CONNECTION WITH NATIONAL SEMICONDUCTOR CORPORATION ("NATIONAL") PRODUCTS. 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