High Performance, Low
Power HDMI/DVI Transmitter
AD9387NK
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 www.analog.com
Fax: 781.461.3113 ©2007 Analog Devices, Inc. All rights reserved.
06880-001
FEATURES
General
Low power HDMI/DVI transmitter ideal for portable
applications
Compatible with HDMI v.1.3, DVI v.1.0, and HDCP 1.3
Single 1.8 V power supply
Video/audio inputs accept logic levels from 1.8 V to 3.3 V
Digital video
80 MHz operation supports all HDTV resolutions from
480i to 1080i
Programmable 2-way color space converter
Supports RGB, YCbCr, and DDR
Supports ITU656-based embedded syncs
Automatic input video format timing detection (CEA-861D)
Digital audio
Supports standard S/PDIF for stereo LPCM or compressed
audio up to 192 kHz
8-channel, uncompressed LPCM I2S audio up to 192 kHz
Special features for easy system design
On-chip MPU with I2C master to perform HDCP operations
and EDID reading operations
5 V tolerant I2C and HPD I/Os, no extra device needed
No audio master clock needed for supporting S/PDIF
and I2S
On-chip MPU reports HDMI events through interrupts and
registers
APPLICATIONS
Digital video cameras
Digital still cameras
Personal media players
Cellular handsets
DVD players and recorders
Digital set-top boxes
A/V receivers
HDMI repeater/splitter
GENERAL DESCRIPTION
The AD9387NK is an 80 MHz, high definition multimedia
interface (HDMI™) v.1.3 transmitter. It supports HDTV formats
up to 720p and 1080i and computer graphic resolutions up to
XGA (1024 × 768 @ 75 Hz). With the inclusion of HDCP, the
AD9387NK allows the secure transmission of protected content,
as specified by the HDCP 1.3 protocol.
FUNCTIONAL BLOCK DIAGRAM
VIDEO
DATA
CAPTURE
D[23:0]
VSYNC
HSYNC
DE
CLK
I
2
C
SLAVE
REGISTER
CONFIGURATION
LOGIC
SDA
SCL
HDCP
CORE
MDA
MCL
HDCP AND EDI D
MICRO-
CONTROLLER
I
2
C
MASTER
INT
HPD
DDCSCL
DDCSDA
SYNC
ADJUSTMENT
AND
GENERATION
Tx0[1:0]
Tx1[1:0]
Tx2[1:0]
TxC[1:0]
COLOR
SPACE
CONVERSION
AUDIO
DATA
CAPTURE
S/PDIF
AD9387NK
HDMI Tx
CORE
MCLK
I
2
S[3:0]
LRCLK
SCLK
Figure 1.
The AD9387NK supports both S/PDIF and 8-channel I2S audio.
Its high fidelity, 8-channel I2S can transmit either stereo or 7.1
surround audio at 192 kHz. The S/PDIF can carry stereo linear
pulse-code modulation (LPCM) audio or compressed audio,
including Dolby® Digital and DTS®.
The AD9387NK helps reduce system design complexity and cost
by incorporating such features as an internal microprocessor
for high-bandwidth digital content protection (HDCP) opera-
tions, an I2C® master for extended display identification data
(EDID) reading, a single 1.8 V power supply, and 5 V tolerance
on the I2C and hot plug detect pins. For additional information
and resources, see the Applications Information section.
Fabricated in an advanced CMOS process, the AD9387NK
is available in a space saving, 76-ball CSP_BGA. The package is
RoHS compliant and is specified from −25°C to +90°C
operation.
AD9387NK
Rev. 0 | Page 2 of 8
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
General Description ......................................................................... 1
Functional Block Diagram .............................................................. 1
Revision History ............................................................................... 2
Specifications ..................................................................................... 3
Absolute Maximum Ratings ............................................................ 4
Explanation of Test Levels ............................................................4
ESD Caution...................................................................................4
Applications Information .................................................................5
Design Resources ..........................................................................5
Document Conventions ...............................................................5
Outline Dimensions ..........................................................................6
Ordering Guide .............................................................................6
REVISION HISTORY
10/07—Revision 0: Initial Version
AD9387NK
Rev. 0 | Page 3 of 8
SPECIFICATIONS
Table 1. AD9387NKBBCZ-80/AD9387NKBBCZRL-80
Parameter Conditions Temp Test Level1Min Typ Max Unit
DIGITAL INPUTS
Input Voltage, High (VIH) Full VI 1.4 3.5 V
Input Voltage, Low (VIL) Full VI −0.3 +0.7 V
Input Capacitance 25°C VIII 3 pF
THERMAL CHARACTERISTICS
Thermal Resistance
Junction-to-Case BGA (θJC) V 15.2 °C/W
Junction-to-Ambient (θJA) V 59 °C/W
Ambient Temperature Full V −25 +25 +90 °C
DC SPECIFICATIONS
Input Leakage Current (IIL) Full VI −10 +10 μA
AC SPECIFICATIONS
CLK Frequency Full IV 13.5 80 MHz
TMDS Output CLK Duty Cycle Full IV 48 52 %
Input Data Setup Time Full IV 1 ns
Input Data Hold Time Full IV 0.7 ns
TMDS Differential Swing VI 900 1000 1100 mV
VSYNC and HSYNC Delay from DE Falling Edge IV 1 UI2
VSYNC and HSYNC Delay to DE Rising Edge IV 1 UI2
Differential Output Swing
Low-to-High Transition Time 25°C VII 75 175 ps
High-to-Low Transition Time 25°C VII 75 175 ps
AUDIO AC TIMING
Sample Rate I2S and S/PDIF Full IV 32 192 kHz
I2S Cycle Time 25°C IV 1 UI2
I2S Setup Time 25°C IV 2 ns
I2S Hold Time 25°C IV 2 ns
1 See the section. Explanation of Test Levels
2 UI = unit interval.
AD9387NK
Rev. 0 | Page 4 of 8
ABSOLUTE MAXIMUM RATINGS
Table 2.
Parameter Rating
Digital Inputs −0.3 V to +5 V
Digital Output Current 20 mA
Operating Temperature Range −40°C to +100°C
Storage Temperature Range −65°C to +150°C
Maximum Junction Temperature 150°C
Maximum Case Temperature 150°C
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
EXPLANATION OF TEST LEVELS
I. 100% production tested.
II. 100% production tested at 25°C and sample tested at
specified temperatures.
III. Sample tested only.
IV. Parameter is guaranteed by design and characterization
testing.
V. Parameter is a typical value only.
VI. 100% production tested at 25°C; guaranteed by design
and characterization testing.
VII. Limits defined by HDMI specification; guaranteed by
design and characterization testing.
VIII. Guaranteed by design.
ESD CAUTION
AD9387NK
Rev. 0 | Page 5 of 8
APPLICATIONS INFORMATION
DESIGN RESOURCES
The following resources, as well as evaluation kits,
reference design schematics, and other support
documentation, are available after signing an NDA
available from flatpanel_apps@analog.com. Users can
access a programming guide, a hardware user guide, a
software driver user guide, and software driver source
code after signing an NDA.
Other references include the following:
EIA/CEA-861, a technical specifications document, describes
audio and video InfoFrames, as well as the E-EDID structure for
HDMI. It is available from the Consumer Electronics
Association (CEA).
HDMI v.1.3, a defining document for HDMI v.1.3, and the
HDMI Compliance Test Specification v.1.3 are available from
HDMI Licensing, LLC.
HDCP Specification v.1.3, the defining technical specifications
document for the HDCP v.1.3, is available from Digital Content
Protection, LLC.
DOCUMENT CONVENTIONS
In this data sheet, data is represented using the conventions
described in Table 3.
Table 3. Document Conventions
Data
Type Format
0xNN Hexadecimal (Base 16) numbers are represented using
the C language notation, preceded by 0x.
0bNN Binary (Base 2) numbers are represented using the C
language notation, preceded by 0b.
NN Decimal (Base 10) numbers are represented using no
additional prefixes or suffixes.
Bit Bits are numbered in little endian format; that is, the
least significant bit of a byte or word is referred to as Bit 0.
AD9387NK
Rev. 0 | Page 6 of 8
*COMP LIANT TO JEDEC STANDARDS MO - 2 25
WI TH T HE E XCEPT IO N TO PACKAGE HEIGHT.
OUTLINE DIMENSIONS
A
B
C
D
E
F
G
J
H
K
10 8 7 6 321
954
A
1 CORNER
INDEX ARE A
TO P VIEW
BALL A1
PAD CORNE R
DETAIL A BOTTOM VIEW
0.75
REF
6.10
6.00 SQ
5.90
SEATING
PLANE
BALL DI AMET E R
0.15 M IN
0.35
0.30
0.25
COPLANARITY
0.08 MAX
0.65 MIN
0.50
BSC
4.50
BSC SQ
*1.40 M AX
010807-A
DETAIL A
Figure 2. 76-Ball Chip Scale Package Ball Grid Array [CSP_BGA]
6 mm × 6 mm × 1.4 mm
(BC-76-1)
Dimensions shown in millimeters
ORDERING GUIDE
Model Temperature Range Package Description Package Option
AD9387NKBBCZ-801
−25°C to +90°C 76-Ball Chip Scale Package Ball Grid Array [CSP_BGA] BC-76-1
AD9387NKBBCZRL-801
−25°C to +90°C 76-Ball Chip Scale Package Ball Grid Array [CSP_BGA] BC-76-1
AD9387NK/PCBZ1
Evaluation Board
1 Z = RoHS Compliant Part.
AD9387NK
Rev. 0 | Page 7 of 8
NOTES
AD9387NK
Rev. 0 | Page 8 of 8
NOTES
Purchase of licensed I2C components of Analog Devices or one of its sublicensed Associated Companies conveys a license for the purchaser under the Philips I2C Patent
Rights to use these components in an I2C system, provided that the system conforms to the I2C Standard Specification as defined by Philips.
©2007 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D06880-0-10/07(0)
