TISP3070H3SL THRU TISP3095H3SL - Power Innovations

TISP3070H3SL THRU TISP3095H3SL, TISP3125H3SL THRU TISP3210H3SL

TISP3250H3SL THRU TISP3350H3SL

DUAL BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS

PRODUCT INFORMATION

Information is current as of public ation date. Products conf orm to specificatio ns in accordance

with the terms of Power Innovations standard warranty. Production processing does not

necessarily incl ude testing of all par ameters.

TELECOMMUNICATION SYSTEM 2x100 A 10/1000 OVERVOLTAGE PROTECTORS

●Ion-Implanted Breakdown Region

- Precise DC and Dynamic Voltages

●Rated for International Surge Wave Shapes

- Guaranteed -40 °C to +85 °C Per f orma nce

DEVICE VDRM

V(BO)

‘3070 58 70

‘3080 65 80

‘3095 75 95

‘3125 100 125

‘3135 110 135

‘3145 120 145

‘3180 145 180

‘3210 160 210

‘3250 190 250

‘3290 220 290

‘3350 275 350

WAV E SHAPE STANDARD ITSP

2/10 µs GR-1089-CORE 500

8/20 µs IEC 61000-4-5 300

10/160 µs FCC Part 68 250

10/700 µs FCC Part 68

ITU-T K20/21 200

10/560 µs FCC Part 68 160

10/1000 µs GR-1089-CORE 100

●3-Pin Thr ough-Hole Packaging

- Compatible with TO-220AB pin-out

- Low Height. . . . . . . . . . . . . . . . . . . . .8.3 mm

●Low Differential Capacitance

- Value at -2 V/-50 V Bias. . . . . . . .67 pF max.

description

The TISP3xxxH3SL limits overvoltages between the telephone line Ring and Tip conductors and Ground.

Overvoltages ar e norm al ly c aus ed by a.c. power sy s tem or l ig htni ng fl ash d is tur ba nce s whi ch ar e in duced or

conducte d on to the telepho ne li ne.

The protec tor consists of two symme trical voltage-tr iggered bi directional thyr istors. Overvoltages are initially

clipped by breakdown clamping until the voltage rises to the breakover level, which causes the device to

crowbar into a low-voltage on state. This low-voltage on state causes the current resulting from the

over voltage to be safely diver ted through the device. The high crowbar holdin g current prevents d.c . latchu p

as the diverted current subsides.

This TISP3xxxH3SL range consists of eleven voltage variants to meet various maximum system voltage

levels (58 V to 275 V). They are guaranteed to voltage limit and withstand the listed international lightning

surges in both polarities. These high current protection devices are in a 3-pin single-in-line (SL) plastic

package and ar e supplied in tube pack. For a lternat ive impulse ratin g, voltage and holding cu rrent values in

SL packaged protectors, consult the factory. For lower rated impulse currents in the SL package, the 35 A

10/1000 TISP3xxxF3SL series is a vailab le.

These monolithic protection devices are fabricate d in ion-implanted plana r structures to en sure precise and

matched breakover control and are virtually transparent to the system in normal operation.

device symbol

SD3XAA

Term inals T, R and G correspond to the

alternative line designators of A, B and C

SL PACKAGE

(TOP VIEW )

RMDXXAG

TISP3070H3SL THRU TISP3095H3SL, TISP3125H3SL THRU TISP3210H3SL

TISP3250H3SL THRU TISP3350H3SL

DUAL BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS

JANUARY 1999 - REVISED MAY 1999

PRODUCT INFORMATION

absolute maximum ratings, TA = 25°C (unless otherwise noted)

RATING SYMBOL VALUE UNIT

Repetitive peak off-state voltage, (see Note 1)

‘3070

‘3080

‘3095

‘3125

‘3135

‘3145

‘3180

‘3210

‘3250

‘3290

‘3350

VDRM

± 58

± 65

± 75

±100

±110

±120

±145

±160

±190

±220

±275

Non-repetitive peak on-state pulse current (see Notes 2, 3 and 4)

ITSP A

2/10 µs (GR-1089-CORE, 2/10 µs voltage wave shape) 500

8/20 µs (IEC 61000-4-5, 1.2/50 µs voltage, 8/20 current combination wave generator) 300

10/160 µs (FCC P art 68, 10/160 µs voltage wave shape) 250

5/200 µs (VDE 0433, 10/700 µs voltage wave shape) 220

0.2/310 µs (I3124, 0.5/700 µs voltage wa ve shape) 200

5/310 µs (ITU-T K20/21, 10/700 µs voltage wave shape) 200

5/310 µs (FTZ R12, 10/700 µs voltage wave shape) 200

5/320 µs (FCC P art 68, 9/720 µs voltage wave shape) 200

10/560 µs (FCC P art 68, 10/560 µs voltage wave shape) 160

10/1000 µs (GR-1089-CORE, 10/1000 µs voltage wave shape) 100

Non-repetitive peak on-state current (see Notes 2, 3 and 5)

ITSM

20 ms (50 Hz) full sine wave

16.7 ms (60 Hz) full sine wa ve

1000 s 50 Hz/60 Hz a.c.

Initial rate of rise of on-state current, Exponential current ramp , Maximum ramp v alue < 200 A di T/dt 400 A/µs

Junction temperature TJ-40 to +150 °C

Storage temperature range Tstg -65 to +150 °C

NOTES: 1. See Figure 9 for v oltage values at lower temperatures.

2. Initially the TISP3xxxH3SL must be in thermal equilibrium.

3. These non-repetitive rated currents are peak values of either polarirty. The rated current values may be applied to the R or T

terminals. Additionally, both R and T terminals may have their rated current values applied simultaneously (in this case the G

terminal retur n current will be the sum of the currents applied to the R and T terminals). The surge may be repeated after the

TISP3xxxH3SL returns to its initial conditions.

4. See Figure 10 for impulse current ratings at other temperatures. Abov e 85 °C, derate linearly to zero at 150 °C lead temper ature.

5. EIA/JESD51-2 environment and EIA/JESD 51-3 PCB with standard footprint dimensions connected with 5 A rated printed w iring

track widths. See Figure 8 for the current ratings at other durations. Figure 8 shows the R and T terminal current rating for

simulateous operation. In this condition, the G terminal current will be 2xITSM(t), the sum of the R and T terminal currents. Derate

current values at -0.61 %/°C for ambient temperatures above 25 °C.

JANUARY 1999 - REVISED MAY 1999

TISP3070H3SL THRU TISP3095H3SL, TISP3125H3SL THRU TISP3210H3SL

TISP3250H3SL THRU TISP3350H3SL

DUAL BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS

PRODUCT INFORMATION

electri cal characteris tics for the R and G or T and G terminal s, TA = 25°C (unless otherwi se noted)

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

IDRM Repetitive peak off-

state current VD = VDRM TA = 25°C

TA = 85°C ±5

±10 µA

V(BO) Breakover v oltage dv/dt = ±750 V/ms, RSOURCE = 300 Ω

‘3070

‘3080

‘3095

‘3125

‘3135

‘3145

‘3180

‘3210

‘3250

‘3290

‘3350

±70

±80

±95

±125

±135

±145

±180

±210

±250

±290

±350

V(BO) Impulse breakover

voltage

dv/dt ≤±1000 V/µs, Linear voltage ram p,

Maximum ramp value = ±500 V

di/dt = ±20 A/µs, Linear current ramp ,

Maximum ramp value = ±10 A

‘3070

‘3080

‘3095

‘3125

‘3135

‘3145

‘3180

‘3210

‘3250

‘3290

‘3350

±78

±88

±103

±134

±144

±154

±189

±220

±261

±302

±362

I(BO) Break over current dv/dt = ±750 V/ms, RSOURCE = 300 Ω±0.15 ±0.6 A

VTOn-state voltage IT=±5A, t

W= 100 µs ±3 V

IHHolding current IT= ±5 A, di/dt = +/-30 mA /ms ±0.15 ±0.6 A

dv/dt Critical rate of rise of

off-state voltage Linear voltage ramp, Maximum ramp value < 0.85VDRM ±5 kV/µs

IDOff-state current VD=±50V T

A = 85°C ±10 µA

Coff Off-state capacitance

f = 100 kHz, Vd=1V rms, V

D=0,

f = 100 kHz, Vd=1V rms, V

D=-1V

f = 100 kHz, Vd=1V rms, V

D=-2V

f = 100 kHz, Vd=1V rms, V

D=-50V

f = 100 kHz, Vd=1V rms, V

D= -100 V

(see Note 6)

‘3070 thru ‘3095

‘3125 thru ‘3210

‘3250 thru ‘3350

‘3070 thru ‘3095

‘3125 thru ‘3210

‘3250 thru ‘3350

‘3070 thru ‘3095

‘3125 thru ‘3210

‘3250 thru ‘3350

‘3070 thru ‘3095

‘3125 thru ‘3210

‘3250 thru ‘3350

‘3125 thru ‘3210

‘3250 thru ‘3350

170

150

140

NOTE 6: To avoid possible voltage clipping, the ‘3125 is tested with VD=-98V.

TISP3070H3SL THRU TISP3095H3SL, TISP3125H3SL THRU TISP3210H3SL

TISP3250H3SL THRU TISP3350H3SL

DUAL BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS

JANUARY 1999 - REVISED MAY 1999

PRODUCT INFORMATION

electrical characteristics for the R and T terminals, TA = 25°C

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

IDRM Repetitive peak off-

state current VD = 2VDRM ±5 µA

V(BO) B reakover voltage dv/dt = ±750 V/ms, RSOURCE = 300 Ω

‘3070

‘3080

‘3095

‘3125

‘3135

‘3145

‘3180

‘3210

‘3250

‘3290

‘3350

±140

±160

±190

±250

±270

±290

±360

±420

±500

±580

±700

V(BO) Impulse breakover

voltage

dv/dt ≤±1000 V/µs, Linear voltage ramp,

Maximum ramp value = ±500 V

di/dt = ±20 A/µs, Linear current ramp,

Maximum ramp value = ±10 A

‘3070

‘3080

‘3095

‘3125

‘3135

‘3145

‘3180

‘3210

‘3250

‘3290

‘3350

±156

±176

±206

±268

±288

±308

±378

±440

±252

±604

±724

thermal characteristics

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

RθJA Junction to free air thermal resistance EIA/JESD51 -3 PCB, IT = ITSM(1000),

TA = 25 °C , (see Note 7) 50 °C/W

NOTE 7: EIA/JESD51-2 environment and PCB has standard footprint dimensions connected with 5 A rated printed wiring track widths.

JANUARY 1999 - REVISED MAY 1999

TISP3070H3SL THRU TISP3095H3SL, TISP3125H3SL THRU TISP3210H3SL

TISP3250H3SL THRU TISP3350H3SL

DUAL BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS

PRODUCT INFORMATION

PARAMETER MEASUREMENT INFORMATION

Figure 1. VOLTAGE-CURRENT CHARACTERISTIC FOR TERMINAL PAIRS

-v VDRM

IDRM

ITSM

ITSP

V(BO)

I(BO)

Quadra nt I

Switching

Characteristic

V(BO)

I(BO)

ITSM

ITSP

-i

Quadrant III

Switching

Characteristic PM4XAAC

VDRM

IDRM

VD = ±50 V and ID = ±10 µA

used for reliability release

TISP3070H3SL THRU TISP3095H3SL, TISP3125H3SL THRU TISP3210H3SL

TISP3250H3SL THRU TISP3350H3SL

DUAL BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS

JANUARY 1999 - REVISED MAY 1999

PRODUCT INFORMATION

TYPICAL CHARACTERISTICS

Figure 2. Figure 3.

Figure 4. Figure 5.

OFF-STATE CURRENT

JUNCTION TEMPERATURE

TJ - Junction Temperature - °C

-25 0 25 50 75 100 125 150

|ID| - Off-State Current - µA

0·001

0·01

0·1

100 TCHAG

VD = ±50 V

NORMALISED BREAKOVER VOLTAGE

JUNCTION TEMPERATURE

TJ - Junction Temperature - °C

-25 0 25 50 75 100 125 150

Normali sed Breakover Voltage

0.95

1.00

1.05

1.10 TC4HAF

ON-STATE CURRENT

ON-STATE VOLTAGE

VT - On-State Voltage - V

0.7 1.5 2 3 4 5 7110

IT - On-State Current - A

1.5

150

200

100

TA = 25 °C

tW = 100 µs

'3250

THRU

'3350

'3125

THRU

'3210

'3070

THRU

'3095

NORMALISED HOLDING CURRENT

JUNCTION TEMPERATURE

TJ - Junction Temperature - °C

-25 0 25 50 75 100 125 150

Normal ise d Holdi ng Current

0.4

0.5

0.6

0.7

0.8

0.9

1.5

2.0

1.0

TC4HAD

JANUARY 1999 - REVISED MAY 1999

TISP3070H3SL THRU TISP3095H3SL, TISP3125H3SL THRU TISP3210H3SL

TISP3250H3SL THRU TISP3350H3SL

DUAL BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS

PRODUCT INFORMATION

TYPICAL CHARACTERISTICS

Figure 6. Figure 7.

NORMALISED CAPACITANCE

OFF-STATE VOLTAGE

VD - Off-state Voltage - V

0.5 1 2 3 5 10 20 30 50 100150

Capacitance Normalised to VD = 0

0.2

0.3

0.4

0.5

0.6

0.7

0.8

0.9

TJ = 25°C

Vd = 1 V rms

'3125 THRU '3210

'3250 THRU '3350

'3070 THRU '3095

DIFFERENTIAL OFF-STATE CAPACITANCE

RATED REPETITIVE PEAK OFF-STATE VOLTAGE

VDRM - Repetitive Peak Off-State Voltage - V

50 60 70 80 90 150 200 250 300100

∆

∆∆

∆C - Differential Off-State Capacitance - pF

∆

∆∆

∆C = Coff(-2 V) - Coff(-50 V)

'3070

'3080

'3095

'3125

'3135

'3145

'3180

'3250

'3290

'3350

'3210

TISP3070H3SL THRU TISP3095H3SL, TISP3125H3SL THRU TISP3210H3SL

TISP3250H3SL THRU TISP3350H3SL

DUAL BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS

JANUARY 1999 - REVISED MAY 1999

PRODUCT INFORMATION

RATING AND THERMAL INFORMATION

Figure 8.

Figure 9. Figure 10.

NON-REPETI T IVE PEAK O N-ST ATE CURRENT

CURRENT DURATIO N

t - Current Dura tio n - s

0·1 1 10 100 1000

ITSM(t) - Non-Repetitive Peak On-State Current - A

1.5

TI4HACA

VGEN = 600 V rms, 50/60 Hz

RGEN = 1.4*VGEN/ITSM(t)

EIA/JESD51-2 ENVIRONMENT

EIA/JESD51-3 PCB, TA = 25 °C

SIMULTANEOUS OPERATION

OF R AND T TERM INAL S. G

TERMINAL CURRENT = 2 x ITSM(t)

VDRM DERATING FACTOR

MINIMUM AMBIENT TEMPERATURE

TAMIN - Minim um Amb ient Tem perature - °C

-35 -25 -15 -5 5 15 25-40 -30 -20 -10 0 10 20

Derating Factor

0.93

0.94

0.95

0.96

0.97

0.98

0.99

1.00

'3250 THRU '3350

'3125 THRU '3210

'3070 THRU '3095

IMPULSE RATING

AMBIENT TEMPERATURE

TA - Ambient Temperature - ° C

-40-30-20-100 1020304050607080

Impulse Current - A

100

120

150

200

250

300

400

500

600

700

IEC 1 .2/50 , 8/20

ITU-T 10/700

FCC 10/560

BELLCORE 2/10

BELLCORE 10 / 1000

FCC 10/160

TC4HAA

JANUARY 1999 - REVISED MAY 1999

TISP3070H3SL THRU TISP3095H3SL, TISP3125H3SL THRU TISP3210H3SL

TISP3250H3SL THRU TISP3350H3SL

DUAL BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS

PRODUCT INFORMATION

APPLICATIONS INFORMATION

impulse testing

To ver ify th e w ith sta nd ca pab il ity a nd sa fety of the e qui pm ent, s tand ards r equ ire that the eq ui pme nt i s te sted

with various impulse wave forms. The table below sho ws some common values.

If the impulse generator current e xceeds the protectors current rating then a series resistance can be used to

reduce t he current to the protecto rs rated value and so preven t possible failure. The required value of ser ies

resistance for a given waveform is given by the following calculations. First, the minimum total circuit

impedance is found by dividing the impulse generators peak voltage by the protectors rated current. The

impulse generators fic tive impedance ( generators peak vo ltage divid ed by pea k shor t cir cuit current ) is then

subtracted from the mini mum total circuit imped ance to give the req uired value of ser ies resis tance. In som e

cases the equipment will require verification over a temperature range. By using th e rated wavefor m values

from Figure 10, the appropriate series resistor value can be calculated for ambient temperatures in the range

of -40 °C to 85 °C.

a.c. power testing

The protector can withstand the G return currents applied for times not exceeding those shown in Figure 8.

Currents that exceed these times must be terminated or reduced to avoid protector failure. Fuses, PTC

(Positive Temperature Coefficient) resistors and fusible resistors are overcurrent protection devices which can

be used to reduce the current flow. Protective fuses may range from a few hundred milliamperes to one

ampere. In some c as es it may be necess ary to add some extra series re sista n ce to pr event the fus e ope nin g

dur ing i mpulse testin g. The curren t versus tim e ch aracter istic of th e overcur ren t protec tor must b e bel ow the

line shown in Figu re 8. In some ca se s ther e may be a fur t h er time li mi t impo se d by the test standard (e.g. UL

1459 wiring simulator failure).

capacitance

The protector characteristic off-state capacitance values are given for d.c. bias voltage , VD, values of 0, -1 V,

-2 V and - 50 V. Whe re poss ible values are al so gi ven for -100 V. Values for othe r voltages may be calc ulate d

by multiplying the VD= 0 capacit ance value by the fac tor given in Figure 6. Up to 10 MHz th e capacit ance is

essentially independent of frequency. Above 10 MHz the effective capacitance is strongly dependent on

connection inductance. In many applications, the typical conductor bias voltages will be about -2 V and -50 V.

Figure 7 shows the differential (lin e unbalanc e) capacitance caused by biasing one prot ector at -2 V and the

other at -50 V.

STANDARD PEAK VOLTAGE

SETTING

VOL T AGE

WAVE FORM

µs

PEAK CURRENT

VALUE

CURRENT

WAVE FORM

µs

TISP3xxxH3

25 °C RATING

SERIES

RESISTANCE

Ω

GR-1089-CORE 2500 2/10 500 2/10 500 0

1000 10/1000 100 10/1000 100

FCC Part 68

(March 1998)

1500 10/160 200 10/160 250 0

800 10/560 100 10/560 160 0

1500 9/720 † 37.5 5/320 † 200 0

1000 9/720 † 25 5/320 † 200 0

I3124 1500 0.5/700 37.5 0.2/310 200 0

ITU-T K20/K21 1500

4000 10/700 37.5

100 5/310 200 0

† FCC Part 68 terminology for the waveforms produced by the ITU-T recommendation K21 10/700 impulse generator

TISP3070H3SL THRU TISP3095H3SL, TISP3125H3SL THRU TISP3210H3SL

TISP3250H3SL THRU TISP3350H3SL

DUAL BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS

JANUARY 1999 - REVISED MAY 1999

PRODUCT INFORMATION

normal system voltage levels

The protector should not clip or limit the voltages that occur in normal system operation. For unusual

conditions, such as ringing without the line connected, some degree of clipping is permissible. Under this

condition, about 10 V of clipping is normally possib le without activating the ring trip circuit.

Figure 9 allows the calculation of the protector VDRM value at temperatures below 25 °C. The calculated value

should not be less than the maximum normal system voltages. The TISP329 0H3, with a VDRM of 220 V, can

be use d for the prote ction of ring generators pr oducing 105 V r ms of r ing on a batter y voltage of -58 V. The

peak ring voltage will be 58 + 1.414*105 = 206.5 V. However, this is the open circuit voltage and the

connection of the line and its equipment will reduce the peak voltage.

For the extreme case of an unconnected line, the temperature at which clipping begins can be calculated

using the data from Figure 9. To possibly clip, the VDRM value has to be 206.5 V. This is a reduction of the

220 V 25 °C VDRM value by a factor of 206.5/220 = 0.94. Figure 9 shows that a 0.94 reduction will occur at an

ambient temperature of -32 °C. In this example, the TISP3290H3 will allow normal equipment operation, even

on an open-circuit line, provided that the minimum expected ambient temperature does not fall below -32 °C.

JESD51 thermal measurement method

To standardise thermal measurements, the EIA (Electronic Industries Alliance) has created the JESD51

standard. Part 2 of the standard (JESD51-2, 1995) describes the test environment. This is a 0.0283 m3 (1 ft3)

cube which contains the test PCB (Printed Circuit Board) horizontally mounted at the centre. Part 3 of the

standar d (JESD51-3, 19 96) defines two test P CBs for su rface mount co mponents; on e for package s smaller

than 27 mm on a side and the other for packages up to 48 mm. The thermal measurements used the smaller

76.2 mm x 114.3 mm (3.0 “ x 4.5 “) PCB. The JESD51-3 PCBs are designed to have low effective thermal

conduc tivity (high ther mal resi stance) an d represe nt a worse case conditio n. The PCBs used in t he major ity

of applic ations wi ll achieve l ower val ues of ther m al resista nce and so c an diss ipate higher power levels than

indicated by the JESD51 values.

JANUARY 1999 - REVISED MAY 1999

TISP3070H3SL THRU TISP3095H3SL, TISP3125H3SL THRU TISP3210H3SL

TISP3250H3SL THRU TISP3350H3SL

DUAL BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS

PRODUCT INFORMATION

MECHANICAL DATA

SL003

3-pin plastic single-in-line package

This single-in-line package consists of a circuit mounted on a lead frame and encapsulated within a plastic com-

pound. The compound will withstand soldering temperature with no deformation, and circuit performance charac-

teristics will remain stable when operated in high humidity conditions. Leads require no additional cleaning or

processi ng when used in sol de re d assembly.

NOTES: A. Each pin centerline is located within 0,25 (0.010) of its true longitudinal position.

B. Body molding flash of up to 0,15 (0.006) may occur in the package lead plane.

1,854 (0.073) MAX

0,711 (0.028)

0,559 (0.022)

3 Pla ces

12 3

Pin Spacing

2,54 (0.100) T.P.

(see Note A)

2 Pla ces

12,9 (0.492)

MAX

4,57 (0.180)

MAX

6,60 (0.260)

6,10 (0.240)

0,356 (0.014)

0,203 (0.008)

3 Pla ces

SL003

10,2 (0.400) MAX

8,31 (0.327)

MAX

4,267 (0.168)

MIN

ALL LINEAR DIMENSIONS ARE IN MILL IMETERS AND PARENTHETICALLY IN INCHES

Index

Dot

MDXXAD

TISP3070H3SL THRU TISP3095H3SL, TISP3125H3SL THRU TISP3210H3SL

TISP3250H3SL THRU TISP3350H3SL

DUAL BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS

JANUARY 1999 - REVISED MAY 1999

PRODUCT INFORMATION

IMPORTANT NOTICE

Power I nnovatio ns Li mi te d ( PI ) r e serves the rig ht to ma ke ch an ges t o it s pro d uc ts o r to di sc on t inue any s em ic o nd uc tor p ro du ct

or service without notice, and advises its customers to verify, before placing orders, that the information being relied on is

current.

PI warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with

PI's sta nda rd warranty. Testing and ot her qualit y c on trol tec hn iqu es are utiliz e d to the ex tent PI deems nece ss ary to s up port this

warranty. Specific testing of all parameters of each device is not necessarily performed, except those mandated by government

requirements.

PI assumes no liability for applications assistance, customer product design, software performance, or infringement of patents

or services described herein. Nor is any license, either express or implied, granted under any patent right, copyright, design

right, or other intellectual property right of PI covering or relating to any combination, machine, or process in which such

semiconductor products or services might be or are used.

PI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, INTENDED, AUTHORISED, OR WARRANTED TO BE SUITABLE

FOR USE IN LIFE-SUPPORT APPLICATIONS, DEVICES OR SYSTEMS.