© 2009 Microchip Technology Inc. DS22153C-page 1
MCP9843/98243
Features
Meets JEDEC Specification
- MCP9843 - JC42.4-TSE3000B3
Temperature Sensor
- MCP98243 --> JC42.4-TSE2002B3
Temperature Sensor with 2 Kbit Serial
EEPROM for Serial Presence Detect (SPD)
2-wire I2C™/SMBus Interface
Available Packages:
- DFN-8, TDFN-8, UDFN-8, TSSOP-8
Temperature Sensor Features
Temperature-to-Digital Converter
Sensor Accuracy (Grade B):
-±0.2°C/±1°C (typ./max.) +75°C to +95°C
- ±0.5°C/±2°C (typ./max.) +40°C to +125°C
- ±1°C/±3°C (typ./max.) -20°C to +125°C
Specified VDD Range: 3.0V to 3.6V
Operating Current: 200 µA (typical)
•Operating V
DD Range: 2.7V to 5.5V
Serial EEPROM Features (MCP98243)
Specified VDD Range: 1.8V to 5.5V
Operating Current:
-Write 1.1 mA (typical) for 3.5 ms (typical)
- Read 100 µA (typical)
Permanent and Reversible Software Write Protect
Software Write Protection for the lower 1 Kbit
Organized as 1 block of 256 x 8-bit (2 Kbit)
Typical Applications
DIMM Modules for Servers, PCs, and Laptops
General Purpose Temperature Datalog
Description
Microchip Technology Inc.’s MCP9843/98243 digital
temperature sensors convert temperature from -40°C
and +125°C to a digital word. These sensors meet
JEDEC Specification JC42.4-TSE3000B3 and
JC42.4-TSE2002B3 Memory Module Thermal Sensor
Component. It provides an accuracy of ±0.2°C/±1°C
(typical/maximum) from +75°C to +95°C. In addition,
MCP98243 has an internal 256 Byte EEPROM which
can be used to store memory module and vendor
information.
The MCP9843/98243 digital temperature sensor
comes with user-programmable registers that provide
flexibility for DIMM temperature-sensing applications.
The registers allow user-selectable settings such as
Shutdown or Low-Power modes and the specification
of temperature Event boundaries. When the
temperature changes beyond the specified Event
boundary limits, the MCP9843/98243 outputs an Alert
signal at the Event pin. The user has the option of
setting the temperature Event output signal polarity as
either an active-low or active-high comparator output
for thermostat operation, or as a temperature Event
interrupt output for microprocessor-based systems.
The MCP98243 EEPROM is designed specifically for
DRAM DIMMs (Dual In-line Memory Modules) Serial
Presence Detect (SPD). The lower 128 Bytes (address
0x00 to 0x7F) can be Permanent Write Protected
(PWP) or Software Reversible Write Protected (SWP).
This allows DRAM vendor and product information to
be stored and write protected. The upper 128 bytes
(address 0x80 to 0xFF) can be used for general
purpose data storage. These addresses are not write
protected.
This sensor has an industry standard 2-wire,
I2C compatible serial interface, allowing up to eight
devices to be controlled in a single serial bus.
Package Types
DIMM MODULE
MCP9843/98243
8-Pin 2x3 DFN/TDFN/UDFN *
SDA
GND
Event
SCL
1
2
3
4
8-Pin TSSOP
A0 VDD
A1
A2
8
7
6
5
* Includes Exposed Thermal Pad (EP); see Table 3-1.
SCL
Event
SDA
A1
A2
1
2
3
4
8
7
6
5
GND
A0 VDD
EP
9
Memory Module Temperature Sensor w/ EEPROM for SPD
MCP9843/98243
DS22153C-page 2 © 2009 Microchip Technology Inc.
Sensor Typical Accuracy Performance
Note: This accuracy data from the production system represents the typical accuracy performance of the
MCP98242 Memory Module Temperature Sensor. The MCP98242 production methodology is also used for
the MCP9843/98243 to achieve the same typical accuracy performance.
0%
10%
20%
30%
40%
50%
-1.0
-0.8
-0.6
-0.4
-0.2
0.0
0.2
0.4
0.6
0.8
1.0
Temperature Accuracy (°C)
Occurrences
TA = +85°C
1,063,478 units
63 Production lots
Statistics:
Average = 0.003 °C
St. Dev = 0.13 °C
±3 Sigma = ±0.4 °C
MCP98243 VS. MCP98242
Feature MCP98243 MCP98242
Event Output in Shutdown Mode Event Output De-asserts Event Output Remains in previous
state. If the output asserts before
shutdown command, it remains
asserted during shutdown
I2C communication Timeout Range tOUT = 25 ms to 35 ms tOUT = 20 ms to 50 ms
I2C Maximum Bus Frequency 400 kHz 100 kHz
I2C SCL & SDA VIL/VIH voltage levels VIL_MAX=0.3*VDD, VIH_MIN=0.7*VDD VIL_MAX = 0.8V, VIH_MIN = 2.1V
VHV A0 range 7V to 12V 8V to 12V
I2C Spike Supression 50 ns
I2C input hysteresis 0.05VDD 0.5V
Device/Revision ID Register 0x2101 (hex) 0x2001
© 2009 Microchip Technology Inc. DS22153C-page 3
MCP9843/98243
1.0 ELECTRICAL
CHARACTERISTICS
Absolute Maximum Ratings †
VDD.................................................................................. 6.0V
Voltage at all Input/Output pins ............... GND – 0.3V to 6.0V
Pin A0 ................................................... GND – 0.3V to 12.5V
Storage temperature .....................................-65°C to +150°C
Ambient temp. with power applied ................-40°C to +125°C
Junction Temperature (TJ) .......................................... +150°C
ESD protection on all pins (HBM:MM) ................. (4 kV:300V)
Latch-Up Current at each pin (25°C) ....................... ±200 mA
†Notice: Stresses above those listed under “Maximum
ratings” may cause permanent damage to the device. This is
a stress rating only and functional operation of the device at
those or any other conditions above those indicated in the
operational listings of this specification is not implied.
Exposure to maximum rating conditions for extended periods
may affect device reliability.
TEMPERATURE SENSOR DC CHARACTERISTICS
Electrical Specifications: Unless otherwise indicated, VDD = 3.0V to 3.6V, GND = Ground,
and TA = -20°C to +125°C.
Parameters Sym Min Typ Max Unit Conditions
Temperature Sensor Accuracy
+75°C < TA +95°C TACY -1.0 ±0.2 +1.0 °C JC42.4 - TSE2002B3
Grade B Accuracy Specification
+40°C < TA +125°C -2.0 ±0.5 +2.0 °C
-20°C < TA +125°C -3.0 ±1 +3.0 °C
TA = -40°C -1 °C
Temperature Conversion Time
0.25°C/bit tCONV 65 125 ms 15 s/sec (typical) (See Section 5.2.4)
Power Supply
Specified Voltage Range VDD 3.0 3.6 V JC42.4 Specified Voltage Range
Operating Voltage Range VDD 2.7 5.5 V Note 1
Operating Current IDD_TS 200 500 µA EEPROM Inactive
Shutdown Current - MCP9843
MCP98243
ISHDN 1 2 µA EEPROM Inactive, I2C Bus Inactive
—1 3 µA
Power On Reset (POR) VPOR_TS 2.2 V Threshold for falling VDD voltage
Power Supply Rejection,
TA = +25°C
Δ°C/ΔVDD —±0.3 °C/VV
DD = 2.7V to 5.5V
±0.15 °C VDD = 3.3V+150 mVPP AC
(0 to 1 MHz)
Event Output (Open-Drain output, external pull-up or pull-down resistor required), see Section 5.2.3
High-level Current (leakage) IOH —— 1 µAV
OH = VDD (Active-Low, Pull-up
Resistor)
Low-level Voltage VOL —— 0.4 VI
OL= 3 mA (Active-Low, Pull-up
Resistor)
Low-level Current (leakage) IOL —— 1 µAV
OL = VSS (Active-High, Pull-down
Resistor)
High-level Voltage VOH ——V
DD-0.5 V IOH= 3 mA (Active-High, Pull-down
Resistor)
Thermal Response, from +25°C (Air) to +125°C (oil bath)
DFN/UDFN/TDFN-8 tRES 0.7 s Time to 63% (89°C)
TSSOP-8 1.4 s
Note 1: Characterized but not production tested. Also, see Section 2.0 “Typical Performance Curves”.
MCP9843/98243
DS22153C-page 4 © 2009 Microchip Technology Inc.
MCP98243 EEPROM DC CHARACTERISTICS
Electrical Specifications: Unless otherwise indicated, VDD = 1.8V to 5.5V, GND = Ground,
and TA = -20°C to +125°C.
Parameters Sym Min Typ Max Unit Conditions
Power Supply
Operating Voltage Range VDD 1.8 5.5 V
Current, EEPROM write IDD_EE 1100 2000 µA Sensor in Shutdown Mode (for tWC),
(Note 1)
Current, EEPROM read IDD_EE 100 500 µA Sensor in Shutdown Mode (Note 1)
Power On Reset (POR) VPOR_EE 1.6 V EEPROM
Write Cycle time (byte/page) tWC —3 5 ms
Endurance TA = +25°C 1M cycles Number of Write Cycles, VDD = 5V (Note 2)
EEPROM Write Temperature EEWRITE 0— 85 °C
EEPROM Read Temperature EEREAD -40 125 °C For minimum read temperature, see Note 2
Write Protect Voltage
SWP and CWP Voltage VHV 7 12 V Applied at A0 pin (Note 3)
PWP Voltage VDD —V
Note 1: For VDD ranges of 1.8V to the temperature sensor VPOR_TS, the temperature sensor becomes partially biased and
consumes 80 µA (typical) until the sensor POR resets and acknowledges a shutdown command. See Figure 2-15.
2: Characterized but not production tested. For endurance estimates in a specific application, please consult the Total
Endurance™ Model which can be obtained from Microchip’s web site at www.microchip.com.
3: The range of voltage applied at A0 pin for Permanent Write Protect is GND to VDD + 1V. See Figure 2-13 and
Section 5.3.3 “Write Protection”.
INPUT/OUTPUT PIN DC CHARACTERISTICS (NOTE 1)
Electrical Specifications: Unless otherwise indicated, VDD = 1.8V to 5.5V, GND = Ground and
TA = -20°C to +125°C.
Parameters Sym Min Typ Max Units Conditions
Serial Input/Output (SCL, SDA, A0, A1, A2) (Note 2)
Input
High-level Voltage VIH 0.7VDD ——V
Low-level Voltage VIL ——0.3V
DD V
Input Current IIN ±5 µA SDA and SCL only
Input Impedance (A0, A1, A2) ZIN —1MΩVIN > VIH
Input Impedance (A0, A1, A2) ZIN —200kΩVIN < VIL
Output (SDA only)
Low-level Voltage VOL ——0.4VI
OL= 3 mA
High-level Current (leakage) IOH —— 1µAV
OH = VDD
Low-level Current IOL 6—mAV
OL = 0.6V
Capacitance CIN —5pF
SDA and SCL Inputs
Hysteresis VHYST 0.05VDD —VV
DD > 2V
—0.1V
DD —VV
DD < 2V
Spike Supression TSP 50 ns
Note 1: These specifications apply for the Temperature Sensor and EEPROM.
2: For VDD ranges of 1.8V to the temperature sensor VPOR_TS, the temperature sensor becomes partially
biased and consumes 80 µA (typical) until the sensor POR resets and acknowledges a shutdown
command. See Figure 2-15.
© 2009 Microchip Technology Inc. DS22153C-page 5
MCP9843/98243
SENSOR AND EEPROM SERIAL INTERFACE TIMING SPECIFICATIONS
Electrical Specifications: Unless otherwise indicated, GND = Ground, TA = -20°C to +125°C, and CL = 80 pF
(Note 1, 5).
VDD= 1.8V to 5.5V VDD= 2.2V to 5.5V
Parameters Sym Min Max Min Max Units Conditions
2-Wire I2C Interface
Serial port frequency fSCL 10 100 10 400 kHz Note 2, 4
Low Clock tLOW 4700 1300 —nsNote 2
High Clock tHIGH 4000 600 —nsNote 2
Rise time tR 1000 20 300 ns
Fall time tF20 300 20 300 ns
Data in Setup time tSU:DI 250 100 —nsNote 3
Data in Hold time tHD:DI 0—0—nsNote 6
Data out Hold time tHD:DO 200 900 200 900 ns Note 4
Start Condition Setup time tSU:STA 4700 600 —ns
Start Condition Hold time tHD:STA 4000 600 —ns
Stop Condition Setup time tSU:STO 4000 600 —ns
Bus idle tB:FREE 4700 1300 —ns
Time out (Sensor Only) tOUT ——25 35 ms VDD= 3.0V to 3.6V
Bus Capacitive load Cb——400 pf
Note 1: All values referred to VIL MAX and VIH MIN levels.
2: If tLOW > tOUT or tHIGH > tOUT
, the temperature sensor I2C interface will time out. A Repeat Start command
is required for communication.
3: This device can be used in a Standard-mode I2C-bus system, but the requirement tSU:DAT 250 ns must
be met. This device does not stretch SCL Low time. It outputs the next data bit to the SDA line within
tRMAX
+ tSU:DI MIN = 1000 ns + 250 ns = 1250 ns (according to the Standard-mode I2C-bus specification)
before the SCL line is released.
4: As a transmitter, the device provides internal minimum delay time tHD:DAT MIN to bridge the undefined
region (min. 300 ns) of the falling edge of SCL tF MAX to avoid unintended generation of Start or Stop
conditions.
5: For VDD ranges of 1.8V to the temperature sensor VPOR_TS, the temperature sensor becomes partially
biased and consumes 100 µA (typical) until the sensor POR resets and acknowledges a shutdown com-
mand.
6: As a receiver, SDA should not be sampled at the falling edge of SCL. SDA can transition tHD:DI 0ns after
SCL toggles Low.
MCP9843/98243
DS22153C-page 6 © 2009 Microchip Technology Inc.
TEMPERATURE CHARACTERISTICS
TIMING DIAGRAM
GRAPHICAL SYMBOL DESCRIPTION
Electrical Specifications: Unless otherwise indicated, VDD = 1.8V to 5.5V for the EEPROM, VDD = 3.0V to 3.6V for
the Temperature Sensor, and GND = Ground.
Parameters Sym Min Typ Max Units Conditions
Temperature Ranges
Specified Temperature Range TA-20 +125 °C Note 1
Operating Temperature Range TA-40 +125 °C
Storage Temperature Range TA-65 +150 °C
Thermal Package Resistances
Thermal Resistance, 8L-DFN θJA —68—°C/W
Thermal Resistance, 8L-TDFN θJA 52.5 °C/W
Thermal Resistance, 8L-TSSOP θJA 139 °C/W
Thermal Resistance, 8L-UDFN θJA —41°C/W
Note 1: Operation in this range must not cause TJ to exceed Maximum Junction Temperature (+150°C).
tSU:STO
tSU:DI
tSU:DI
tSU:STO
tB:FREE
SCL
SDA
tHD:DI / tHD:DO
tHIGH
tLOW
tOUT
tR, tF
Start Condition Data Transmission Stop Condition
VDD VIH
VIL
IIN
Voltage
Current
time
VDD
IOH
Voltage
Current
time
INPUT OUTPUT
VOL
IOL
© 2009 Microchip Technology Inc. DS22153C-page 7
MCP9843/98243
2.0 TYPICAL PERFORMANCE CURVES
Note: Unless otherwise indicated, VDD = 2.7V to 5.5V, GND = Ground, SDA/SCL pulled-up to VDD, and
TA = -40°C to +125°C.
FIGURE 2-1: Average Temperature
Accuracy.
FIGURE 2-2: Temperature Accuracy
Histogram, TA = +95°C.
FIGURE 2-3: Temperature Accuracy
Histogram, TA = +75°C.
FIGURE 2-4: Supply Current vs.
Temperature.
FIGURE 2-5: Serial Bus Time-Out vs.
Temperature.
FIGURE 2-6: Power-on Reset Threshold
Voltage vs. Temperature.
Note: The graphs and tables provided following this note are a statistical summary based on a limited number of
samples and are provided for informational purposes only. The performance characteristics listed herein
are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified
operating range (e.g., outside specified power supply range) and therefore outside the warranted range.
-3.0
-2.0
-1.0
0.0
1.0
2.0
3.0
-40 -20 0 20 40 60 80 100 120
TA (°C)
Temperature Accuracy (°C)
VDD= 3.3V
Spec. Limits
0%
10%
20%
30%
40%
50%
60%
70%
-1.00
-0.75
-0.50
-0.25
0.00
0.25
0.50
0.75
1.00
Temperature Accuracy (°C)
Occurrences
TA = +95°C
VDD = 3.3V
221 units
0%
10%
20%
30%
40%
50%
60%
70%
-1.00
-0.75
-0.50
-0.25
0.00
0.25
0.50
0.75
1.00
Temperature Accuracy (°C)
Occurrences
TA = +75°C
VDD = 3.3V
221 units
1
10
100
1000
10000
-40 -20 0 20 40 60 80 100 120
TA (°C)
IDD (µA)
EEPROM Write (Sensor in Shutdown Mode)
Sensor (EEPROM Inactive)
EEPROM Read (Sensor in Shutdown Mode)
25
30
35
-40-200 20406080100120
TA (°C)
tOUT (ms)
VDD = 3.3V to 3.6V
0
0.5
1
1.5
2
2.5
3
-40-200 20406080100120
TA (°C)
VPOR (V)
VPOR_TS
VPOR_EE
MCP9843/98243
DS22153C-page 8 © 2009 Microchip Technology Inc.
Note: Unless otherwise indicated, VDD = 2.7V to 5.5V, GND = Ground, SDA/SCL pulled-up to VDD, and
TA = -40°C to +125°C.
FIGURE 2-7: Event and SDA VOL vs.
Temperature.
FIGURE 2-8: Conversion Rate vs.
Temperature.
FIGURE 2-9: Power Supply Rejection vs.
Frequency.
FIGURE 2-10: SDA IOL vs. Temperature.
FIGURE 2-11: Temperat ure Accuracy vs.
VDD.
FIGURE 2-12: Package Thermal
Response.
0
0.1
0.2
0.3
0.4
-40 -20 0 20 40 60 80 100 120
TA (°C)
SDA and Event Output (V)
Event VOL
SDA VOL
IOH = IOL
= 3 mA
Event (VDD - VOH)
-3.0
-2.0
-1.0
0.0
1.0
2.0
3.0
-40 -20 0 20 40 60 80 100 120
TA (°C)
Temperature Accuracy (°C)
Δ°C/ΔVDD
= 0.4°C/
V
VDD
= 2.7V
VDD
= 3.0V
VDD
= 3.6V
VDD
= 5.5V
0%
20%
40%
60%
80%
100%
120%
-2 0 2 4 6 8 10 12 14 16
Time (s)
Thermal Response (%)
22°C (Air) to 125°C (Oil bath)
TSSOP-8
DFN-8
© 2009 Microchip Technology Inc. DS22153C-page 9
MCP9843/98243
Note: Unless otherwise indicated, VDD = 2.7V to 5.5V, GND = Ground, SDA/SCL pulled-up to VDD, and
TA = -40°C to +125°C.
FIGURE 2-13: SWP/CWP/PWP High
Voltage Range.
FIGURE 2-14: Shutdown Current vs.
Temperature.
FIGURE 2-15: Shutdown Curren t vs. V DD.
0
2
4
6
8
10
12
1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5
VDD (V)
VHV (V)
Maximum PWP Voltage (VDD + 1V)
Minimum SWP/CWP Voltage
VHV applied at A0 pin.
See Table 5-4
for Pins
A1 and A2 connection
No
SWP/CWP/PWP
function within
this range
0.00
0.50
1.00
1.50
2.00
2.50
3.00
-40 -20 0 20 40 60 80 100 120
TA (°C )
ISHDN (µA)
MCP9843/98243
DS22153C-page 10 © 2009 Microchip Technology Inc.
NOTES:
© 2009 Microchip Technology Inc. DS22153C-page 11
MCP9843/98243
3.0 PIN DESCRIPTION
The descriptions of the pins are listed in Table 3-1.
TABLE 3-1: PIN FUNCTION TABLES
3.1 Address Pins (A0, A1, A2)
These pins are device address input pins.
The address pins correspond to the Least Significant
bits (LSb) of address bits. The Most Significant bits
(MSb) (A6, A5, A4, A3). This is shown in Tab l e 3- 2 .
The A0 Address pin is a multi-function pin. This input
pin is also used for high voltge input VHV to enable the
EEPROM Software Write Protect feature, see
Section 5.3.3 “Write Protection”.
All address pin have an internal pull-down resistors.
3.2 Ground Pin (GND)
The GND pin is the system ground pin.
3.3 Serial Data Line (SDA)
SDA is a bidirectional input/output pin, used to serially
transmit data to/from the host controller. This pin
requires a pull-up resistor. (See Section 4.0 “Serial
Communication”).
3.4 Serial Clock Line (SCL)
The SCL is a clock input pin. All communication and
timing is relative to the signal on this pin. The clock is
generated by the host or master controller on the bus.
(See Section 4.0 “Serial Communication”).
3.5 Temperature Alert, Open-Drain
Output (Event)
The MCP9843/98243 temperature Event output pin is
an open-drain output. The device outputs a signal
when the ambient temperature goes beyond the user-
programmed temperature limit. (see Section 5.2.3
“Event Output Configuration”).
3.6 Power Pin (VDD)
VDD is the power pin. The operating voltage range, as
specified in the DC electrical specification table, is
applied on this pin.
3.7 Exposed Thermal Pad (EP)
There is an internal electrical connection between the
Exposed Thermal Pad (EP) and the GND pin; they can
be connected to the same potential on the Printed Cir-
cuit Board (PCB). This provides better thermal conduc-
tion from the PCB to the die.
MCP9843/98243
Symbol Description
DFN, TDFN,
UDFN TSSOP
1 1 A0 Slave Address and EEPROM Software Write Protect high voltage
input (VHV)
2 2 A1 Slave Address
3 3 A2 Slave Address
4 4 GND Ground
5 5 SDA Serial Data Line
6 6 SCL Serial Clock Line
7 7 Event Temperature Alert Output
88 V
DD Power Pin
9 EP Exposed Thermal Pad (EP); can be connected to GND.
TABLE 3-2: MCP9843/98243 ADDRESS
BYTE
Device Address Code Slave
Address
A6 A5 A4 A3 A2 A1 A0
Sensor 0 0 1 1
XXX
EEPROM 1 0 1 0
EEPROM
Write Protect
0110
Note: User-selectable address is shown by X.
MCP9843/98243
DS22153C-page 12 © 2009 Microchip Technology Inc.
NOTES:
© 2009 Microchip Technology Inc. DS22153C-page 13
MCP9843/98243
4.0 SERIAL COMMUNICATION
4.1 2-Wire Standard Mode I2C™
Protocol-Compatible Interface
The MCP9843/98243 serial clock input (SCL) and the
bidirectional serial data line (SDA) form a 2-wire
bidirectional Standard mode I2C compatible
communication port (refer to the Input/Output Pin DC
Characteristics (Note 1) Table and Sensor And
EEPROM Serial Interface Timing Specifications
Table).
The following bus protocol has been defined:
TABLE 4-1: MCP9843/98243 SERIAL BUS
PROTOCOL DESCRIPTIONS
4.1.1 DATA TRANSFER
Data transfers are initiated by a Start condition
(START), followed by a 7-bit device address and a
read/write bit. An Acknowledge (ACK) from the slave
confirms the reception of each byte. Each access must
be terminated by a Stop condition (STOP).
Repeated communication is initiated after tB-FREE.
This device does not support sequential register read/
write. Each register needs to be addressed using the
Register Pointer.
This device supports the Receive Protocol. The
register can be specified using the pointer for the initial
read. Each repeated read or receive begins with a Start
condition and address byte. The MCP9843/98243
retain the previously selected register. Therefore, they
output data from the previously-specified register
(repeated pointer specification is not necessary).
4.1.2 MASTER/SLAVE
The bus is controlled by a master device (typically a
microcontroller) that controls the bus access and
generates the Start and Stop conditions. The
MCP9843/98243 is a slave device and does not control
other devices in the bus. Both master and slave
devices can operate as either transmitter or receiver.
However, the master device determines which mode is
activated.
4.1.3 START/STOP CONDITION
A high-to-low transition of the SDA line (while SCL is
high) is the Start condition. All data transfers must be
preceded by a Start condition from the master. A low-
to-high transition of the SDA line (while SCL is high)
signifies a Stop condition.
If a Start or Stop condition is introduced during data
transmission, the MCP9843/98243 releases the bus.
All data transfers are ended by a Stop condition from
the master.
4.1.4 ADDRESS BYTE
Following the Start condition, the host must transmit an
8-bit address byte to the MCP9843/98243. The
address for the MCP9843/98243 Temperature Sensor
is ‘0011,A2,A1,A0’ in binary, where the A2, A1 and
A0 bits are set externally by connecting the
corresponding pins to VDD1’ or GND ‘0’. The 7-bit
address transmitted in the serial bit stream must match
the selected address for the MCP9843/98243 to
respond with an ACK. Bit 8 in the address byte is a
read/write bit. Setting this bit to ‘1’ commands a read
operation, while ‘0’ commands a write operation (see
Figure 4-1).
FIGURE 4-1: Device Addressing.
Term Description
Master The device that controls the serial bus,
typically a microcontroller.
Slave The device addressed by the master,
such as the MCP9843/98243.
Transmitter Device sending data to the bus.
Receiver Device receiving data from the bus.
START A unique signal from master to initiate
serial interface with a slave.
STOP A unique signal from the master to
terminate serial interface from a slave.
Read/Write A read or write to the MCP9843/98243
registers.
ACK A receiver Acknowledges (ACK) the
reception of each byte by polling the
bus.
NAK A receiver Not-Acknowledges (NAK) or
releases the bus to show End-of-Data
(EOD).
Busy Communication is not possible
because the bus is in use.
Not Busy The bus is in the idle state, both SDA
and SCL remain high.
Data Valid SDA must remain stable before SCL
becomes high in order for a data bit to
be considered valid. During normal
data transfers, SDA only changes state
while SCL is low.
123456789
SCL
SDA 0 0 1 1 A2 A1 A0
Start
Address Byte
Slave
Address R/W
MCP9843/98243 Response
Code Address
A
C
K
MCP9843/98243
DS22153C-page 14 © 2009 Microchip Technology Inc.
4.1.5 DATA VALID
After the Start condition, each bit of data in
transmission needs to be settled for a time specified by
tSU-DATA before SCL toggles from low-to-high (see
“Sensor And EEPROM Serial Interface Timing
Specifications” on Page 5).
4.1.6 ACKNOWLEDGE (ACK/NAK)
Each receiving device, when addressed, is obliged to
generate an ACK bit after the reception of each byte.
The master device must generate an extra clock pulse
for ACK to be recognized.
The acknowledging device pulls down the SDA line for
tSU-DATA before the low-to-high transition of SCL from
the master. SDA also needs to remain pulled down for
tH-DATA after a high-to-low transition of SCL.
During read, the master must signal an End-of-Data
(EOD) to the slave by not generating an ACK bit (NAK)
once the last bit has been clocked out of the slave. In
this case, the slave will leave the data line released to
enable the master to generate the Stop condition.
4.1.7 TIME OUT (MCP9843/98243,
SENSOR ONLY)
If the SCL stays low or high for time specified by tOUT
,
the MCP9843/98243 temperature sensor resets the
serial interface. This dictates the minimum clock speed
as specified in the specification. However, the
EEPROM does not reset the serial interface.
Therefore, the master can hold the clock indefinitely to
process data from the EEPROM.
© 2009 Microchip Technology Inc. DS22153C-page 15
MCP9843/98243
5.0 FUNCTIONAL DESCRIPTION
The MCP9843/98243 temperature sensors consists of
a band-gap type temperature sensor, a Delta-Sigma
Analog-to-Digital Converter (ΣΔ ADC), user-program-
mable registers and a 2-wire I2C protocol compatible
serial interface. Figure 5-1 shows a block diagram of
the register structure.
FIGURE 5-1: Functional Block Diagram.
Clear Event
0.5°C/bit
0.25°C/bit
0.125°C/bit
0.0625°C/bit
Temperature
TUPPER
TLOWER
Configuration
ΣΔ ADC
Band-Gap
Temperature
Sensor
Event Status
Output Control
Critical Event only
Event Polarity
Event Comp/Int
TCRIT
Capability
Temp. Range
Accuracy
Output Feature
Register
Pointer
Critical Trip Lock
Alarm Win. Lock Bit
Shutdown
Hysteresis
Manufacturer ID
Resolution
Memory
Control
Logic
Address
Standard
Array
Write
Write Protect
Circuitry
Sense Amp
R/W Control
Protected
(00h-7Fh)
(80h-FFh)
Device ID/Rev
Selected Resolution
HV Generator
Decoder
Array
X
Address Decoder
Y
Standard I2C
Interface
A0 A1 A2 Event SDA SCL VDD GND
I2C Bus Time-out
Accepts VHV
Shutdown Status
MCP9843/98243 Temperature Sensor MCP98243 EEPROM
MCP9843/98243
DS22153C-page 16 © 2009 Microchip Technology Inc.
5.1 Registers
The MCP9843/98243 device has several registers that
are user-accessible. These registers include the
Capability register, Configuration register, Event
Temperature Upper-Boundary and Lower-Boundary
Trip registers, Critical Temperature Trip register,
Temperature register, Manufacturer Identification
register and Device Identification register.
The Temperature register is read-only, used to access
the ambient temperature data. The data is loaded in
parallel to this register after tCONV. The Event
Temperature Upper-Boundary and Lower-Boundary
Trip registers are read/writes. If the ambient
temperature drifts beyond the user-specified limits, the
MCP9843/98243 device outputs a signal using the
Event pin (refer to Section 5.2.3 “Event Output
Configuration”). In addition, the Critical Temperature
Trip register is used to provide an additional critical
temperature limit.
The Capability register is used to provide bits
describing the MCP9843/98243’s capability in
measurement resolution, measurement range and
device accuracy. The device Configuration register
provides access to configure the MCP9843/98243’s
various features. These registers are described in
further detail in the following sections.
The registers are accessed by sending a Register
Pointer to the MCP9843/98243 using the serial
interface. This is an 8-bit write-only pointer. However,
the four Least Significant bits are used as pointers and
all unused bits (bits 7-4) need to be cleared or set to ‘0’.
Register 5-1 describes the pointer or the address of
each register.
REGISTER 5-1: REGISTER POINTER (WRITE ONLY)
W-0 W-0 W-0 W-0 W-0 W-0 W-0 W-0
Pointer Bits
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 7-4 Writable Bits: Write0’’
bit 3-0 Pointer Bits:
0000 = Capability register
0001 = Configuration register (CONFIG)
0010 = Event Temperature Upper-Boundary Trip register (TUPPER)
0011 = Event Temperature Lower-Boundary Trip register (TLOWER)
0100 = Critical Temperature Trip register (TCRIT)
0101 = Temperature register (TA)
0110 = Manufacturer ID register
0111 = Device ID/Revision register
1000 = Resolution register
1XXX = Reserved (This device has additional registers that are reserved for test and calibration. If
these registers are accessed, the device may not perform according to the specification.)
© 2009 Microchip Technology Inc. DS22153C-page 17
MCP9843/98243
TABLE 5-1: BIT ASSIGNMENT SUMMARY FOR ALL TEMPERATURE SENSOR REGISTERS
(SEE SECTION 5.4)
Register
Pointer
(Hex)
MSB/
LSB
Bit Assignment
76543210
0x00 MSB 0 0 0 0 0 0 0 0
LSB SHDN Status tOUT Range VHV Resolution Range Accuracy Event
0x01 MSB 0 0 0 0 0 Hysteresis SHDN
LSB Crt Loc Win Loc Int Clr Evt Stat Evt Cnt Evt Sel Evt Pol Evt Mod
0x02 MSB 0 0 0 SIGN 27°C 26°C 25°C 24°C
LSB 23°C 22°C 21°C 20°C 2-1°C 2-2°C 0 0
0x03 MSB 0 0 0 SIGN 27°C 26°C 25°C 24°C
LSB 23°C 22°C 21°C 20°C 2-1°C 2-2°C 0 0
0x04 MSB 0 0 0 SIGN 27°C 26°C 25°C 24°C
LSB 23°C 22°C 21°C 20°C 2-1°C 2-2°C 0 0
0x05 MSB TA TCRIT TA > TUPPER TA < TLOWER SIGN 27°C 26°C 25°C 24°C
LSB 23°C 22°C 21°C 20°C 2-1°C 2-2°C 2-3°C 2-4°C
0x06 MSB 0 0 0 0 0 0 0 0
LSB 0 1 0 1 0 1 0 0
0x07
MCP98243
MSB 0 0 1 0 0 0 0 1
LSB 0 0 0 0 0 0 0 1
0x07
MCP9843
MSB 0 0 0 0 0 0 0 0
LSB 0 0 0 0 0 0 0 1
0x08 LSB 0 0 0 0 0 0 0 1
MCP9843/98243
DS22153C-page 18 © 2009 Microchip Technology Inc.
5.1.1 CAPABILITY REGISTER
This is a read-only register used to identify the
temperature sensor capability. For example, the
MCP9843/98243 device is capable of providing
temperature at 0.25°C resolution, measuring
temperature below and above 0°C, providing ±1°C and
±2°C accuracy over the active and monitor temperature
ranges (respectively) and providing user-
programmable temperature event boundary trip limits.
Register 5-2 describes the Capability register. These
functions are described in further detail in the following
sections.
REGISTER 5-2: CAPABILITY REGISTER (READ-ONLY) ADDRESS ‘0000 0000’b
U-0 U-0 U-0 U-0 U-0 U-0 U-0 U-0
————
bit 15 bit 8
R-1 R-1 R-1 R-0 R-1 R-1 R-1 R-1
SHDN Status tOUT Range VHV Resolution Meas Range Accuracy Temp Alarm
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 15-8 Unimplemented: Read as ‘0
bit 7 Event output status during Shutdown (SHDN Status):
0 = Event output remains in previous state. If the output asserts before shutdown command, it
remains asserted during shutdown.
1 = Event output de-asserts during shutdown. After shutdown, it takes tCONV to re-assert the Event
output (power-up default)
bit 6 I2C Bus time-out (tOUT Range):
0 = Bus time-out range is 10 ms to 60 ms
1 = Bus time-out range is 25 ms to 35 ms (power-up default)
bit 5 High Voltage Input
0 = Pin A0 does not accept High Voltage
1 = Pin A0 accepts High Voltage for the EEPROM Write Protect feature (power-up default)
bit 4-3 Resolution:
00 = 0.5°C
01 = 0.25°C (power up default)
10 = 0.125°C
11 = 0.0625°C
These bits reflect the selected resolution (see Section 5.2.4 “Temperature Resolution”)
bit 2 Temperature Measurement Range (Meas. Range):
0 =T
A = 0 (decimal) for temperature below 0°C
1 = The part can measure temperature below 0°C (power-up default)
© 2009 Microchip Technology Inc. DS22153C-page 19
MCP9843/98243
FIGURE 5-2: Timing Diagram for Reading the Capability Register (See Section 4.0 “Serial
Communication”).
bit 1 Accuracy:
0 = Accuracy ±2°C from +75°C to +95°C (Active Range) and ±3°C from +40°C to +125°C
(Monitor Range)
1 = Accuracy ±1°C from +75°C to +95°C (Active Range) and ±2°C from +40°C to +125°C
(Monitor Range)
bit 0 Temperature Alarm:
0 = No defined function (This bit will never be cleared or set to ‘0’)
1 = The part has temperature boundary trip limits (TUPPER/TLOWER/TCRIT registers) and a
temperautre event output (JC 42.4 required feature)
REGISTER 5-2: CAPABILITY REGISTER (READ-ONLY) ADDRESS ‘0000 0000’b (CONTINUED)
SDA A
C
K
0011A
Capability Pointer
0000
A
C
K
S2
A
1
A
0
12345678 12345678
SCL
0
Address Byte
A
C
K
0011A
MSB Data
A
C
K
N
A
K
S P
2
A
1
A
0
12345678 12345678 12345678
Address Byte LSB Data
R
MCP9843/98243 MCP9843/98243
MCP9843/98243 Master Master
W
SDA
SCL
000
00000000 00001111
MCP9843/98243
DS22153C-page 20 © 2009 Microchip Technology Inc.
5.1.2 SENSOR CONFIGURATION
REGISTER (CONFIG)
The MCP9843/98243 device has a 16-bit Configuration
register (CONFIG) that allows the user to set various
functions for a robust temperature monitoring system.
Bits 10 thru 0 are used to select Event output boundary
hysteresis, device Shutdown or Low-Power mode,
temperature boundary and critical temperature lock,
temperature Event output enable/disable. In addition,
the user can select the Event output condition (output
set for TUPPER and TLOWER temperature boundary or
TCRIT only), read Event output status and set Event
output polarity and mode (Comparator Output or
Interrupt Output mode).
The temperature hysteresis bits 10 and 9 can be used
to prevent output chatter when the ambient
temperature gradually changes beyond the user-
specified temperature boundary (see Section 5.2.2
“Temperature Hysteresis (THYST)”. The Continuous
Conversion or Shutdown mode is selected using bit 8.
In Shutdown mode, the band gap temperature sensor
circuit stops converting temperature and the Ambient
Temperature register (TA) holds the previous
successfully converted temperature data (see
Section 5.2.1 “Shutdown Mode”). Bits 7 and 6 are
used to lock the user-specified boundaries TUPPER,
TLOWER and TCRIT to prevent an accidental rewrite.
Bits 5 thru 0 are used to configure the temperature
Event output pin. All functions are described in
Register 5-3 (see Section 5.2.3 “Event Output
Configuration”).
REGISTER 5-3: CONFIGURATION REGISTER (CONFIG) ADDRESS ‘0000 0001’b
U-0 U-0 U-0 U-0 U-0 R/W-0 R/W-0 R/W-0
—— T
HYST SHDN
bit 15 bit 8
R/W-0 R/W-0 R/W-0 R-0 R/W-0 R/W-0 R/W-0 R/W-0
Crit. Lock Win. Lock Int. Clear Event Stat. Event Cnt. Event Sel. Event Pol. Event Mod.
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 15-11 Unimplemented: Read as ‘0
bit 10-9 TUPPER and TLOWER Limit Hysteresis (THYST):
00 = 0°C (power-up default)
01 = 1.5°C
10 = 3.0°C
11 = 6.0°C
(Refer to Section 5.2.3 “Event Output Configuration”)
This bit can not be altered when either of the lock bits are set (bit 6 and bit 7).
This bit can be programmed in shutdown mode.
bit 8 Shutdown Mode (SHDN):
0 = Continuous Conversion (power-up default)
1 = Shutdown (Low-Power mode)
In shutdown, all power-consuming activities are disabled, though all registers can be written to or read.
Event output will de-assert.
This bit cannot be set ‘1when either of the lock bits is set (bit 6 and bit 7). However, it can be cleared
0’ for Continuous Conversion while locked (Refer to Section 5.2.1 “Shutdown Mode”).
© 2009 Microchip Technology Inc. DS22153C-page 21
MCP9843/98243
bit 7 TCRIT Lock Bit (Crit. Lock):
0 = Unlocked. TCRIT register can be written. (power-up default)
1 = Locked. TCRIT register can not be written
When enabled, this bit remains set ‘1’ or locked until cleared by internal reset (Section 5.4 “Summary
of Power-on Default”). This bit does not require a double-write.
This bit can be programmed in shutdown mode.
bit 6 TUPPER and TLOWER Window Lock Bit (Win. Lock):
0 = Unlocked. TUPPER and TLOWER registers can be written. (power-up default)
1 = Locked. TUPPER and TLOWER registers can not be written
When enabled, this bit remains set ‘1’ or locked until cleared by power-on Respell (Section 5.4 “Sum-
mary of Power-on Default”). This bit does not require a double-write.
This bit can be programmed in shutdown mode.
bit 5 Interrupt Clear (Int. Clear) Bit:
0 = No effect (power-up default)
1 = Clear interrupt output. When read this bit returns 0
This bit clears the Interrupt flag which de-asserts Event output. In shutdown mode, the Event output is
always de-asserted. Therefore, setting this bit in shutdown mode clears the interrupt after the device
returns to normal operation.
bit 4 Event Output Status (Event Stat.) Bit:
0 = Event output is not asserted by the device (power-up default)
1 = Event output is asserted as a comparator/Interrupt or critical temperature output
In shutdown mode this bit will clear because Event output is always de-asserted in shutdown mode.
bit 3 Event Output Control (Event Cnt.) Bit:
0 = Event output Disabled (power-up default)
1 = Event output Enabled
This bit can not be altered when either of the lock bits is set (bit 6 and bit 7).
This bit can be programmed in shutdown mode, but Event output will remain de-asserted.
bit 2 Event Output Select (Event Sel.) Bit:
0 = Event output for TUPPER, TLOWER and TCRIT (power-up default)
1 = T
A TCRIT only. (TUPPER and TLOWER temperature boundaries are disabled.)
When the Alarm Window Lock bit is set, this bit cannot be altered until unlocked (bit 6).
This bit can be programmed in shutdown mode, but Event output will remain de-asserted.
bit 1 Event Output Polarity (Event Pol.) Bit:
0 = Active low (power-up default. Pull-up resistor required) See Section 5.2.3 “Event Output
Configuration”
1 = Active-high (Pull-down resistor required) See Section 5.2.3 “Event Output Configuration”
This bit cannot be altered when either of the lock bits is set (bit 6 and bit 7).
This bit can be programmed in shutdown mode, but Event output will remain de-asserted.
bit 0 Event Output Mode (Event Mod.) Bit:
0 = Comparator output (power-up default)
1 = Interrupt output
This bit cannot be altered when either of the lock bits is set (bit 6 and bit 7).
This bit can be programmed in shutdown mode, but Event output will remain de-asserted.
REGISTER 5-3: CONFIGURATION REGISTER (CONFIG) ADDRESS ‘0000 0001’b
MCP9843/98243
DS22153C-page 22 © 2009 Microchip Technology Inc.
FIGURE 5-3: T iming Diagram for Writing to the Configuration Re gister (See Section 4.0 “Serial
Communication”.
Writing to the CONFIG Register to Enable the Event Output pin <0000 0000 0000 1000>b.
SDA A
C
K
0011A0000
A
C
K
S2
A
1
A
0
12345678 12345678
SCL
0
Address Byte
W
MCP9843/98243 MCP9843/98243
MSB Data
A
C
K
A
C
KP
12345678 12345678
LSB Data
Configuration Pointer
MCP9843/98243 MCP9843/98243
001
00000000 00001000
Note: this is an example routine:
i2c_start(); // send START command
i2c_write(AddressByte & 0xFE); //WRITE Command
//also, make sure bit 0 is cleared ‘0’
i2c_write(0x01); // Write CONFIG Register
i2c_write(0x00); // Write data
i2c_write(0x08); // Write data
i2c_stop(); // send STOP command
© 2009 Microchip Technology Inc. DS22153C-page 23
MCP9843/98243
FIGURE 5-4: Timing Diagram for Reading from the Configuration Register (See Section 4.0
“Serial Communication”).
SDA A
C
K
0011A
Configuration Pointer
0000
A
C
K
S2
A
1
A
0
12345678 12345678
SCL
0
Address Byte
A
C
K
0011A
MSB Data
A
C
K
N
A
K
S P
2
A
1
A
0
12345678 12345678 12345678
Address Byte LSB Data
R
MCP9843/98243 MCP9843/98243
MCP9843/98243 Master Master
W
SDA
SCL
001
00000000 00001000
Reading the CONFIG Register.
Note: It is not necessary to
select the register
pointer if it was set from
the previous read/write.
Note: this is an example routine:
i2c_start(); // send START command
i2c_write(AddressByte & 0xFE); //WRITE Command
//also, make sure bit 0 is cleared ‘0’
i2c_write(0x01); // Write CONFIG Register
i2c_start(); // send Repeat START command
i2c_write(AddressByte | 0x01); //READ Command
//also, make sure bit 0 is set ‘1’
UpperByte = i2c_read(ACK); // READ 8 bits
//and Send ACK bit
LowerByte = i2c_read(NAK); // READ 8 bits
//and Send NAK bit
i2c_stop(); // send STOP command
MCP9843/98243
DS22153C-page 24 © 2009 Microchip Technology Inc.
5.1.3 UPPER/LOWER/CRITICAL
TEMPERATURE LIMIT REGISTERS
(TUPPER/TLOWER/TCRIT)
The MCP9843/98243 device has a 16-bit read/write
Event output Temperature Upper-Boundary Trip
register (TUPPER), a 16-bit Lower-Boundary Trip
register (TLOWER) and a 16-bit Critical Boundary Trip
register (TCRIT) that contains 11-bit data in two’s
complement format (0.25°C). This data represents the
maximum and minimum temperature boundary or
temperature window that can be used to monitor
ambient temperature. If this feature is enabled
(Section 5.1.2 “Sensor Configuration Register
(CONFIG)”) and the ambient temperature exceeds the
specified boundary or window, the MCP9843/98243
asserts an Event output. (Refer to Section 5.2.3
“Event Output Configuration”).
REGISTER 5-4: UPPER/LOWER/CRITICAL TEMPERATURE LIMIT REGISTER (TUPPER/TLOWER/
TCRIT) ADDRESS ‘0000 0010’b/‘0000 0011’b/‘0000 0100’b (NOTE 1)
U-0 U-0 U-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
——Sign2
7°C 26°C 25°C 24°C
bit 15 bit 8
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 U-0 U-0
23°C 22°C 21°C 20°C 2-1°C 2-2°C
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 15-13 Unimplemented: Read as ‘0
bit 12 Sign:
0 =T
A 0°C
1 =T
A < 0°C
bit 11-2 TUPPER/TLOWER/TCRIT
:
Temperature boundary trip data in two’s complement format.
bit 1-0 Unimplemented: Read as ‘0
Note 1: This table shows two 16-bit registers for TUPPER, TLOWER and TCRIT located at ‘0000 0010b’,
0000 0011b’ and ‘0000 0100b’, respectively.
© 2009 Microchip Technology Inc. DS22153C-page 25
MCP9843/98243
FIGURE 5-5: Timing Diagram for Writing and Reading from the TUPPER Register (See Section 4.0
“Serial Communication”).
SDA A
C
K
0011A
TUPPER Pointer
0000
A
C
K
S2
A
1
A
0
12345678 12345678
SCL
0
Address Byte
A
C
K
0011A
MSB Data
A
C
K
N
A
K
S P
2
A
1
A
0
12345678 12345678 12345678
Address Byte LSB Data
R
MCP9843/98243 MCP9843/98243
MCP9843/98243 Master Master
W
SDA
SCL
010
00000101 10100000
Reading from the TUPPER Register.
Writing 90°C to the TUPPER Register <0000 0101 1010 0000>b.
SDA A
C
K
0011A0000
A
C
K
S2
A
1
A
0
12345678 12345678
SCL
0
Address Byte
W
MCP9843/98243 MCP9843/98243
MSB Data
A
C
K
A
C
KP
12345678 12345678
LSB Data
TUPPER Pointer
MCP9843/98243 MCP9843/98243
010
00000101 10100000
Note: It is not necessary to
select the register
pointer if it was set from
the previous read/write.
MCP9843/98243
DS22153C-page 26 © 2009 Microchip Technology Inc.
5.1.4 AMBIENT TEMPERATURE
REGISTER (TA)
The MCP9843/98243 device uses a band gap
temperature sensor circuit to output analog voltage
proportional to absolute temperature. An internal ΔΣ
ADC is used to convert the analog voltage to a digital
word. The converter resolution is set to 0.25°C + sign
(11-bit data). The digital word is loaded to a 16-bit read-
only Ambient Temperature register (TA) that contains
11-bit temperature data in two’s complement format.
The TA register bits (bits 12 thru 0) are double-buffered.
Therefore, the user can access the register while, in the
background, the MCP9843/98243 performs an analog-
to-digital conversion. The temperature data from the ΔΣ
ADC is loaded in parallel to the TA register at tCONV
refresh rate.
In addition, the TA register uses three bits (bits 15, 14
and 13) to reflect the Event pin state. This allows the
user to identify the cause of the Event output trigger
(see Section 5.2.3 “Event Output Configuration”);
bit 15 is set to ‘1’ if TA is greater than or equal to TCRIT
,
bit 14 is set to ‘1’ if TA is greater than TUPPER and bit 13
is set to ‘1’ if TA is less than TLOWER.
The TA register bit assignment and boundary
conditions are described in Register 5-5.
REGISTER 5-5: AMBIENT TEMPERATURE REGISTER (TA) ADDRESS ‘0000 0101’b (NOTE 1)
R-0 R-0 R-0 R-0 R-0 R-0 R-0 R-0
TA vs. TCRIT TA vs. TUPPER TA vs. TLOWER SIGN 27 °C 26 °C 25 °C 24 °C
bit 15 bit 8
R-0 R-0 R-0 R-0 R-0 R-0 R-0 R-0
23 °C 22 °C 21 °C 20 °C 2-1 °C 2-2 °C 2-3 °C 2-4 °C
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 15 TA vs. TCRIT (1) Bit:
0 =T
A < TCRIT
1 =T
A TCRIT
bit 14 TA vs. TUPPER (1) Bit:
0 =T
A TUPPER
1 =T
A > TUPPER
bit 13 TA vs. TLOWER (1) Bit:
0 =T
A TLOWER
1 =T
A < TLOWER
bit 12 SIGN Bit:
0 =T
A 0°C
1 =T
A < 0°C
bit 11-0 Ambient Temperature (TA) Bits: (Note 2)
12-bit Ambient Temperature data in two’s complement format.
Note 1: Bits 15, 14 and 13 are not affected by the status of the Event output configuration (bits 5 to 0 of CONFIG)
(Register 5-3).
2: Bits 2, 1, and 0 may remain clear '0' depending on the status of the resolution register (Register 5-9).
The Power-up default is 0.25°C/bit, bits 1 and 0 remain clear '0'.
© 2009 Microchip Technology Inc. DS22153C-page 27
MCP9843/98243
5.1.4.1 TA bits to Temperature Conversion
To convert the TA bits to decimal temperature, the
upper three boundary bits (bits 15, 14 and 13) must be
masked out. Then determine the sign bit (bit 12) to
check positive or negative temperature, shift the bits
accordingly and combine the upper and lower bytes of
the 16-bit register. The upper byte contains data for
temperatures greater than 32°C while the lower byte
contains data for temperature less than 32°C, including
fractional data. When combinding the upper and lower
bytes, the upper byte must be Right-shifted by 4bits (or
multiply by 24) and the lower byte must be Left-shifted
by 4 bits (or multiply by 2-4). Adding the results of the
shifted values provides the temperature data in decimal
format, see Equation 5-1.
The temperature bits are in two’s compliment format,
therefore, postive temperature data and negative tem-
perature data are computed differently. Equation 5-1
shows the temperature computation. The example
instruction code outlined in Figure 5-6 shows the
communication flow, also see Figure 5-7 for timing
diagram.
EQUATION 5-1: BYTES TO
TEMPERATURE
CONVERSION
FIGURE 5-6: Example Instruction Code.
Where:
TA= Ambient Temperature (°C)
UpperByte = TA bit 15 to bit 8
LowerByte = TA bit 7 to bit 0
Temperature 0°C
Temperature < 0°C
TAUpperByte 24LowerByte 2 4
×
+
×
()=
TA256 UpperByte 24LowerByte 2 4
×
+
×
()=
i2c_start(); // send START command
i2c_write(AddressByte & 0xFE); //WRITE Command
//also, make sure bit 0 is cleared ‘0’
i2c_write(0x05); // Write TA Register Address
i2c_start(); //Repeat START
i2c_write(AddressByte | 0x01); // READ Command
//also, make sure bit 0 is Set ‘1’
UpperByte = i2c_read(ACK); // READ 8 bits
//and Send ACK bit
LowerByte = i2c_read(NAK); // READ 8 bits
//and Send NAK bit
i2c_stop(); // send STOP command
//Convert the temperature data
//First Check flag bits
if ((UpperByte & 0x80) == 0x80){ //TA TCRIT
}
if ((UpperByte & 0x40) == 0x40){ //TA > TUPPER
}
if ((UpperByte & 0x20) == 0x20){ //TA < TLOWER
}
UpperByte = UpperByte & 0x1F; //Clear flag bits
if ((UpperByte & 0x10) == 0x10){ //TA <C
UpperByte = UpperByte & 0x0F; //Clear SIGN
Temperature = 256 - (UpperByte x 16 + LowerByte / 16);
}else //TA 0°C
Temperature = (UpperByte x 16 + LowerByte / 16);
//Temperature = Ambient Temperature (°C)
This example routine assumes the variables and I2C communication subroutines are predefined:
MCP9843/98243
DS22153C-page 28 © 2009 Microchip Technology Inc.
FIGURE 5-7: Timing Diagram for Reading +25.25°C Temperature from the TA Register (See
Section 4.0 “Serial Communication”).
SDA A
C
K
0011A
TA Pointer
0000
A
C
K
S2
A
1
A
0
12345678 12345678
SCL
0
Address Byte
A
C
K
0011A
MSB Data
A
C
K
N
A
K
S P
2
A
1
A
0
12345678 12345678 12345678
Address Byte LSB Data
R
MCP9843/98243 MCP9843/98243
MCP9843/98243 Master Master
W
SDA
SCL
101
00000001 10010100
Note: It is not necessary to
select the register
pointer if it was set from
the previous read/write.
© 2009 Microchip Technology Inc. DS22153C-page 29
MCP9843/98243
5.1.5 MANUFACTURER ID REGISTER
This register is used to identify the manufacturer of the
device in order to perform manufacturer specific
operation. The Manufacturer ID for the MCP9843/
98243 is 0x0054 (hexadecimal).
FIGURE 5-8: Timing Diagram for Reading the Manufacturer ID Register (See Section 4.0 “Serial
Communication”).
REGISTER 5-6: MANUFACTURER ID REGISTER (READ-ONLY) ADDRESS ‘0000 0110’b
R-0 R-0 R-0 R-0 R-0 R-0 R-0 R-0
Manufacturer ID
bit 15 bit 8
R-0 R-1 R-0 R-1 R-0 R-1 R-0 R-0
Manufacturer ID
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 15-0 Device Manufacturer Identification Number
.
SDA A
C
K
0011A
Manuf. ID Pointer
0000
A
C
K
S2
A
1
A
0
12345678 12345678
SCL
0
Address Byte
A
C
K
0011A
MSB Data
A
C
K
N
A
K
S P
2
A
1
A
0
12345678 12345678 12345678
Address Byte LSB Data
R
MCP9843/98243 MCP9843/98243
MCP9843/98243 Master Master
W
SDA
SCL
110
00000000 01010100
Note: It is not necessary to
select the register
pointer if it was set from
the previous read/write.
MCP9843/98243
DS22153C-page 30 © 2009 Microchip Technology Inc.
5.1.6 DEVICE ID AND REVISION
REGISTER
The upper byte of this register is used to specify the
device identification and the lower byte is used to
specify device revision. The device ID for the
MCP98243 is 0x21 (hex) and the MCP9843 is 0x00
(hex).
The revision (Lower Byte) begins with 0x00 (hex) for
the first release, with the number being incremented as
revised versions are released. The revision for both
MCP9843 and MCP98243 is 0x01.
REGISTER 5-7: MCP98243 DEVICE ID AND DEVICE REVISION (READ-ONLY)
ADDRESS ‘0000 0111’b
R-0 R-0 R-1 R-0 R-0 R-0 R-0 R-1
Device ID
bit 15 bit 8
R-0 R-0 R-0 R-0 R-0 R-0 R-0 R-1
Device Revision
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 15-8 Device ID: Bit 15 to bit 8 are used for device ID
bit 7-0 Device Revision: Bit 7 to bit 0 are used for device revision
REGISTER 5-8: MCP9843 DEVICE ID AND DEVICE REVISION (READ-ONLY)
ADDRESS ‘0000 0111’b
R-0 R-0 R-0 R-0 R-0 R-0 R-0 R-0
Device ID
bit 15 bit 8
R-0 R-0 R-0 R-0 R-0 R-0 R-0 R-1
Device Revision
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 15-8 Device ID: Bit 15 to bit 8 are used for device ID
bit 7-0 Device Revision: Bit 7 to bit 0 are used for device revision
© 2009 Microchip Technology Inc. DS22153C-page 31
MCP9843/98243
5.1.7 RESOLUTION REGISTER
This register allows the user to change the sensor
resolution (see Section 5.2.4 “Temperature
Resolution”). The POR default resolution is 0.25°C.
The selected resolution is also reflected in the
Capability register (see Register 5-2).
FIGURE 5-9: Timing Diagram for Changing TA Resolution to 0.0625°C <0000 0011>b (See
Section 4.0 “Serial Communication”).
REGISTER 5-9: RESOLUTION ADDRESS ‘0000 1000’b
U-0 U-0 U-0 U-0 U-0 U-0 R/W-0 R/W-0
Resolution
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 7-2 Unimplemented: Read as ‘0
bit 1-0 Resolution:
00 = LSB = 0.5°C (tCONV = 30 ms typical)
01 = LSB = 0.25°C (power up default, tCONV = 65 ms typical)
10 = LSB = 0.125°C (tCONV = 130 ms typical)
11 = LSB = 0.0625°C (tCONV = 260 ms typical)
SDA A
C
K
0011AA
C
K
S2
A
1
A
0
12345678 12345678
SCL
Address Byte
W
MCP9843/98243 MCP9843/98243
A
C
KP
12345678
Data
Resolution Pointer
MCP9843/98243
00001000 00000011
MCP9843/98243
DS22153C-page 32 © 2009 Microchip Technology Inc.
5.2 SENSOR FEATURE DESCRIPTION
5.2.1 SHUTDOWN MODE
Shutdown mode disables all power-consuming
activities (including temperature sampling operations)
while leaving the serial interface active. This mode is
selected by setting bit 8 of CONFIG to ‘1’. In this mode,
the device consumes ISHDN. It remains in this mode
until bit 8 is cleared ‘0’ to enable Continuous
Conversion mode, or until power is recycled.
The Shutdown bit (bit 8) cannot be set to ‘1’ while bits
6 and 7 of CONFIG (Lock bits) are set to ‘1’. However,
it can be cleared ‘0’ or returned to Continuous
Conversion while locked.
In Shutdown mode, all registers can be read or written.
However, the serial bus activity increases the shutdown
current.
If the device is shutdown while the Event pin is
asserted, then the Event output will be de-asserted
during shutdown. It will remain de-asserted until the
device is enabled for normal operation. Once the
device is enabled it takes tCONV before the device
re-asserts the Event output.
5.2.2 TEMPERATURE HYSTERESIS
(THYST)
A hysteresis of 0°C, 1.5°C, 3°C or 6°C can be selected
for the TUPPER, TLOWER and TCRIT temperate
boundaries using bits 10 and 9 of CONFIG. The
hysteresis applies for decreasing temperature only (hot
to cold), or as temperature drifts below the specified
limit.
The hysteresis bits can not be changed if either of the
lock bits, bits 6 and 7 of CONFIG, are set to ‘1’.
The TUPPER, TLOWER and TCRIT boundary conditions
are described graphically in Figure 5-2.
5.2.3 EVENT OUTPUT CONFIGURATION
The Event output can be enabled using bit 3 of
CONFIG (Event output control bit) and can be
configured as either a comparator output or as Interrupt
Output mode using bit 0 of CONFIG (Event mode). The
polarity can also be specified as an active-high or
active-low using bit 1 of CONFIG (Event polarity).
When active-high output is selected, a pull-down
resistor is requried on the Event pin. When active-low
output is selected, a pull-up resistor is required on the
Event pin, see Figure 5-10 and Figure 5-11 for
graphical circuit description. These configurations are
designed to serve processors with Low-to-High or
High-to-Low edge triggered inputs. With these
configurations, when the Event output De-asserts,
power will not be dissipated across the pull-up or
pull-down resistors.
When the ambient temperature increases above the
critical temperature limit, the Event output is forced to a
comparator output (regardless of bit 0 of CONFIG).
When the temperature drifts below the critical
temperature limit minus hysteresis, the Event output
automatically returns to the state specified by bit 0 of
CONFIG.
FIGURE 5-10: Active-High Event Output
Configuration.
FIGURE 5-11: Active-Low Event Output
Configuration.
The status of the Event output can be read using bit 4
of CONFIG (Event status). This bit can not be set to ‘1
in shutdown mode.
Bit 7 and 6 of the CONFIG register can be used to lock
the TUPPER, TLOWER and TCRIT registers. The bits
prevent false triggers at the Event output due to an
accidental rewrite to these registers.
The Event output can also be used as a critical
temperature output using bit 2 of CONFIG (critical
output only). When this feature is selected, the Event
output becomes a comparator output. In this mode, the
interrupt output configuration (bit 0 of CONFIG) is
ignored.
MCP9843/98243
Event Output
RPD
VDD
MCP9843/98243
Event Output
RPU
VDD
© 2009 Microchip Technology Inc. DS22153C-page 33
MCP9843/98243
5.2.3.1 Comparator Mode
Comparator mode is selected using bit 0 of CONFIG. In
this mode, the Event output is asserted as active-high
or active-low using bit 1 of CONFIG. Figure 5-12 shows
the conditions that toggle the Event output.
If the device enters Shutdown mode with asserted
Event output, the output will de-assert. It will remain de-
asserted until the device enters Continuous Conver-
sion mode and after the first temperature conversion is
completed, tCONV. After the initial temperature conver-
sion, TA must satisfy the TUPPER or TLOWER boundary
conditions in order for Event output to be asserted.
Comparator mode is useful for thermostat-type
applications, such as turning on a cooling fan or
triggering a system shutdown when the temperature
exceeds a safe operating range.
5.2.3.2 Interrupt Mode
In the Interrupt mode, the Event output is asserted as
active-high or active-low (depending on the polarity
configuration) when TA drifts above or below TUPPER
and TLOWER limits. The output is deasserted by setting
bit 5 (Interrupt Clear) of CONFIG. If the device enters
Shutdown mode with asserted Event output, the output
will de-assert. It will remain de-asserted until the device
enters Continuous Conversion mode and after the first
temperature conversion is completed, tCONV
. If the inter-
rupt clear bit (Bit 5) is never set, then the Event output will
re-assert after the first temperature conversion.
In addition, if TA >= TCRIT the Event output is forced as
Comparator mode and asserts until TA < TCRIT - THYST
.
While the Event output is asserted, user must send Clear
Interrupt command (bit 5 of CONFIG) for Event output to
de-assert, when temperature drops below the critical
limit, TA < TCRIT - THYST
. Otherwise, Event output
remains asserted (see Figure 5-12 for graphical descrip-
tion). Switching from Interrupt mode to Comparator mode
also de-asserts Event output.
This mode is designed for interrupt driven microcontroller
based systems. The microcontroller receiving the
interrupt will have to acknowledge the interrupt by setting
bit 5 of CONFIG register from the MCP9843/98243.
5.2.4 TEMPERATURE RESOLUTION
The MCP9843/98243 device is capable of providing a
temperature data with 0.5°C to 0.0625°C resolution.
The Resolution can selected using the Resolution
register (Register 5-9) which is located in address
00001000’b. This address location is not specified in
JEDEC Standard JC42.4. However, it provides
additional flexibility while being functionally compatible
with JC42.4 and provide a 0.25°C resolution at 125 ms
(max.). The selected resolution can be read by user
using bit 4 and bit 3 of the Capability register
(Register 5-2). A 0.25°C resolution is set as POR
default by factory.
TABLE 5-2: TEMPERATURE
CONVERSION TIME
Resolution tCONV
(ms)
Samples/sec
(typical)
0.5°C 30 33
0.25°C
(Power-up default)
65 15
0.125°C 130 8
0.0625°C 260 4
MCP9843/98243
DS22153C-page 34 © 2009 Microchip Technology Inc.
FIGURE 5-12: Event Output Condition.
TUPPER
TLOWER
Event Output
TCRIT
TA
TUPPER - THYST
(Active-Low)
Comparator
Interrupt
S/w Int. Clear
Critical Only
TCRIT - THYST
123457
TABLE 5-10: TEMPERATURE EVENT OUTPUT CONDITIONS
Note Output Boundary Conditions
Comparator Interrupt Critical TA Bits
Output State (Active Low/High) 15 14 13
1T
A TLOWER High/Low Low/High High/Low 0 0 0
2T
A < TLOWER - THYST Low/High Low/High High/Low 0 0 1
3T
A > TUPPER Low/High Low/High High/Low 0 1 0
4 T
A TUPPER - THYST High/Low Low/High High/Low 0 0 0
5 T
A TCRIT Low/High Low/High Low/High 1 1 0
6 When TA TCRIT the Event output is forced to Comparator Mode and bits 0 of CONFIG (Event
output mode) is ignored until TA < TCRIT - THYST
. In the Interrupt Mode, if Interrupt is not cleared
(bits 5 of CONFIG) as shown in the diagram at Note 6, then Event will remain asserted at Note 7
until Interrupt is cleared by the controller.
7T
A < TCRIT - THYST Low/High High/Low High/Low 0 1 0
TLOWER - THYST
TLOWER -THYST
TUPPER - THYST
1342
Note: 6
Event Output
(Active-High)
Comparator
Interrupt
S/w Int. Clear
Critical Only
© 2009 Microchip Technology Inc. DS22153C-page 35
MCP9843/98243
5.3 MCP98243 EEPROM FEATURE
DESCRIPTION
5.3.1 BYTE WRITE
To write a byte in the MCP98243 EEPROM, the master
has to specify the memory location or address. Once
the address byte is transmitted correctly followed by a
word address, the word address is stored in the
EEPROM address pointer. The following byte is data
to be stored in the specified memory location. Figure 5-
13 shows the timing diagram.
FIGURE 5-13: Timing Diagram for Byte Write (See Section 4.0 “Serial Communication”).
SDA A
C
K
1010AA
C
K
S2
A
1
A
0
12345678 12345678
SCL
Address Byte
W
MCP98243 MCP98243
A
C
KP
12345678
Data
Word Address
MCP98243
XXXXXXX X XX XXXXXX
MCP9843/98243
DS22153C-page 36 © 2009 Microchip Technology Inc.
5.3.2 PAGE WRITE
The write Address Byte, word address and the first data
byte are transmitted to the MCP98243 in the same way
as in a byte write. Instead of generating a Stop
condition, the master transmits up to 15 additional data
bytes to the MCP98243, which are temporarily stored
in the on-chip page buffer and will be written into the
memory after the master has transmitted a Stop
condition. Upon receipt of each word, the four lower
order address pointer bits are internally incremented by
one. The higher order four bits of the word address
remain constant. If the master should transmit more
than 16 bytes prior to generating the Stop condition, the
address counter will roll over and the previously
received data will be overwritten. As with the byte write
operation, once the Stop condition is received, an
internal write cycle will begin (Figure 5-14).
FIGURE 5-14: Timing Diagram for Page Write (See Section 4.0 “Serial Communication”).
Note: Page write operations are limited to writing
bytes within a single physical page,
regardless of the number of bytes actually
being written. Physical page boundaries
start at addresses that are integer
multiples of the page buffer size (or ‘page
size’) and end at addresses that are
integer multiples of [page size - 1]. If a
Page Write command attempts to write
across a physical page boundary, the
result is that the data wraps around to the
beginning of the current page (overwriting
data previously stored there), instead of
being written to the next page, as might be
expected. It is therefore necessary for the
application software to prevent page write
operations that would attempt to cross a
page boundary.
SDA A
C
K
1010AXXXX
A
C
K
S2
A
1
A
0
12345678 12345678
SCL
X
Address Byte
W
MCP98243 MCP98243
Data at (n)
A
C
KP
12345678 12345678
Data at (n+1)
Word Address (n)
MCP98243 MCP98243
XXX
XXXXXXXX XXXXXXXX A
C
K
Data at (n+15)
MCP98243
XXX XXX
A
C
K
Note: n is the initial address for a page.
© 2009 Microchip Technology Inc. DS22153C-page 37
MCP9843/98243
5.3.3 WRITE PROTECTION
The MCP98243 has a Software Write-Protect (SWP)
feature that allows the lower half array (addresses
00h -7Fh) to be write-protected or permanently write-
protected (PWP). The write protected area can be
cleared by sending Clear Write Protect (CWP)
command. However, once the PWP is executed the
protected memory can not be cleared. The device will
not respond to the CWP command.
To access write protection, the device address code of
the Address Byte is set to ‘0110’ instead of ‘1010’. The
1010’ Address code is used to access the memory
area and the ‘0110’ address code is used to access the
write protection. Once the device is write protected it
will not acknowledge certain commands. Table 5-3
shows the corresponding Address Bytes for the write
protect feature.
TABLE 5-3: WRITE PROTECT DEVICE ADDRESSING (NOTE 1)
EEPROM Operation
Address Pins Address Byte
A2 A1 A0 Address Code
Slave Address
R/W
A2 A1 A0
SWP WRITE GND GND VHV 0110 0 0 1 0
READ 1
CWP WRITE GND VDD VHV 0110 0 1 1 0
READ 1
PWP (Note) WRITE X X X 0110 XX X 0
READ 1
Note 1: The Address Pins are ‘X’ or don’t cares. However, the slave address bits need to match the address pins.
For VHV voltage levels, refer to Figure 2-13.
TABLE 5-4: DEVICE RESPONSE WHEN WRITING DATA OR ACCESSING SWP/CWP/PWP
(NOTE 1)
Status Command ACK Address ACK Data Byte ACK Write Cycle
Not
Protected
SWP/CWP/PWP ACK X ACK X ACK Yes
Page/byte write ACK Address ACK Data ACK Yes
Protected
with
SWP
SWP NoACK X NoACK X NoACK No
CWP ACK X ACK X ACK Yes
PWP ACK X ACK X ACK Yes
Page/byte write lower 128 bytes ACK Address ACK Data NoACK No
Permanently
Protected
SWP/CWP/PWP NoACK X NoACK X NoACK No
Page/byte write lower 128 bytes ACK Address ACK Data NoACK No
Note 1: X is defined as ‘don’t care’.
MCP9843/98243
DS22153C-page 38 © 2009 Microchip Technology Inc.
5.3.3.1 Software Write Protect (SWP)
The SWP feature is invoked by writing to the write-
protect register. This is done by sending an Address
Byte similar to a normal Write command. Figure 5-17
shows the timing diagram. SWP can be cleared using
the CWP command. See Section 5.3.3.2 “Clear Write
Protect (CWP)”
The Slave Address bits need to correspond to the
address pin logic configuration. For SWP, a high
voltage VHV needs to be applied to the A0 pin and the
corresponding slave address needs to be set to ‘1’, as
shown in Table 5-3. Both A2 and A1 pins are grounded
and the corresponding slave address bits are set to ‘0’.
The device response in this mode is shown in Tabl e 5 -
4 and Tabl e 5 - 5.
FIGURE 5-15: Timing Diagram for Setting Software Write Protect (See Section 4.0 “Serial
Communication”).
5.3.3.2 Clear Write Protect (CWP)
The CWP feature is invoked by writing to the clear
write-protect register. This is done by sending an
Address Byte similar to a normal Write command.
Figure 5-17 shows the timing diagram. CWP clears
SWP only. PWP can not be cleared using this
command.
The Slave Address bits need to correspond to the
address pin logic configuration. For CWP, a high
voltage VHV needs to be applied to the A0 pin and the
corresponding slave address needs to be set to ‘1’.
The A1 pin is set to VDD and the corresponding slave
address bit is set to ‘1’. And A2 pins is set to ground
and the corresponding slave address bits are set to ‘0’.
Table 5-3 shows the bit configuration. The device
response in this mode is shown in Tab l e 5 -4 and
Table 5-5.
FIGURE 5-16: Timing Diagram for Setting Clear Write Protect (See Section 4.0 “Serial
Communication”).
SDA A
C
K
0110
A
C
K
S
12345678 12345678
SCL
Address Byte
W
MCP98243 MCP98243
A
C
KP
12345678
Data
Word Address
MCP98243
XXXXXXXX XXXXXXXX
001
Note: Apply VHV at A0 pin and connect GND to A1 and A2 pins to initiate SWP cycle.
SDA A
C
K
0110
A
C
K
S
12345678 12345678
SCL
Address Byte
W
MCP98243 MCP98243
A
C
KP
12345678
Data
Word Address
MCP98243
XXXXXXXX XXXXXXXX
011
Note: Apply VHV at A0 pin, apply VDD at A1 pin, connect A2 pin to GND to initiate CWP cycle.
© 2009 Microchip Technology Inc. DS22153C-page 39
MCP9843/98243
5.3.3.3 PWP (Permanent Write Protect)
Once the PWP register is written, the lower half of the
memory will be permanent protected and the device
will not acknowledge any command. The protected
area of the memory can not be cleared, reversed, or re-
written. If a write is attempted to the protected area, the
device will acknowledge the address byte and word
address but not the data byte. (See Tab le 5 -4 and
Table 5-5).
Unlike SWP and CWP, a VHV is not applied on the A0
pin to execute PWP. The state of A2, A1, and A0 is user
selectable. However, the address pin states need to
match the slave address bits, as shown in Table 5-3.
FIGURE 5-17: Timing Diagram for Setting Permanent Write Protect (See Section 4.0 “Serial
Communication”).
Note: Once the Permanent Write-Protect is
executed, it cannot be reversed, even if the
device power is cycled. See Figure 2-13
for VHV voltage levels.
SDA A
C
K
0110AA
C
K
S2
A
1
A
0
12345678 12345678
SCL
Address Byte
W
MCP98243 MCP98243
A
C
KP
12345678
Data
Word Address
MCP98243
XXXXXXXX XXXXXXXX
Note: Unlike SWP and CWP, VHV must be within the range of GND to VDD + 1V to execute PWP.
See Figure 2-13 and Section 5.3.3 “Write Protection”.
MCP9843/98243
DS22153C-page 40 © 2009 Microchip Technology Inc.
5.3.4 READ OPERATION
Read operations are initiated in the same way as write
operations, with the exception that the R/W bit of the
slave address is set to ‘1’. There are three basic types
of read operations: current address read, random read
and sequential read.
5.3.4.1 Current Address Read
The MCP98243 contains an address counter that
maintains the address of the last word accessed,
internally incremented by ‘1’. Therefore, if the previous
access (either a read or write operation) was to
address n, the next current address read operation
would access data from address n+1. Upon receipt of
the slave address with R/W bit set to ‘1’, the MCP98243
issues an acknowledge and transmits the 8-bit data
word. The master will not acknowledge (NAK) the
transfer but does generate a Stop condition and the
MCP98243 discontinues transmission (Figure 5-18).
FIGURE 5-18: Reading Current Word Address (See Section 4.0 “Serial Communication”).
TABLE 5-5: DEVICE RESPONSE WHEN READING SWP/CWP/PWP (NOTE)
Status Command ACK Address ACK Data Byte ACK
Not Protected SWP/CWP/PWP ACK X NoACK X NoACK
Protected with SWP
SWP NoACK X NoACK X NoACK
CWP ACK X NoACK X NoACK
PWP ACK X NoACK X NoACK
Permanently Protected SWP/CWP/PWP NoACK X NoACK X NoACK
Note: X is defined as ‘don’t care’.
1010AA
C
K
N
A
K
S P
2
A
1
A
0
12345678 12345678
Address Byte Current Word Address
R
MCP98243 Master
SDA
SCL
00000000
Note: In this example, the current word address is the
previously accessed address location n plus 1.
© 2009 Microchip Technology Inc. DS22153C-page 41
MCP9843/98243
5.3.4.2 Random Read
Random read operations allow the master to access
any memory location in a random manner. To perform
this type of read operation, the word address must first
be set. This is done by sending the word address to the
MCP98243 as part of a write operation. Once the word
address is sent, the master generates a start condition
following the acknowledge. This terminates the write
operation, but not before the internal address pointer is
set. The master then issues the Address Byte again,
but with the R/W bit set to a ‘1’. The MCP98243 then
issues an acknowledge and transmits the 8-bit data
word. The master will not acknowledge the transfer but
does generate a stop condition and the MCP98243
discontinues transmission (Figure 5-19).
FIGURE 5-19: Timing Diagram for Random Read (See Section 4.0 “Serial Communication”).
SDA A
C
K
1010A
Word Address (n)
0000
A
C
K
S2
A
1
A
0
12345678 12345678
SCL
0
Address Byte
MCP98243 MCP98243
W000
1010AA
C
K
N
A
K
S P
2
A
1
A
0
12345678 12345678
Address Byte Data at (n)
R
MCP98243 Master
SDA
SCL
XXXXXXXX
Note: In this example, ‘n’ is the current Address Word which ‘00’h and the data is the byte at address ‘n’.
MCP9843/98243
DS22153C-page 42 © 2009 Microchip Technology Inc.
5.3.4.3 Sequential Read
Sequential reads are initiated in the same way as a
random read, with the exception that after the
MCP98243 transmits the first data byte, the master
issues an acknowledge, as opposed to a stop condition
in a random read. This directs the MCP98243 to
transmit the next sequentially addressed 8-bit word
(Figure 5-20).
To provide sequential reads, the MCP98243 contains
an internal address pointer, which is incremented by
one at the completion of each operation. This address
pointer allows the entire memory contents to be serially
read during one operation.
FIGURE 5-20: Timing Diagram for Sequential Read (See Section 4.0 “Serial Communication”).
5.3.5 STANDBY MODE
The design will incorporate a low power standby mode
(ISHDN). Standby mode will be entered after a normal
termination of any operation and after all internal
functions are complete. This would include any error
conditions occurring, such as improper number of clock
cycles or improper instruction byte as defined
previously.
SDA A
C
K
1010AXXXX
A
C
K
S2
A
1
A
0
12345678 12345678
SCL
X
Address Byte
R
MCP98243 MCP98243
Data at (n+1)
A
C
K
12345678 12345678
Data at (n+2)
Data (n)1
MCP98243 MCP98243
XXX
XXXXXXXX XXXXXXXX
Data at (n+m)(1)
XXX XXX
A
C
K
Note 1: ‘n’ is the initial address location and ‘m’ is the final address location (‘n+m’ < 256)
N
A
KP
Master
© 2009 Microchip Technology Inc. DS22153C-page 43
MCP9843/98243
5.4 Summary of Power-on Default
The MCP9843/98243 has an internal Power-on Reset
(POR) circuit. If the power supply voltage VDD glitches
down to the VPOR_TS and VPOR_EE thresholds, the
device resets the registers to the power-on default
settings.
Table 5-6 shows the power-on default summary for the
temperature sensor. The EEPROM resets the address
pointer to 0x00 hex.
TABLE 5-6: MCP9843/98243 TEMPERATURE SENSOR POWER-ON RESET DEFAULTS
Registers
Default Register
Data (Hexadecimal)
Power-up Default
Register Description
Address
(Hexadecimal) Register Name
0x00 Capability 0x00EF Event output de-asserts in shutdown
I2C time out 25 ms to 35 ms.
Accepts VHV at A0 Pin
0.25°C Measurement Resolution
Measures temperature below 0°C
±1°C accuracy over active range
Temperature event output
0x01 CONFIG 0x0000 Comparator mode
Active-Low output
Event and critical output
Output disabled
Event not asserted
Interrupt cleared
Event limits unlocked
Critical limit unlocked
Continuous conversion
0°C Hysteresis
0x02 TUPPER 0x0000 0°C
0x03 TLOWER 0x0000 0°C
0x04 TCRIT 0x0000 0°C
0x05 TA0x0000 0°C
0x06 Manufacturer ID 0x0054 0x0054 (hex)
0x07 Device ID/ Device Revision for
MCP98243
0x2101 0x2101 (hex)
0x07 Device ID/ Device Revision for
MCP9843
0x0001 0x0001 (hex)
0x08 Resolution 0x01 0x01 (hex)
MCP9843/98243
DS22153C-page 44 © 2009 Microchip Technology Inc.
NOTES:
© 2009 Microchip Technology Inc. DS22153C-page 45
MCP9843/98243
6.0 APPLICATIONS INFORMATION
6.1 Layout Considerations
The MCP9843/98243 device does not require any
additional components besides the master controller in
order to measure temperature. However, it is recom-
mended that a decoupling capacitor of 0.1 µF to 1 µF
be used between the VDD and GND pins. A high-
frequency ceramic capacitor is recommended. It is
necessary for the capacitor to be located as close as
possible to the power and ground pins of the device in
order to provide effective noise protection.
In addition, good PCB layout is key for better thermal
conduction from the PCB temperature to the sensor
die. For good temperature sensitivity, add a ground
layer under the device pins as shown in Figure 6-1.
6.2 Thermal Considerations
A potential for self-heating errors can exist if the
MCP9843/98243 SDA, SCLK and Event lines are
heavily loaded with pull-ups (high current). Typically,
the self-heating error is negligible because of the
relatively small current consumption of the MCP9843/
98243. A temperature accuracy error of approximately
0.5°C could result from self-heating if the
communication pins sink/source the maximum current
specified.
For example, if the Event output is loaded to maximum
IOL, Equation 6-1 can be used to determine the effect
of self-heating.
EQUATION 6-1: EFFECT OF SELF-
HEATING
At room temperature (TA = +25°C) with maximum
IDD = 500 µA and VDD = 3.6V, the self-heating due to
power dissipation TΔ is 0.2°C for the DFN-8 package
and 0.5°C for the TSSOP-8 package.
FIGURE 6-1: DFN Package Layout.
T
Δθ
JA VDD IDD VOL_Event IOL_Event VOL_SDA IOL_SDA
+
+
()=
Where:
TΔ=T
J - TA
TJ= Junction Temperature
TA= Ambient Temperature
θJA = Package Thermal Resistance
VOL_Event, SDA = Event and SDA Output VOL
(0.4 Vmax)
IOL_Event, SDA = Event and SDA Output IOL
(3 mAmax)
A0
A1
A2
GND
VDD
Event
SCL
SDA
EP9
MCP9843/98243
DS22153C-page 46 © 2009 Microchip Technology Inc.
NOTES:
© 2009 Microchip Technology Inc. DS22153C-page 47
MCP9843/98243
7.0 PACKAGING INFORMATION
7.1 Package Marking Information
8-Lead 2x3x0.9 DFN Example:
8-Lead TSSOP Example:
XXXX
XYWW
NNN
243B
E944
256
Legend: XX...X Customer-specific information
Y Year code (last digit of calendar year)
YY Year code (last 2 digits of calendar year)
WW Week code (week of January 1 is week ‘01’)
NNN Alphanumeric traceability code
Pb-free JEDEC designator for Matte Tin (Sn)
*This package is Pb-free. The Pb-free JEDEC designator ( )
can be found on the outer packaging for this package.
Note: In the event the full Microchip part number cannot be marked on one line, it will
be carried over to the next line, thus limiting the number of available
characters for customer-specific information.
3
e
3
e
8-Lead 2x3x0.75 TDFN Example:
8-Lead 2x3x0.5 UDFN Example:
XXX
YWW
NN
ABZ
944
25
XXX
YWW
NN
AAG
944
25
XXX
YWW
NN
AAA
944
25
Part Number Code
MCP9843-BE/MC AGK
MCP9843T-BE/MC AGK
MCP98243-BE/MC ABZ
MCP98243T-BE/MC ABZ
Part Number Code
MCP9843T-BE/MNY AAK
MCP98243T-BE/MNY AAG
Part Number Code
MCP98243T-BE/MUY AAA
Part Number Code
MCP9843-BE/ST 05AB
MCP9843T-BE/ST 05AB
MCP98243-BE/ST 243B
MCP98243T-BE/ST 243B
MCP9843/98243
DS22153C-page 48 © 2009 Microchip Technology Inc.
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D
N
E
NOTE 1
12
EXPOSED PAD
NOTE 1
21
D2
K
L
E2
N
e
b
A3 A1
A
NOTE 2
BOTTOM VIEW
TOP VIEW
  ) 0+0
© 2009 Microchip Technology Inc. DS22153C-page 49
MCP9843/98243
 !""#$%&
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MCP9843/98243
DS22153C-page 50 © 2009 Microchip Technology Inc.
 ()""#$%*&
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© 2009 Microchip Technology Inc. DS22153C-page 51
MCP9843/98243
 ()""#$%*&
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MCP9843/98243
DS22153C-page 52 © 2009 Microchip Technology Inc.
+ )""#$%+&
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© 2009 Microchip Technology Inc. DS22153C-page 53
MCP9843/98243
+ )""#$%+&
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MCP9843/98243
DS22153C-page 54 © 2009 Microchip Technology Inc.
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  ) 09>/
© 2009 Microchip Technology Inc. DS22153C-page 55
MCP9843/98243
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
MCP9843/98243
DS22153C-page 56 © 2009 Microchip Technology Inc.
NOTES:
© 2009 Microchip Technology Inc. DS22153C-page 57
MCP9843/98243
APPENDIX A: REVISION HISTORY
Revision C (November 2009)
The following is the list of modifications:
1. Added the MCP9843 temperature sensor and
updated all specification and description
sections to include this device.
2. Updated Table 5-1 and Table 5-6 with
information on the MCP9843 device.
3. Added Register 5-8 for MCP9843 device.
4. Updated Section 7.1 “Package Marking Infor-
mation”.
Revision B (October 2009)
The following is the list of modifications:
1. Added MCP98243 vs MCP98242 comparison
table.
2. Added EEPROM Write temperature Range.
3. Changed I2C time out minimum specification to
25 ms.
4. Replaced Figure 2-5.
5. Updated bits 7 and 6 of Register 5-2: Capability
Register.
6. Updated Device/Revision ID register.
7. Updated Functional Block Diagram (Figure 5-1).
8. Updated Section 5.2.3.1 “Comparator Mode”
and Section 5.2.3.2 “Interrupt Mode”.
9. Updated Figure 5-13.
10. Updated package marking drawings.
Revision A (May 2009)
Original Release of this Document.
MCP9843/98243
DS22153C-page 58 © 2009 Microchip Technology Inc.
NOTES:
© 2009 Microchip Technology Inc. DS22153C-page 59
MCP9843/98243
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.
Device: MCP9843: Digital Temperature Sensor
MCP9843T: Digital Temperature Sensor
(Tape and Reel)
MCP98243: Digital Temp. Sensor + 2k bit EEPROM
MCP98243T: Digital Temp. Sensor + 2k bit EEPROM
(Tape and Reel)
Grade: B = ±1°C (max.) from +75°C to +95°C,
B±2°C (max.) from +40°C to +125°C, and
B±3°C (max.) from -20°C to +125°C
Temperature Range: E = -40°C to +125°C
Package: MC = Dual Flat No Lead (2x3x0.9 mm Body), 8-lead,
MNY * = Dual Flat No Lead (2x3x0.75 mm Body, 8-lead
(Tape and Reel)
MUY * = Dual Flat No Lead (2x3x0.5 mm Body, 8-lead
(Tape and Reel)
ST = Plastic Thin Shrink Small Outline (4x4 mm
Body), 8-lead
* Y = nickel palladium gold manufacturing designator. Only
available on the TDFN and UDFN packages.
PART NO. X/XXX
PackageTemperature
Range
Device
Examples:
a) MCP9843-BE/MC: Extended Temp.,
8LD DFN pkg.
b) MCP9843T-BE/MC: Tape and Reel,
Extended Temp.,
8LD DFN pkg.
c) MCP9843-BE/ST: Extended Temp.,
8LD TSSOP pkg.
d) MCP9843T-BE/ST: Tape and Reel,
Extended Temp.,
8LD TSSOP pkg.
e) MCP9843T-BE/MNY: Tape and Reel,
Extended Temp.,
8LD TDFN (nickel
palladium gold) pkg.
a) MCP98243-BE/MC: Extended Temp.,
8LD DFN pkg.
b) MCP98243T-BE/MC: Tape and Reel,
Extended Temp.,
8LD DFN pkg.
c) MCP98243-BE/ST: Extended Temp.,
8LD TSSOP pkg.
d) MCP98243T-BE/ST: Tape and Reel,
Extended Temp.,
8LD TSSOP pkg.
e) MCP98243T-BE/MNY:Tape and Reel,
Extended Temp.,
8LD TDFN (nickel
palladium gold) pkg.
f) MCP98243T-BE/MUY:Tape and Reel.
Extended Temp.,
8LD UDFN (nickel
palladium gold) pkg.
–X
Grade
MCP9843/98243
DS22153C-page 60 © 2009 Microchip Technology Inc.
NOTES:
© 2009 Microchip Technology Inc. DS22153C-page 61
Information contained in this publication regarding device
applications and the like is provided only for your convenience
and may be superseded by updates. It is your responsibility to
ensure that your application meets with your specifications.
MICROCHIP MAKES NO REPRESENTATIONS OR
WARRANTIES OF ANY KIND WHETHER EXPRESS OR
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OTHERWISE, RELATED TO THE INFORMATION,
INCLUDING BUT NOT LIMITED TO ITS CONDITION,
QUALITY, PERFORMANCE, MERCHANTABILITY OR
FITNESS FOR PURPOSE. Microchip disclaims all liability
arising from this information and its use. Use of Microchip
devices in life support and/or safety applications is entirely at
the buyer’s risk, and the buyer agrees to defend, indemnify and
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suits, or expenses resulting from such use. No licenses are
conveyed, implicitly or otherwise, under any Microchip
intellectual property rights.
Trademarks
The Microchip name and logo, the Microchip logo, dsPIC,
KEELOQ, KEELOQ logo, MPLAB, PIC, PICmicro, PICSTART,
rfPIC and UNI/O are registered trademarks of Microchip
Technology Incorporated in the U.S.A. and other countries.
FilterLab, Hampshire, HI-TECH C, Linear Active Thermistor,
MXDEV, MXLAB, SEEVAL and The Embedded Control
Solutions Company are registered trademarks of Microchip
Technology Incorporated in the U.S.A.
Analog-for-the-Digital Age, Application Maestro, CodeGuard,
dsPICDEM, dsPICDEM.net, dsPICworks, dsSPEAK, ECAN,
ECONOMONITOR, FanSense, HI-TIDE, In-Circuit Serial
Programming, ICSP, Mindi, MiWi, MPASM, MPLAB Certified
logo, MPLIB, MPLINK, mTouch, Octopus, Omniscient Code
Generation, PICC, PICC-18, PICDEM, PICDEM.net, PICkit,
PICtail, PIC32 logo, REAL ICE, rfLAB, Select Mode, Total
Endurance, TSHARC, UniWinDriver, WiperLock and ZENA
are trademarks of Microchip Technology Incorporated in the
U.S.A. and other countries.
SQTP is a service mark of Microchip Technology Incorporated
in the U.S.A.
All other trademarks mentioned herein are property of their
respective companies.
© 2009, Microchip Technology Incorporated, Printed in the
U.S.A., All Rights Reserved.
Printed on recycled paper.
Note the following details of the code protection feature on Microchip devices:
Microchip products meet the specification contained in their particular Microchip Data Sheet.
Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
Microchip is willing to work with the customer who is concerned about the integrity of their code.
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Microchip received ISO/TS-16949:200 2 certif ication for its worldwide
headquarters, design and wafer fabrication facilities in Chandler and
Tempe, Arizona; Gresham, Oregon and design centers in California
and India. The Company’s quality system processes and procedures
are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping
devices, Serial EEPROMs, microperi pherals, nonvola tile memo ry and
analog product s. In addition, Microchip s quality system for the design
and manufacture of development systems is ISO 9001:2000 certified.
DS22153C-page 62 © 2009 Microchip Technology Inc.
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