For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim's website at www.maxim-ic.com.
General Description
The MAX9111/MAX9113 single/dual low-voltage differen-
tial signaling (LVDS) receivers are designed for high-
speed applications requiring minimum power
consumption, space, and noise. Both devices support
switching rates exceeding 500Mbps while operating from
a single +3.3V supply, and feature ultra-low 300ps (max)
pulse skew required for high-resolution imaging applica-
tions such as laser printers and digital copiers.
The MAX9111 is a single LVDS receiver, and the
MAX9113 is a dual LVDS receiver.
Both devices conform to the EIA/TIA-644 LVDS standard
and convert LVDS to LVTTL/CMOS-compatible outputs.
A fail-safe feature sets the outputs high when the inputs
are undriven and open, terminated, or shorted. The
MAX9111/MAX9113 are available in space-saving 8-pin
SOT23 and SO packages. Refer to the MAX9110/
MAX9112 data sheet for single/dual LVDS line drivers.
________________________Applications
Features
oLow 300ps (max) Pulse Skew for High-Resolution
Imaging and High-Speed Interconnect
oSpace-Saving 8-Pin SOT23 and SO Packages
oPin-Compatible Upgrades to DS90LV018A and
DS90LV028A (SO Packages Only)
oGuaranteed 500Mbps Data Rate
oLow 29mW Power Dissipation at 3.3V
oConform to EIA/TIA-644 Standard
oSingle +3.3V Supply
oFlow-Through Pinout Simplifies PCB Layout
oFail-Safe Circuit Sets Output High for Undriven
Inputs
oHigh-Impedance LVDS Inputs when Powered Off
MAX9111/MAX9113
Single/Dual LVDS Line Receivers with
Ultra-Low Pulse Skew in SOT23
________________________________________________________________
Maxim Integrated Products
1
OUT2
GND
OUT1
VCC
IN2+
IN2-
8
7
IN1-
IN1+
6
5
N.C.
GNDN.C.
1
2
8
7
VCC
OUTIN+
N.C.
IN-
SO
3
4
6
5
OUT2
GNDIN2-
1
2
8
7
VCC
OUT1IN1+
IN2+
IN1-
SO
3
4
6
5
MAX9113MAX9113
MAX9111
1
2
8
7
N.C.
IN+
N.C.
IN-
SOT23 SOT23
3
4
6
5
OUT
N.C.
VCC
GND
1
2
3
4
MAX9111MAX9111
H = LOGIC LEVEL HIGH
L = LOGIC LEVEL LOW
(IN_+) - (IN_-)
≥ 100mV
≥
-100mV
OUT_
H
L
H
H
H
OPEN
SHORT
100Ω PARALLEL TERMINATION (UNDRIVEN)
Pin Configurations/Functional Diagrams/Truth Table
19-1803; Rev 3; 3/09
Ordering Information
PART TEMP
RANGE
PIN-
PACKAGE
TOP
MARK
MAX9111EKA -40°C to +85°C 8 SOT23 AAEE
MAX9111ESA -40°C to +85°C 8 SO —
MAX9113EKA -40°C to +85°C 8 SOT23 AAED
MAX9113ESA -40°C to +85°C 8 SO —
MAX9113ASA/V+ -40°C to +125°C 8 SO —
Laser Printers
Digital Copiers
Cellular Phone
Base Stations
Telecom Switching
Equipment
Network Switches/Routers
LCD Displays
Backplane Interconnect
Clock Distribution
Typical Operating Circuit appears at end of data sheet.
/V denotes an automotive qualified part.
+
Denotes a lead(Pb)-free/RoHS-compliant package.
MAX9111/MAX9113
Single/Dual LVDS Line Receivers with
Ultra-Low Pulse Skew in SOT23
2 _______________________________________________________________________________________
ABSOLUTE MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS
(VCC = +3.0V to +3.6V, magnitude of input voltage, |VID| = +0.1V to +1.0V, VCM = |VID|/2 to (2.4V - (|VID|/2)), TA= TMIN to TMAX.
Typical values are at VCC = +3.3V and TA= +25°C, unless otherwise noted.) (Notes 1, 2)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
VCC to GND..............................................................-0.3V to +4V
IN_ _ to GND .........................................................-0.3V to +3.9V
OUT_ _ to GND...........................................-0.3V to (VCC + 0.3V)
ESD Protection All Pins
(Human Body Model, IN_+, IN_-) ..................................±11kV
Continuous Power Dissipation (TA= +70°C)
8-Pin SOT23 (derate 8.9mW/°C above +70°C)............714mW
8-Pin SO (derate 5.88mW°C above +70°C).................471mW
Operating Temperature Ranges
MAX911_E .......................................................-40°C to +85°C
MAX911_A .....................................................-40°C to +125°C
Storage Temperature Range .............................-65°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
Differential Input High Threshold
(Note 3) VTH VCM = 0.05V, 1.2V, 2.75V at 3.3V 100 mV
Differential Input Low Threshold
(Note 3) VTL VCM = 0.05V, 1.2V, 2.75V at 3.3V -100 mV
Differential Input Resistance RDIFF VCM = 0.2V or 2.2V, VID = ±0.4V,
VCC = 0 or 3.6V 518 kΩ
VID = +200mV 2.7
Inputs shorted,
undriven 2.7
Output High Voltage (OUT_) VOH IOH = -4mA
100Ω parallel
termination,
undriven
2.7
V
Output Low Voltage (OUT_) VOL IOL = 4mA, VID = -200mV 0.4
Output Short-Circuit Current IOS VID = +200mV, VOUT_ = 0 -100 mA
MAX9111 4.2 6
No-Load Supply Current ICC MAX9113 8.7 11 mA
MAX9111/MAX9113
Single/Dual LVDS Line Receivers with
Ultra-Low Pulse Skew in SOT23
_______________________________________________________________________________________ 3
SWITCHING CHARACTERISTICS
(VCC = +3.0V to +3.6V, TA= TMIN to TMAX. Typical values are at VCC = +3.3V and TA= +25°C, unless otherwise noted.) (Notes 4, 5, 6)
Note 1: Maximum and minimum limits over temperature are guaranteed by design and characterization. Devices are production
tested at TA= +25°C.
Note 2: Current into the device is defined as positive. Current out of the devices is defined as negative. All voltages are referenced
to ground except VTH and VTL.
Note 3: Guaranteed by design, not production tested.
Note 4: AC parameters are guaranteed by design and characterization.
Note 5: CLincludes probe and test jig capacitance.
Note 6: fMAX generator output conditions: tR= tF< 1ns (0 to 100%), 50% duty cycle, VOH = 1.3V, VOL = 1.1V.
Note 7: tSKD1 is the magnitude difference of differential propagation delays in a channel. tSKD1 = |tPLHD - tPHLD|.
Note 8: tSKD2 is the magnitude difference of the tPLHD or tPHLD of one channel and the tPLHD or tPHLD of the other channel on the
same device.
Note 9: tSKD3 is the magnitude difference of any differential propagation delays between devices at the same VCC and within 5°C
of each other.
Note 10: tSKD4, is the magnitude difference of any differential propagation delays between devices operating over the rated supply
and temperature ranges.
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
TA = +85°C 1.0 1.77 2.5
Differential Propagation Delay
High to Low tPHLD
CL = 15pF, VID =
±200mV, VCM = 1.2V
(Figures 1, 2) TA = +125°C 3.0
ns
TA = +85°C 1.0 1.68 2.5
Differential Propagation Delay
Low to High tPLHD
CL = 15pF, VID =
±200mV, VCM = 1.2V
(Figures 1, 2) TA = +125°C 3.0
ns
Differential Pulse Skew
|tPLHD - tPHLD| (Note 7) tSKD1 90 300 ps
Differential Channel-to-Channel
Skew; Same Device (MAX9113
only) (Note 8)
tSKD2 140 400 ps
Differential Part-to-Part Skew
(Note 9) tSKD3 1ns
Differential Part-to-Part Skew
(MAX9113 only) (Note 10) tSKD4
CL = 15pF, VID = ±200mV, VCM = 1.2V
(Figures 1, 2)
1.5 ns
TA = +85°C 0.6 0.8
Rise Time tTLH
CL = 15pF, VID =
±200mV, VCM = 1.2V
(Figures 1, 2) TA = +125°C 1.0
ns
TA = +85°C 0.6 0.8
Fall Time tTHL
CL = 15pF, VID =
±200mV, VCM = 1.2V
(Figures 1, 2) TA = +125°C 1.0
ns
Maximum Operating Frequency fMAX
All channels switching, CL = 15pF,
VOL (max) = 0.4V, VOH (min) = 2.7V,
40% < duty cycle < 60% (Note 6)
250 300 MHz
Test Circuit Diagrams
MAX9111/MAX9113
Single/Dual LVDS Line Receivers with
Ultra-Low Pulse Skew in SOT23
4 _______________________________________________________________________________________
CL
GENERATOR OUT_
R
IN_+
IN_-
50Ω 50Ω
VOH
VOL
IN_-
IN_+
OUT_
tPHLD
+1.2V
tTHL
20%
80%
80%
50% 50%
tTLH
20%
DIFFERENTIAL
0V
tPLHD
VID = 200mV
+1.1V
+1.3V
Figure 1. Receiver Propagation Delay and Transition Time Test Circuit
Figure 2. Receiver Propagation Delay and Transition Time Waveforms
MAX9111/MAX9113
Single/Dual LVDS Line Receivers with
Ultra-Low Pulse Skew in SOT23
_______________________________________________________________________________________ 5
Typical Operating Characteristics
(VCC = 3.3V, |VID| = 200mV, VCM = 1.2V, fIN = 200MHz, CL= 15pF, TA= +25°C and over recommended operating conditions,
unless otherwise specified.)
3.0 3.23.1 3.3 3.4 3.5 3.6
MAX9111 toc01
SUPPLY VOLTAGE (V)
OUTPUT HIGH VOLTAGE (V)
OUTPUT HIGH VOLTAGE
vs. SUPPLY VOLTAGE
2.5
2.7
2.6
2.8
2.9
3.0
3.1
3.2
3.3
3.4
3.5
3.6
3.7
IOUT_ = 4mA
3.0 3.2 3.33.1 3.4 3.5 3.6
MAX9111 toc02
SUPPLY VOLTAGE (V)
OUTPUT LOW VOLTAGE (mV)
OUTPUT LOW VOLTAGE
vs. SUPPLY VOLTAGE
130
120
110
100
90
IOUT_ = 4mA
48
58
53
68
63
78
73
83
3.0 3.2 3.33.1 3.4 3.5 3.6
MAX9111 toc03
SUPPLY VOLTAGE (V)
OUTPUT SHORT-CIRCUIT CURRENT (mA)
OUTPUT SHORT-CIRCUIT CURRENT
vs. SUPPLY VOLTAGE
VID = 200mV
14
16
20
18
22
24
3.0 3.23.1 3.3 3.4 3.5 3.6
MAX9111 toc04
SUPPLY VOLTAGE (V)
DIFFERENTIAL THRESHOLD VOLTAGE (mV)
DIFFERENTIAL THRESHOLD VOLTAGE
vs. SUPPLY VOLTAGE
HIGH-LOW
LOW-HIGH
0.01 0.1 1 10 100 1000
MAX9111 toc05
FREQUENCY (MHz)
POWER-SUPPLY CURRENT (mA)
0
20
10
40
30
50
60
BOTH CHANNELS SWITCHING
ONE SWITCHING
MAX9113 POWER-SUPPLY CURRENT
vs. FREQUENCY
-40 10-15 35 60 85
MAX9111 toc06
TEMPERATURE (°C)
POWER-SUPPLY CURRENT (mA)
POWER-SUPPLY CURRENT
vs. TEMPERATURE
6.5
6.7
6.6
6.8
6.9
7.0
7.1
7.2
7.3
7.4
7.5
7.6
7.7
fIN = 1MHz
BOTH CHANNELS SWITCHING
1.50
1.60
1.55
1.65
1.70
1.75
1.80
1.85
1.90
1.95
2.00
2.05
2.10
3.0 3.1 3.2 3.43.3 3.5 3.6
DIFFERENTIAL PROPAGATION DELAY
vs. SUPPLY VOLTAGE
MAX9111 toc07
SUPPLY VOLTAGE (V)
DIFFERENTIAL PROPAGATION DELAY (ns)
tPHLD
tPLHD
1.50
1.60
1.55
1.65
1.75
1.70
1.80
1.85
1.90
2.00
1.95
2.05
2.10
2.15
2.20
-40-1510356085
DIFFERENTIAL PROPAGATION DELAY
vs. TEMPERATURE
MAX9111 toc08
TEMPERATURE (°C)
DIFFERENTIAL PROPAGATION DELAY (ns)
tPHLD
tPLHD
120
100
80
60
40
3.0 3.33.1 3.2 3.4 3.5 3.6
DIFFERENTIAL PULSE SKEW
vs. SUPPLY VOLTAGE
MAX9111 toc09
SUPPLY VOLTAGE (V)
DIFFERENTIAL SKEW (ns)
MAX9111/MAX9113
Single/Dual LVDS Line Receivers with
Ultra-Low Pulse Skew in SOT23
6 _______________________________________________________________________________________
1.0
1.6
1.4
1.2
1.8
2.0
2.2
2.4
2.6
2.8
3.0
0 1000500 1500 2000 2500
DIFFERENTIAL PROPAGATION DELAY
vs. DIFFERENTIAL INPUT VOLTAGE
MAX9111 toc11
DIFFERENTIAL INPUT VOLTAGE (mV)
DIFFERENTIAL PROPAGATION DELAY (ns)
fIN = 20MHz
tPHLD
tPLHD
0
50
150
100
200
250
-40 10-15 35 60 85
MAX9111 toc10
TEMPERATURE (°C)
DIFFERENTIAL SKEW (ps)
DIFFERENTIAL PULSE SKEW
vs. TEMPERATURE
1.6
1.8
1.7
2.0
1.9
2.1
2.2
0 1.0 1.50.5 2.0 2.5 3.0
DIFFERENTIAL PROPAGATION DELAY
vs. COMMON-MODE VOLTAGE
MAX91111 toc12
COMMON-MODE VOLTAGE (V)
tPHLD
tPLHD
DIFFERENTIAL PROPAGATION DELAY (ns)
fIN = 20MHz
330
430
380
530
480
630
580
680
-40 10-15 356085
MAX9111 toc14
TEMPERATURE (°C)
TRANSITION TIME (ps)
TRANSITION TIME vs. TEMPERATURE
tTHL
tTLH
1.5
1.9
1.7
2.3
2.1
2.5
2.7
2.9
3.1
10 20 2515 30 35 40 45 50
MAX9111 toc15
LOAD (pF)
DIFFERENTIAL PROPAGATION DELAY (ns)
tPHLD
DIFFERENTIAL PROPAGATION DELAY
vs. LOAD
tPLHD
Typical Operating Characteristics (continued)
200
600
1000
1400
1800
2200
10 2015 25 30 35 40 45 50
TRANSITION TIME vs. LOAD
MAX9111 toc16
LOAD (pF)
TRANSITION TIME (ps)
tTHL
tTLH
(VCC = 3.3V, |VID| = 200mV, VCM = 1.2V, fIN = 200MHz, CL= 15pF, TA= +25°C and over recommended operating conditions,
unless otherwise specified.)
MAX9111/MAX9113
Single/Dual LVDS Line Receivers with
Ultra-Low Pulse Skew in SOT23
_______________________________________________________________________________________ 7
_______________Detailed Description
LVDS Inputs
The MAX9111/MAX9113 feature LVDS inputs for inter-
facing high-speed digital circuitry. The LVDS interface
standard is a signaling method intended for point-to-
point communication over a controlled impedance
media, as defined by the ANSI/EIA/TIA-644 standards.
The technology uses low-voltage signals to achieve fast
transition times, minimize power dissipation, and noise
immunity. Receivers such as the MAX9111/MAX9113
convert LVDS signals to CMOS/LVTTL signals at rates
in excess of 500Mbps. The devices are capable of
detecting differential signals as low as 100mV and as
high as 1V within a 0V to 2.4V input voltage range . The
LVDS standard specifies an input voltage range of 0 to
2.4V referenced to ground.
Fail-Safe
The fail-safe feature sets the output to a high state
when the inputs are undriven and open, terminated, or
shorted. When using one channel in the MAX9113,
leave the unused channel open. The fail-safe feature is
not guaranteed to be operational above +85°C.
ESD Protection
As with all Maxim devices, ESD-protection structures are
incorporated on all pins to protect against electrostatic
discharges encountered during handling and assembly.
The receiver inputs of the MAX9111/MAX9113 have extra
protection against static electricity. Maxim’s engineers
have developed state-of-the-art structures to protect
these pins against ESD of ±11kV without damage. The
ESD structures withstand high ESD in all states: normal
operation, shutdown, and powered down.
ESD protection can be tested in various ways; the
receiver inputs of this product family are characterized
for protection to the limit of ±11kV using the Human
Body Model.
Human Body Model
Figure 3a shows the Human Body Model, and Figure
3b shows the current waveform it generates when dis-
charged into a low impedance. This model consists of a
100pF capacitor charged to the ESD voltage of interest,
which is then discharged into the test device through a
1.5kΩresistor.
Pin Description
PIN
MAX9111 MAX9113
SOT23-8 SO-8 SOT23-8 SO-8
NAME FUNCTION
1818V
CC Power Supply
2525GNDGround
8181IN-/IN1- Receiver Inverting Differential Input
7272IN+/IN1+ Receiver Noninverting Differential Input
— — 5 4 IN2- Receiver Inverting Differential Input
— — 6 3 IN2+ Receiver Noninverting Differential Input
3737OUT/OUT1 Receiver Output
— — 4 6 OUT2 Receiver Output
4, 5, 6 3, 4, 6 — — N.C. No Connection. Not internally connected.
__________ Applications Information
Supply Bypassing
Bypass VCC with high-frequency surface-mount ceram-
ic 0.1µF and 0.001µF capacitors in parallel, as close to
the device as possible, with the 0.001µF valued capaci-
tor the closest to the device. For additional supply
bypassing, place a 10µF tantalum or ceramic capacitor
at the point where power enters the circuit board.
Differential Traces
Output trace characteristics affect the performance of
the MAX9111/MAX9113. Use controlled impedance
traces to match trace impedance to both transmission
medium impedance and the termination resistor.
Eliminate reflections and ensure that noise couples as
common mode by running the differential traces close
together. Reduce skew by matching the electrical
length of the traces. Excessive skew can result in a
degradation of magnetic field cancellation.
Maintain the distance between the differential traces to
avoid discontinuities in differential impedance. Avoid
90° turns and minimize the number of vias to further
prevent impedance discontinuities.
Cables and Connectors
Transmission media should have a differential charac-
teristic impedance of about 100Ω. Use cables and con-
nectors that have matched impedance to minimize
impedance discontinuities.
Avoid the use of unbalanced cables such as ribbon or
simple coaxial cable. Balanced cables such as twisted
pair offer superior signal quality and tend to generate
less EMI due to canceling effects. Balanced cables
tend to pick up noise as common mode, which is
rejected by the LVDS receiver.
Termination
The MAX9111/MAX9113 input differential voltage
depends on the driver current and termination resis-
tance. Refer to the MAX9110/MAX9112 differential dri-
ver data sheet for this information.
Minimize the distance between the termination resistor
and receiver inputs. Use a single 1% to 2% surface-
mount resistor across the receiver inputs.
Board Layout
For LVDS applications, a four-layer PCB that provides
separate power, ground, LVDS signals, and input sig-
nals is recommended. Isolate the input and LVDS sig-
nals from each other to prevent coupling. For best
results, separate the input and LVDS signal planes with
the power and ground planes.
MAX9111/MAX9113
Single/Dual LVDS Line Receivers with
Ultra-Low Pulse Skew in SOT23
8 _______________________________________________________________________________________
CHARGE-CURRENT
LIMIT RESISTOR
DISCHARGE
RESISTANCE
STORAGE
CAPACITOR
Cs
100pF
RC
1MΩ
RD
1500Ω
HIGH-
VOLTAGE
DC
SOURCE
DEVICE
UNDER
TEST
IP 100%
90%
36.8%
tRL TIME
tDL
CURRENT WAVEFORM
PEAK-TO-PEAK RINGING
(NOT DRAWN TO SCALE)
Ir
10%
0
0
AMPERES
Figure 3a. Human Body ESD Test Modules Figure 3b. Human Body Current Waveform
MAX9111/MAX9113
Single/Dual LVDS Line Receivers with
Ultra-Low Pulse Skew in SOT23
_______________________________________________________________________________________ 9
Typical Operating Circuit
RT = 100Ω
0.001μF 0.1μF
+3.3V
DIN_
MAX9110
MAX9112
MAX9111
MAX9113
OUT_
LVDS
0.001μF 0.1μF
+3.3V
RECEIVERDRIVER
Chip Information
PROCESS: CMOS
Package Information
For the latest package outline information and land patterns, go
to www.maxim-ic.com/packages.
PACKAGE TYPE PACKAGE CODE DOCUMENT NO.
8 SOT23 K8-1 21-0078
8 SO S8-2 21-0041
MAX9111/MAX9113
Single/Dual LVDS Line Receivers with
Ultra-Low Pulse Skew in SOT23
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
10
____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600
© 2009 Maxim Integrated Products Maxim is a registered trademark of Maxim Integrated Products, Inc.
Revision History
REVISION
NUMBER
REVISION
DATE DESCRIPTION PAGES
CHANGED
0 — Initial release —
1 2/07 — 1, 2, 8, 10, 11
2 12/07 Updated Ordering Information, temperature, Switching Characteristics, Fail-Safe
section. 1, 2, 3, 7
3 3/09 Added /V designation to Ordering Information and updated Termination section. 1, 8
