1
MRF255 PHOTOMASTERMOTOROLA RF DEVICE DATA
The RF MOSFET Line
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 
N–Channel Enhancement–Mode
Figure 1. 54 MHz Linear RF Test Circuit Electrical Schematic
C1 — 470 pF, Chip Capacitor
C2, C3, C11, C12 — 20200 pF, Trimmer, ARCO #464
C4 — 100 pF, Chip Capacitor
C5, C17 — 100 µF, 15 V, Electrolytic
C6 — 0.001 µF, Disc Ceramic
C7, C8, C9, C10 — 330 pF, Chip Capacitor
C14 — 1200 pF, ATC Chip Capacitor
C15 — 910 pF, 500 V, Dipped Mica
C16 — 47 µF, 16 V, Electrolytic
L1 — 8 T urns, #20 AWG, 0.126 ID
L2 — 5 T urns, #18 AWG, 0.142 ID
L3 — 3 T urns, #20 AWG, 0.102 ID
L4 — 7 T urns, #24 AWG, 0.070 ID
L5 — 6.5 T urns, #18 AWG, 0.230 ID, 0.5 Long
N1, N2 — Type N Flange Mount
RFC1 — Ferroxcube VK–200–19/4B
R1 — 39 k, 1/4 W Carbon
R2 — 150 , 1/4 W Carbon
Board — G–10 .060
VGG VDD
RF
OUTPUT
RF
INPUT
RFC1
+++
C5 C6 C15 C16 C17
C4
C7 C8 L5
L1 L2 R2
R1
C2 C3
C1
N1 N2
C14
C9 C10 C11 C12
L3 L4
DUT
Handling and Packaging — MOS devices are susceptible to damage from electrostatic charge. Reasonable precautions in handling
and packaging MOS devices should be observed.
Order this document
by MRF255PHT/D
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SEMICONDUCTOR TECHNICAL DATA
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
CASE 211–11, STYLE 2
Motorola, Inc. 1996
REV 1
MRF255 PHOTOMASTER
2MOTOROLA RF DEVICE DATA
Figure 2. Photomaster for 54 MHz Narrowband Test Fixture
(SCALE: 1:1)
Figure 3. Test Fixture Photograph — MRF255
3
MRF255 PHOTOMASTERMOTOROLA RF DEVICE DATA
PACKAGE DIMENSIONS
CASE 211–11
ISSUE N
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
STYLE 2:
PIN 1. SOURCE
2. GATE
3. SOURCE
4. DRAIN
A
UM
M
Q
RB
1
4
32
D
K
E
SEATING
PLANE
C
J
H
DIM MIN MAX MIN MAX
MILLIMETERSINCHES
A0.960 0.990 24.39 25.14
B0.465 0.510 11.82 12.95
C0.229 0.275 5.82 6.98
D0.216 0.235 5.49 5.96
E0.084 0.110 2.14 2.79
H0.144 0.178 3.66 4.52
J0.003 0.007 0.08 0.17
K0.435 ––– 11.05 –––
M45 NOM 45 NOM
Q0.115 0.130 2.93 3.30
R0.246 0.255 6.25 6.47
U0.720 0.730 18.29 18.54
__
MRF255 PHOTOMASTER
4MOTOROLA RF DEVICE DATA
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MRF255PHT/D
*MRF255PHT/D*