100370 Low Power Universal Demultiplexer/Decoder General Description The 100370 universal demultiplexer/decoder functions as either a dual 1-of-4 decoder or as a single 1-of-8 decoder, depending on the signal applied to the Mode Control (M) input. In the dual mode, each half has a pair of active-LOW Enable (E) inputs. Pin assignments for the E inputs are such that in the 1-of-8 mode they can easily be tied together in pairs to provide two active-LOW enables (E1a to E1b, E2a to E2b). Signals applied to auxiliary inputs Ha, Hb and Hc determine whether the outputs are active HIGH or active LOW. In the dual 1-of-4 mode the Address inputs are A0a, A1a and A0b, A1b with A2a unused (i.e., left open, tied to VEE or with LOW signal applied). In the 1-of-8 mode, the Address inputs are A0a, A1a, A2a with A0b and A1b LOW or open. All inputs have 50 k pulldown resistors. Features n n n n 35% power reduction of the 100170 2000V ESD protection Pin/function compatible with 100170 Voltage compensated operating range = -4.2V to -5.7V Logic Symbols Single 1-of 8 Application Dual 1-of-4 Application DS100311-1 Pin Names DS100311-4 Description Ana, Anb Address Inputs Ena, Enb Enable Inputs M Mode Control Input Ha Z0-Z3 (Z0a-Z3a) Hb Z4-Z7 (Z0b-Z3b) Hc Common Polarity Z0-Z7 Single 1-of-8 Zna, Znb Dual 1-of-4 Polarity Select Input Polarity Select Input Select Input Data Outputs Data Outputs (c) 1998 National Semiconductor Corporation DS100311 www.national.com 100370 Low Power Universal Demultiplexer/Decoder August 1998 Connection Diagrams 24-Pin DIP 24-Pin Quad Cerpak DS100311-2 DS100311-3 Logic Diagram DS100311-6 Note 1: (Zn) for 1-of-4 applications. www.national.com 2 Truth Tables Dual 1-of-4 Mode (M = A2a = Hc = LOW) Inputs Active HIGH Outputs Active LOW Outputs (Ha and Hb Inputs HIGH) (Ha and Hb Inputs LOW) E1a E2a A1a A0a Z0a Z1a Z2a Z3a Z0a Z1a Z2a Z3a E1b E2b A1b A0b Z0b Z1b Z2b Z3b Z0b Z1b Z2b Z3b H X X X L L L L H H H H X H X X L L L L H H H H L L L L H L L L L H H H L L L H L H L L H L H H L L H L L L H L H H L H L L H H L L L H H H H L Single 1-of-8 Mode (M = HIGH; A0b = A1b = Ha = Hb = LOW) Inputs Active HIGH Outputs (Note 2) (Hc Input HIGH) E1 E2 A2a A1a A0a Z0 Z1 Z2 Z3 Z4 Z5 Z6 Z7 H X X X X L L L L L L L L X H X X X L L L L L L L L L L L L L H L L L L L L L L L L L H L H L L L L L L L L L H L L L H L L L L L L L L H H L L L H L L L L L L H L L L L L L H L L L L L H L H L L L L L H L L L L H H L L L L L L L H L L L H H H L L L L L L L H H = HIGH Voltage Level L = LOW Voltage Level X = Don't Care E1 = E1a and E1b wired; E2 = E22a and E2b wired Note 2: for Hc = LOW, output states are complemented 3 www.national.com Absolute Maximum Ratings (Note 3) 2000V ESD (Note 4) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. Recommended Operating Conditions Above which the useful life may be impaired. -65C to +150C Storage Temperature (TSTG) Maximum Junction Temperature (TJ) Ceramic +175C -7.0V to +0.5V VEE Pin Potential to Ground Pin Input Voltage (DC) VEE to +0.5V Output Current (DC Output HIGH) -50 mA Case Temperature (TC) Military Supply Voltage (VEE) -55C to +125C -5.7V to -4.2V Note 3: Absolute maximum ratings are those values beyond which the device may be damaged or have its useful life impaired. Functional operation under these conditions is not implied. Note 4: ESD testing conforms to MIL-STD-883, Method 3015. Military Version DC Electrical Characteristics VEE = -4.2V to -5.7V, VCC = VCCA = GND, TC = -55C to +125C Symbol VOH VOL VOHC VOLC VIH Parameter Max Units TC -870 mV 0C to -1085 -870 mV -55C VIN = VIH (Max) Loading with -1830 -1620 mV 0C to or VIL (Min) 50 to -2.0V -1830 -1555 mV -55C -1035 mV 0C to -1085 mV -55C VIN = VIH (Min) Loading with -1610 mV 0C to or VIL (Max) 50 to -2.0V -1555 mV -55C -870 mV -55C to Output HIGH Voltage Output HIGH Voltage +125C Output LOW Voltage Input LOW Voltage Input LOW Current -1165 -1830 -1475 mV -55C to 0.50 A -55C to +125C IIH (Notes 5, 6, 7) +125C +125C IIL (Notes 5, 6, 7) +125C +125C VIL Notes +125C Output LOW Voltage Input HIGH Voltage Conditions Min -1025 Guaranteed HIGH Signal for (Notes 5, 6, 7, 8) All Inputs Guaranteed LOW Signal for (Notes 5, 6, 7, 8) All Inputs VEE = -4.2V (Notes 5, 6, 7) VIN = VIL (Min) Input HIGH Current 240 A 25C to +125C IEE Power Supply Current -105 340 A -55C -36 mA -55C to VEE = -5.7V VIN = VIH (Max) (Notes 5, 6, 7) Inputs Open (Notes 5, 6, 7) +125C Note 5: F100K 300 Series cold temperature testing is performed by temperature soaking (to guarantee junction temperature equals -55C, then testing immediately without allowing for the junction temperature to stabilize due to heat dissipation after power-up. This provides "cold start" specs which can be considered a worst case condition at cold temperatures. Note 6: Screen tested 100% on each device at -55C, +25C, and +125C, Subgroups 1, 2, 3, 7, and 8. Note 7: Sample tested (Method 5005, Table I) on each manufactured lot at -55C, +25C, and +125C, Subgroups A1, 2, 3, 7, and 8. Note 8: Guaranteed by applying specific input condition and testing VOH/VOL. www.national.com 4 AC Electrical Characteristics VEE = -4.2V to -5.7V, VCC = VCCA = GND Symbol Parameter tPLH Propagation Delay tPHL Ena, Enb to Output tPLH Propagation Delay tPHL Ana, Anb to Output tPLH Propagation Delay tPHL Ha, Hb, Hc to Output tPLH Propagation Delay tPHL M to Output tTLH Transition Time tTHL 20% to 80%, 80% to 20% TC = -55C TC = +25C TC = +125C Units Min Max Min Max Min Max 0.3 2.40 0.4 2.20 0.40 2.70 ns 0.30 2.60 0.40 2.40 0.40 2.90 ns 0.30 2.60 0.40 2.40 0.40 2.40 ns 0.40 3.10 0.60 2.80 0.70 3.70 ns 0.30 1.60 0.30 1.60 0.30 1.60 ns Conditions Notes Figures 1, 2 (Notes 9, 10, 11) (Note 12) Note 9: F100K 300 Series cold temperature testing is performed by temperature soaking (to guarantee junction temperature equals -55C), then testing immediately without allowing for the junction temperature to stabilize due to heat dissipation after power-up. This provides "cold start" specs which can be considered a worst case condition at cold temperatures. Note 10: Screen tested 100% on each device at +25C, temperature only, Subgroup A9. Note 11: Sample tested (Method 5005, Table I) on each Mfg. lot at +25C, Subgroup A9, and at +125C, and -55C Temp., Subgroups A10 and A11. Note 12: Not tested at +25C, +125C and -55C Temperature (design characterization data). Test Circuit DS100311-7 Notes: VCC, VCCA = +2V, VEE = -2.5V L1 and L2 = equal length 50 impedance lines RT = 50 terminator internal to scope Decoupling 0.1 F from GND to VCC and VEE All unused outputs are loaded with 50 to GND CL = Fixture and stray capacitance 3 pF Pin numbers shown are for flatpak; for DIP see logic symbol FIGURE 1. AC Test Circuit 5 www.national.com Switching Waveforms DS100311-8 FIGURE 2. Propagation Delay and Transition Times www.national.com 6 Physical Dimensions inches (millimeters) unless otherwise noted 24-Lead Ceramic Dual-In-Line Package (D) NS Package Number J24E 24-Lead Ceramic Flatpak (F) NS Package Number W24B 7 www.national.com 100370 Low Power Universal Demultiplexer/Decoder LIFE SUPPORT POLICY NATIONAL'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component in any component of a life support 1. Life support devices or systems are devices or sysdevice or system whose failure to perform can be reatems which, (a) are intended for surgical implant into sonably expected to cause the failure of the life support the body, or (b) support or sustain life, and whose faildevice or system, or to affect its safety or effectiveness. ure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. 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