MAX9611AUB+ - MAXIM INTEGRATED PRODUCTS

_______________________________________________________________ Maxim Integrated Products 1

For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,

or visit Maxim’s website at www.maxim-ic.com.

High-Side, Current-Sense Amplifiers with

12-Bit ADC and Op Amp/Comparator

MAX9611/MAX9612

General Description

The MAX9611/MAX9612 are high-side current-sense

amplifiers with an integrated 12-bit ADC and a gain

block that can be configured either as an op amp or

comparator, making these devices ideal for a number of

industrial and automotive applications.

The high-side, current-sense amplifiers operate over a

wide 0V to 60V input common-mode voltage range. The

programmable full-scale voltage (440mV, 110mV, and

55mV) of these amplifiers offers wide dynamic range,

accurate current measurement, and application flexibility

in choosing sense resistor values. A choice of either an

internal op amp or a comparator is provided to the user.

The internal amplifier can be used to limit the inrush cur-

rent or to create a current source in a closed-loop sys-

tem. The comparator can be used to monitor fault events

for fast response.

An I2C controlled 12-bit, 500sps analog-to-digital con-

verter (ADC) can be used to read the voltage across the

sense resistor (VSENSE), the input common-mode voltage

(VRSCM), op-amp/comparator output (VOUT), op-amp/

comparator reference voltage (VSET), and internal die

temperature. The I2C bus is compatible with 1.8V and

3.3V logic, allowing modern microcontrollers to interface

to it.

The MAX9611 features a noninverting input-to-output

configuration while the MAX9612 features an inverting

input-to-output configuration.

The MAX9611/MAX9612 operate with a 2.7V to 5.5V

supply voltage range, are fully specified over the -40NC

to +125NC automotive temperature range, and are avail-

able in a 3mm x 5mm, 10-pin FMAXM package.

Applications

Hybrid Automotive Power Supplies

Server Backplanes

Base-Station PA Control

Base-Station Feeder Cable Bias-T

Telecom Cards

Battery-Operated Equipment

Features

S 0V to +60V Input Common-Mode Voltage Range

S 2.7V to 5.5V Power-Supply Range, Compatible

with 1.8V and 3.3V Logic

S 5µA Software Shutdown Current

S Integrated 12-Bit ADC

S 13µV Current-Sense ADC Resolution

S 500µV (max) Current-Sense ADC Input Offset

Voltage

S 0.5% (max) Current-Sense ADC Gain Error

S I2C Bus with 16 Addresses

S Small, 3mm x 5mm 10-Pin µMAX Package

S -40NC to +125NC Operating Temperature Range

19-5543; Rev 3; 6/11

Note: All devices operate over the -40NC to +125NC tempera-

ture range.

+Denotes a lead(Pb)-free/RoHS-compliant package.

Functional Diagrams appear at end of data sheet.

Ordering Information/

Selector Guide

MAX is a registered trademark of Maxim Integrated Products, Inc.

Typical Application Circuit

EVALUATION KIT

AVAILABLE

PART OUTPUT PIN-PACKAGE

MAX9611AUB+ Noninverting 10 FMAX

MAX9612AUB+ Inverting 10 FMAX

MAX9611

MAX9612

VCC

µC

1.8V LOGIC

SCL

SDA

RS+ RS-

SCL

SDA

OUT

SET

GND

0.1µF

VIN

0V TO 60V

LOAD

RSENSE

High-Side, Current-Sense Amplifiers with

12-Bit ADC and Op Amp/Comparator

MAX9611/MAX9612

2 ______________________________________________________________________________________

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional

operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute

maximum rating conditions for extended periods may affect device reliability.

VCC to GND .............................................................-0.3V to +6V

RS+, RS-, OUT to GND .........................................-0.3V to +65V

Differential Input Voltage, RS+ - RS- ................................. Q65V

All Other Pins to GND .............................................-0.3V to +6V

OUT Short-Circuit to GND ......................................... Continuous

Continuous Current into Any Pin ..................................... Q20mA

Continuous Power Dissipation (TA = +70NC)

10-Pin FMAX (derate 8.8mW/NC above +70NC)...........707mW

FMAX Package Junction-to-Ambient

Thermal Resistance (BJA) (Note 1) ............................113NC/W

Operating Temperature Range ........................ -40NC to +125NC

Junction Temperature .....................................................+150NC

Storage Temperature Range ............................ -65NC to +150NC

Lead Temperature (soldering, 10s) ................................+300NC

Soldering Temperature (reflow) ......................................+260NC

ELECTRICAL CHARACTERISTICS

(VCC = 3.3V, VRS+ = VRS- = +12V, VSENSE = (VRS+ - VRS-) = 0V, TA = -40NC to +125NC, unless otherwise noted. Typical values are

at TA = +25NC.) (Note 2)

ABSOLUTE MAXIMUM RATINGS

Note 1: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-

layer board. For detailed information on package thermal consideration, refer to www.maxim-ic.com/thermal-tutorial.

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

CURRENT-SENSE AMPLIFIER DC CHARACTERISTICS

Input Common-Mode Range Guaranteed by CMRR 0 60 V

Input Offset Voltage ADC Path

(Note 3) VOS

TA = +25NC, gain = 8x 0.045 0.5

TA = -40NC to +125NC, gain = 8x 2

TA = +25NC, gain = 4x 0.045 0.5

TA = -40NC to +125NC, gain = 4x 2

TA = +25NC, gain = 1x 0.1 0.8

TA = -40NC to +125NC, gain = 1x 2.6

Gain Error (Note 3) GE

TA = +25NC, gain = 8x 0.1 0.5

TA = -40NC to + 85NC, gain = 8x 1.8

TA = -40NC to +125NC, gain = 8x 2.5

TA = +25NC, gain = 4x 0.4 1.7

TA = -40NC to +125NC, gain = 4x 3.1

TA = +25NC, gain = 1x 1 4

TA = -40NC to +125NC, gain = 1x 4.7

Differential Input Resistance RINDM 300 kI

Common-Mode Input Resistance RINCM 12 MI

Input Bias Current IRS+, IRS- TA = +25NC1 2 FA

TA = -40NC to +125NC5

Input Offset Current (Note 4) (IRS+) - (IRS-) TA = +25NC3 6 nA

TA = -40NC to +125NC6

High-Side, Current-Sense Amplifiers with

12-Bit ADC and Op Amp/Comparator

MAX9611/MAX9612

_______________________________________________________________________________________ 3

ELECTRICAL CHARACTERISTICS (continued)

(VCC = 3.3V, VRS+ = VRS- = +12V, VSENSE = (VRS+ - VRS-) = 0V, TA = -40NC to +125NC, unless otherwise noted. Typical values are

at TA = +25NC.) (Note 2)

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

Common-Mode Rejection Ratio CMRR

VRS- = 0V to 60V,

TA = +25NC

Gain = 8x,

VSENSE = 50mV 106 120

Gain = 4x,

VSENSE = 100mV 106 120

Gain = 1x,

VSENSE =400mV 100 120

VRS- = 0V to 60V,

TA = -40NC to +125NC

Gain 8x,

VSENSE = 50mV 94

Gain 4x,

VSENSE = 100mV 94

Gain 1x,

VSENSE = 400mV 84

Power-Supply Rejection Ratio PSRR VCC = 2.7V to 5.5V

Gain = 8x,

VSENSE = 50mV 57 72

Gain = 4x,

VSENSE = 100mV 56 67

Gain = 1x,

VSENSE = 400mV 48 57

Full-Scale Sense Voltage FS Used in gain error

measurement

Gain = 8x 55

mVGain = 4x 110

Gain = 1x 440

LSB Step Size LSB

Gain = 8x 13.44

Gain = 4x 26.88

Gain = 1x 107.50

ANALOG PATH, CSA + AMPLIFIER/COMPARATOR

Input Offset Voltage VOS TA = +25NC0.350 4 mV

TA = -40NC to +125NC10

SET Input Bias Current IB1 50 nA

Maximum SET Input Voltage

Range 1.126 V

Signal Bandwidth BW Gain = 1x, RS- = 11.6V 4 MHz

Gain Bandwidth GBW 2.5 MHz

Propagation Delay tPD In comparator mode, 10mV overdrive 1.5 Fs

Internal Hysteresis VHYS In comparator mode, nonlatching 8 mV

Output Sink Current VOUT = 4V 15 mA

Output Leakage Current VOUT = 36V 1.7 3 FA

Output Voltage Low VOL ISINK = 8mA, TA = -40°C to +85°C 1 V

ISINK = 8mA, TA = -40NC to +125NC0.5 1.5

High-Side, Current-Sense Amplifiers with

12-Bit ADC and Op Amp/Comparator

MAX9611/MAX9612

4 ______________________________________________________________________________________

ELECTRICAL CHARACTERISTICS (continued)

(VCC = 3.3V, VRS+ = VRS- = +12V, VSENSE = (VRS+ - VRS-) = 0V, TA = -40NC to +125NC, unless otherwise noted. Typical values are

at TA = +25NC.) (Note 2)

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

OUT VOLTAGE MEASUREMENT (VOUT)

Full-Scale Input Voltage 57.3 V

LSB Step Size LSB 14 mV

Gain Error GE VRSCM =

(VRS+ - VRS-)/2

TA = +25NC0.8 6 %

TA = -40NC to +125°C7

Input Offset Voltage VOSOUT TA = +25NC14 110 mV

TA = -40NC to +125NC160

COMMON-MODE VOLTAGE MEASUREMENT (VRSCM)

Full-Scale Input Voltage 57.3 V

LSB Step Size LSB 14 mV

Gain Error GE VRSCM =

(VRS+ - VRS-)/2

TA = +25NC0.3 6 %

TA = -40NC to +125°C7

Input Offset Voltage VOSOUT TA = +25NC14 80 mV

TA = -40NC to +125NC160

SET VOLTAGE MEASUREMENT (VSET)

Full-Scale Input Voltage 1.10 V

LSB Step Size 268 FV

Gain Error GE VRSCM =

(VRS+ - VRS-)/2

TA = +25NC0.2 5 %

TA = -40NC to +125°C6

Input Offset Voltage VOSOUT TA = +25NC0.3 10 mV

TA = -40NC to +125NC14

Integral Nonlinearity INL 1 LSB

Differential Nonlinearity DNL 0.2 LSB

TEMPERATURE MEASUREMENT

Accuracy 0.48 NC

Typical Measurement Range -40 +125 NC

LSB Step Size LSB 0.48 NC

ANALOG-TO-DIGITAL CONVERTER

Resolution 12 Bit

Conversion Time 2 ms

SCL/SDA LOGIC LEVELS

Input Voltage Low VIL VCC = 2.7V to 5.5V 0.4 V

Input Voltage High VIH VCC = 2.7V to 5.5V 1.45 V

Input Hysteresis VHYS 0.05 x

VCC V

Input Leakage Current 1 200 nA

A1/A0 LOGIC LEVELS

Logic State 00-01 Threshold 1/4 x VCC V

Logic State 01-10 Threshold 1/2 x VCC V

Logic State 10-11 Threshold 3/4 x VCC V

Input Leakage Current 1 200 nA

High-Side, Current-Sense Amplifiers with

12-Bit ADC and Op Amp/Comparator

MAX9611/MAX9612

_______________________________________________________________________________________ 5

ELECTRICAL CHARACTERISTICS (continued)

(VCC = 3.3V, VRS+ = VRS- = +12V, VSENSE = (VRS+ - VRS-) = 0V, TA = -40NC to +125NC, unless otherwise noted. Typical values are

at TA = +25NC.) (Note 2)

Note 2: All devices are 100% production tested at TA = +25NC. Temperature limits are guaranteed by design.

Note 3: VOS and gain error of current-sense amplifier extrapolated from from a two-point measurement made at VSENSE = (VRS+ -

VRS-) = 5mV to 50mV in gain of 8x, 5mV to 100mV in gain of 4x, and 10mV to 400mV in gain of 1x.

Note 4: Guaranteed by design.

Note 5: CB is in pF.

I2C Timing Diagram

SCL

SDA

tRtF

tBUF

START

CONDITION

STOP

CONDITION

REPEATED START CONDITION

START CONDITION

tSU,STO

tHD,STA

tSU,STA

tHD,DAT

tSU,DAT

tLOW

tHIGH

tHD,STA

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

POWER-SUPPLY CHARACTERISTICS

Power-Supply Input Range VCC Guaranteed by PSRR 2.7 5.5 V

Quiescent Current ICC 1.6 2.6 mA

Shutdown Current ISHDN No activity on SCL 5 10 FA

I2C TIMING CHARACTERISTICS (COMPATIBLE WITH SMBus)

Serial-Clock Frequency fSCL 0 400 kHz

Bus Free Time Between a STOP

and a START Condition tBUF 1.3 Fs

Hold Time, (Repeated) START

Condition tDH,STA 0.6 Fs

SCL Clock Low Period tLOW 1.3 Fs

SCL Clock High Period tHIGH 0.6 Fs

Setup Time for a Repeated

START Condition tSU,STA 0.6 Fs

Data Hold Time tDH,DAT 0 900 Fs

Data Setup Time tSU,DAT 100 ns

SDA/SCL Receiving Rise Time tR(Note 5) 20 + 0.1CB300

nsSDA/SCL Receiving Fall Time tF(Note 5) 20 + 0.1CB300

SDA Transmitting Fall Time tF(Note 5) 20 + 0.1CB250

STOP Condition Setup Time tSU,STO 0.6 Fs

Bus Capacitance CB400 pF

Pulse Width of Spike Suppressed tSP 50 ns

High-Side, Current-Sense Amplifiers with

12-Bit ADC and Op Amp/Comparator

MAX9611/MAX9612

6 ______________________________________________________________________________________

Typical Operating Characteristics

(VCC = 3.3V, VCM = 12V, TA = +25NC, unless otherwise noted.)

CSA HISTOGRAM

MAX9611 toc01

VOFFSET_CSA (µV)

COUNTS

300

240

180

120

-60

-120

-180

-240

-300

GAIN = 8x

TOTAL OFFSET VOLTAGE

vs. COMMON-MODE VOLTAGE

MAX9611 toc03

VCM (V)

VOS (mV)

504010 20 30

-3

-2

-1

-4

ANALOG PATH TA = -40°C

TA = +25°C

TA = +85°C TA = +125°C

MAX9611 CSA OFFSET VOLTAGE

vs. COMMON-MODE VOLTAGE

MAX9611 toc02

VCM (V)

VOS (µV)

5040302010

-200

-100

100

200

300

400

500

600

700

-300

8x ADC PATH

TA = +125°C

TA = +85°C

TA = +25°C

TA = -40°C

RS- BIAS CURRENT

vs. COMMON-MODE VOLTAGE

MAX9611 toc06

VCM (V)

IBIAS (mA)

5040302010

TA = +125°C

TA = +85°C

TA = +25°C

TA = -40°C

RS+, RS- OFFSET CURRENT

vs. COMMON-MODE VOLTAGE

MAX9611 toc07

VCM (V)

IOFFSET (nA)

5040302010

0.5

1.0

1.5

2.0

2.5

CSA OFFSET VOLTAGE

vs. SUPPLY VOLTAGE

MAX9611 toc04

VCC (V)

VOS (µV)

5.04.54.03.53.0

-200

-150

-100

-50

100

150

200

-250

2.5 5.5

ADC PATH

GAIN = 8x

TOTAL OFFSET VOLTAGE

vs. SUPPLY VOLTAGE

MAX9611 toc05

VCC (V)

VOS (µV)

5.04.54.03.53.0

300

400

500

600

700

800

200

2.5 5.5

OP-AMP PATH

High-Side, Current-Sense Amplifiers with

12-Bit ADC and Op Amp/Comparator

MAX9611/MAX9612

_______________________________________________________________________________________ 7

Typical Operating Characteristics (continued)

(VCC = 3.3V, VCM = 12V, TA = +25NC, unless otherwise noted.)

TOTAL GAIN ERROR

vs. COMMON-MODE VOLTAGE

MAX9611 toc09

VCM (V)

GAIN ERROR (%)

5040302010

-0.8

-0.6

-0.4

-0.2

0.2

0.4

-1.0

ANALOG PATH

MAX9611 CSA GAIN ERROR

vs. COMMON-MODE VOLTAGE

MAX9611 toc08

VCM (V)

GAIN ERROR (%)

5040302010

-0.60

-0.80

-0.40

-0.20

0.20

0.40

0.60

0.80

1.00

-1.00

8x ADC PATH

+125°C

+25°C

+85°C

-40°C

SDA/SCL VOL

vs. SINKING CURRENT

MAX9611 toc10

SDA SINKING CURRENT (mA)

SDA VOL (V)

2.52.01.51.00.5

0.01

0.02

0.03

0.04

0.05

0 3.0

CSA GAIN vs. FREQUENCY

(RS+/RS- TO OUT PATH)

MAX9611 toc13

FREQUENCY (kHz)

GAIN (dB)

1,00010010

-20

-25

-10

-15

-5

-30

1 10,000

RS+ - RS- = VSENSE + VDC = 200mVP-P + 300mV

OP-AMP GAIN vs. FREQUENCY

(SET TO OUT)

MAX9611 toc14

FREQUENCY (kHz)

GAIN (dB)

1,00010010

-20

-25

-10

-15

-5

-30

1 10,000

RS+ - RS- = 220mV

VIN = 100mVP-P

OUTPUT LOW VOLTAGE

vs. OUTPUT SINK CURRENT

MAX9611 toc11

OUTPUT SINK CURRENT (mA)

OUTPUT LOW VOLTAGE (V)

20155 10

0.5

1.0

1.5

2.0

3.0

2.5

3.5

4.0

SUPPLY CURRENT vs. SUPPLY VOLTAGE

MAX9611 toc12

VCC (V)

ICC (mA)

5.04.54.03.53.0

0.8

1.1

1.4

1.7

2.0

0.5

2.5 5.5

High-Side, Current-Sense Amplifiers with

12-Bit ADC and Op Amp/Comparator

MAX9611/MAX9612

8 ______________________________________________________________________________________

Typical Operating Characteristics (continued)

(VCC = 3.3V, VCM = 12V, TA = +25NC, unless otherwise noted.)

CMRR vs. FREQUENCY

CSA ADC PATH

MAX9611 toc15

FREQUENCY (kHz)

CMRR (dB)

10010

-120

-100

-80

-60

-40

-20

-140

1 1000

VCM = 12V

VAC = 10VP-P

CMRR vs. FREQUENCY

ANALOG OP-AMP PATH

MAX9611 toc16

FREQUENCY (kHz)

CMRR (dB)

1001010.1

-115

-110

-105

-100

-95

-90

-85

-80

-75

-70

-120

0.01 1000

P-P NOISE (RS+/RS- TO OUT)

MAX9611 toc17

NOISE (5µV/div)

TIME (10s/div)

ADC NOISE HISTOGRAM ON

VSET = 0.5V

MAX9611 toc20

DIGITAL CODE

1889

1888

1886

1887

1879

1880

1881

1882

1883

1884

1885

1877

1878

100

200

300

400

500

600

700

800

900

1000

1876

1890

ADC NOISE HISTOGRAM ON

VSENSE = 20mV (GAIN = 8x)

MAX9611 toc21

DIGITAL CODE

1528

1527

1525

1526

1518

1519

1520

1521

1522

1523

1524

1516

1517

100

200

300

400

500

600

700

800

900

1000

1515

INTEGRAL NONLINEARITY

vs. DIGITAL OUTPUT CODE

(SET INPUT)

MAX9611 toc18

DIGITAL CODE

INL (LSB)

358430722048 25601024 1536512

-1.3

-1.1

-0.9

-0.7

-0.5

-0.3

-0.1

0.1

0.3

0.5

-1.5

0 4096

DIFFERENTIAL NONLINEARITY

vs. DIGITAL OUTPUT CODE

(SET INPUT)

MAX9611 toc19

DIGITAL CODE

DNL (LSB)

358430722048 25601024 1536512

-0.8

-0.6

-0.4

-0.2

0.2

0.4

0.6

0.8

1.0

-1.0

0 4096

High-Side, Current-Sense Amplifiers with

12-Bit ADC and Op Amp/Comparator

MAX9611/MAX9612

_______________________________________________________________________________________ 9

Typical Operating Characteristics (continued)

(VCC = 3.3V, VCM = 12V, TA = +25NC, unless otherwise noted.)

HOT-SWAP OPERATION WITH

p-CHANNEL FET MODE 000

MAX9611 toc22

VOLTAGE (5V/div)

TIME (100µs/div)

VPULLUP

VOUT (UNREGULATED)

VOUT (REGULATED)

ROUT = 8I

WATCHDOG LATCH RETRY MODE 111

MAX9611 toc23

VOLTAGE (5V/div)

TIME (400µs/div)

DTIM = 0, RTIM = 0

VSET = 600mV

PULSE WIDTH < 1ms

200mV/div

5V/divVOUT

VCSAIN

WATCHDOG LATCH RETRY MODE 111

MAX9611 toc24

TIME (4ms/div)

DTIM = 0, RTIM = 1

VSET = 600mV

PULSE WIDTH > 1ms

200mV/div

5V/divVOUT

VCSAIN

WATCHDOG LATCH RETRY MODE 111

MAX9611 toc27

TIME (10ms/div)

200mV/div

5V/div

VCSAIN

VOUT

DTIM = 0, RTIM = 0

VSET = 600mV

PULSE WIDTH > 1ms

WATCHDOG LATCH RETRY MODE 111

MAX9611 toc28

TIME (10ms/div)

200mV/div

5V/div

VCSAIN

VOUT

DTIM = 0, RTIM = 1

VSET = 600mV

PULSE WIDTH > 1ms

WATCHDOG LATCH MODE 111

MAX9611 toc25

TIME (100µs/div)

200mV/div

10V/div

VCSAIN

VOUT

DTIM = 1, RTIM = 1

VSET = 600mV

PULSE WIDTH > 1ms

WATCHDOG LATCH MODE 111

MAX9611 toc26

TIME (1ms/div)

200mV/div

5V/div

VCSAIN

VOUT DTIM = 0, RTIM = 1

VSET = 600mV

PULSE WIDTH > 1ms

High-Side, Current-Sense Amplifiers with

12-Bit ADC and Op Amp/Comparator

MAX9611/MAX9612

10 _____________________________________________________________________________________

Pin Description

Pin Configuration

VCC

SDASET

RS-

RS+

OUT

MAX9611

MAX9612

µMAX

TOP VIEW

SCLGND

PIN NAME FUNCTION

1 OUT Internal Amplifier/Comparator Output

2 RS+ Positive Current-Sensing Input. Power side connects to external sense resistor.

3 RS- Negative Current-Sensing Input. Load side connects to external sense resistor.

4 SET External Set-Point Voltage

5 GND Ground

6 SCL I2C Interface Clock Input

7 SDA I2C Interface Data Input/Output

8 A1 Address Input 1

9 A0 Address Input 0

10 VCC Supply Voltage Input. Bypass VCC to GND with a 0.1FF and a 4.7FF capacitor in parallel.

High-Side, Current-Sense Amplifiers with

12-Bit ADC and Op Amp/Comparator

MAX9611/MAX9612

______________________________________________________________________________________ 11

Functional Diagrams

MAX9611

RS+ RS-

OUT OP AMP/

COMP

CSA

2.5x 1x, 4x,

TEMP MUX

SET GND

VCC

SCL

SDA

DECODER

I2C

REGISTERS

12-BIT

ADC

MAX9612

RS+ RS-

OUT OP AMP/

COMP

CSA

2.5x 1x, 4x,

TEMP MUX

NOTE: ANALOG PATH IN BOLD.

SET GND

VCC

SCL

SDA

DECODER

I2C

REGISTERS

12-BIT

ADC

High-Side, Current-Sense Amplifiers with

12-Bit ADC and Op Amp/Comparator

MAX9611/MAX9612

12 _____________________________________________________________________________________

Detailed Description

The MAX9611/MAX9612 are high-side, current-sense

amplifiers with an integrated 12-bit ADC and an internal

selectable op amp/comparator. These devices are ideal

for a variety of industrial and automotive applications.

The MAX9611/MAX9612’s high-side, current-sense

amplifiers operate over a wide 0V to 60V input com-

mon-mode voltage range. The programmable full-scale

voltage (440mV, 110mV, and 55mV) allows for a wide

dynamic range current measurement and application

flexibility in choosing sense resistor values.

The I2C bus is 1.8V and 3.3V logic compatible and

can interface with modern microcontrollers. An internal

12-bit, 500sps integrating analog-to-digital converter

(ADC) allows the user to read analog signals such as die

temperature, VOUT, VSET, VRSCM, and VSENSE.

At power-up, the selectable op-amp/comparator block

is configured in the op-amp mode. The op amp has

an effective 60V Class A-type output stage and can be

used to limit inrush currents and create a current source

when used in a closed-loop system. When the internal

comparator is selected, the MAX9611/MAX9612 can

be configured to have a latched and retry functional-

ity, allowing a 60V open-drain transistor output, ideal to

operate high-side relay-disconnect FETs. The MAX9611

has a noninverting input-to-output configuration while the

MAX9612 has an inverting input-to-output configuration.

Current-Sense Amplifier

The MAX9611/MAX9612 feature a precision current-sense

amplifier with a 0V to 60V input common-mode voltage

range. An internal negative charge pump eliminates input

stage crossover distortion, typical in most rail-to-rail

input current-sense amplifiers. Low input bias currents

and low input offset currents allow a wide selection of

input filters to be designed without degrading the accu-

racy of the current-sense amplifier.

The current-sense amplifier inputs feature both a

-0.3V/+65V common-mode absolute maximum rating

as well as a Q65V differential absolute maximum rating,

allowing a wide variety of fault conditions to be withstood

easily by the device without damage.

The current-sense amplifier has a gain of 2.5V/V and

connects directly to the output op-amp/comparator

inputs. The ADC path features a 1x, 4x, and 8x program-

mable gain providing for 440mV, 110mV, and 55mV full-

scale sense voltage.

Analog-to-Digital Converter (ADC)

The MAX9611/MAX9612 feature an internal dual-slope

integrating 12-bit ADC that has a 2ms conversion time

and a 1.8V and 3.3V logic-compatible I2C bus. An inter-

nal mux allows the following on chip variables to be

read: input sense voltage, input common-mode voltage,

SET voltage, OUT voltage, and die temperature.

Temperature Measurement

Die temperature can be read by the ADC over the entire

operating range (-40NC to +125NC) with 0.5NC resolution.

Die temperature can be used for application calibration

and thermal monitoring and is available in a 9-bit, two’s

complement format. Readings outside of normal operat-

ing temperature range (-40NC to +125NC) are inaccurate

and should be considered invalid. See Table 1 for binary

and hex values.

Table 1. Binary and Hex Digital Output Values for Temperature Measurements

TEMPERATURE (NC) DIGITAL OUTPUT

BINARY HEX

+122.4 0111 1111 1xxx xxxx 7F8x

+24 0001 1001 0xxx xxxx 190x

+0.48 0000 0000 1xxx xxxx 008x

0 0000 0000 0xxx xxxx 000x

-0.48 1111 1111 1xxx xxxx FF8x

-24 1110 0111 0xxx xxxx E70x

-40 1101 1001 1xxx xxxx D98x

High-Side, Current-Sense Amplifiers with

12-Bit ADC and Op Amp/Comparator

MAX9611/MAX9612

______________________________________________________________________________________ 13

SET Voltage Measurement

The SET voltage serves as a reference voltage for the

internal op amp or comparator around which a control

loop can be designed. The low bias current for SET

allows high-impedance resistor-dividers and current-

output DACs to be used, making it easy to interface

without introducing additional errors.

The SET input can also serve as an auxiliary input port

to the ADC, if the op amp or comparator is not utilized

in the application. Its full-scale input range extends from

0V to 1.10V.

OUT Voltage Measurement

The internal amplifier/comparator output voltage can be

monitored over the entire 0V to 57.3V range by the ADC.

An internal high-value resistor divider on OUT reduces

leakage current effects.

Common-Mode Voltage Measurement

The input common-mode voltage is defined as the aver-

age of the voltage at RS+ and RS-. A high value resistor-

divider allows measurement of the input common-mode

voltage over the 0V to 57.3V range.

Sense Voltage Measurement

Three programmable gains allow for a wide range of cur-

rents to be read by the ADC. The current-sense amplifier

gain can be set to 1x, 4x, or 8x. The full-scale sense volt-

ages are then 440mV, 110mV, and 55mV, respectively.

Output Amplifier/Comparator

The MAX9611/MAX9612 feature an internally selectable

op amp and comparator where one of the inputs is con-

nected to the 2.5x current-sense amplifier, and the other

input is connected to the SET input. The op amp or the

comparator output can be selected and connected to

OUT. The output stage is an open-drain 60V nFET, that

requires a suitable pullup resistor for proper opera-

tion. The op amp then behaves like a Class-A output

stage. Select op amp or comparator function in Control

Watchdog/Latch/Retry Functionality

Internal digital circuitry is used to implement a watchdog

feature that can be useful to handle normal application

transients that are not true fault conditions. This feature

applies both to the op amp and comparator modes of

part operation. A watchdog delay time is internally set to

1ms by default but can be changed to 100Fs. The retry

delay time is internally set to 50ms by default, but can be

changed to 10ms (see Tables 6 and 7).

In normal operation mode, (Control Register 1 (0x0A)

000x xxxx), the amplifier output responds to the differ-

ence between its inputs, i.e., the CSA output voltage and

the SET voltage. In open-loop configuration, the op amp

can be used as a comparator.

In a watchdog-latch-retry mode (Control Register 1

(0x0A) 111x xxxx), the output of the comparator waits

for a watchdog delay time (to ensure the CSA output

continues to stay above the SET voltage for this duration)

before responding, and then latches onto this state. After

a retry delay time, it resets the comparator state and the

cycle repeats.

Similar functionality is implemented for the op-amp

mode as well (Control Register 1 (0x0A) 000x xxxx to

011x xxxx).

A RESET bit is defined in Control Register 1 (0x0A) to

reset a latched state when commanded by the user.

I2C Interface

The MAX9611/MAX9612 I2C interface consists of a

serial-data line (SDA) and serial-clock line (SCL). SDA

and SCL facilitate bidirectional communication between

the MAX9611/MAX9612 and the master at rates up to

400kHz. The MAX9611/MAX9612 are slave devices that

transfer and receive data. The master (typically a micro-

controller) initiates data transfer on the bus and gener-

ates the SCL signal to permit that transfer.

High-Side, Current-Sense Amplifiers with

12-Bit ADC and Op Amp/Comparator

MAX9611/MAX9612

14 _____________________________________________________________________________________

Slave Address

A bus master initiates communication with a slave

device by issuing a START (S) condition followed by a

slave address. When idle, the MAX9611/MAX9612 con-

tinuously wait for a START condition followed by their

slave address. When the MAX9611/MAX9612 recognize

a slave address, it is ready to accept or send data. The

MAX9611/MAX9612 offer 16 different slave addresses

using two address inputs, A1 and A0. See Table 2 for

different slave address options. The least significant bit

(LSB) of the address byte (R/W) determines whether

the master is writing to or reading from the MAX9611/

MAX9612 (R/W = 0 selects a write condition, R/W = 1

selects a read condition). After receiving the address,

the MAX9611/MAX9612 (slave) issue an acknowledge

by pulling SDA low for one clock cycle.

I2C Write Operation

A write operation (Figure 1) begins with the bus master

issuing a START condition followed by seven address

bits and a write bit (R/W = 0). If the address byte is

successfully received, the MAX9611/MAX9612 (slave)

issue an acknowledge (A). The master then writes to

the slave and the sequence is terminated by a STOP (P)

condition for a single write operation.

For a burst write operation, more data bytes are sent after

the register address before the transaction is terminated.

I2C Read Operation

In an I2C read operation (Figure 2), the bus master

issues a write command first by initiating a START condi-

tion followed by seven address bits, a write bit (R/W = 0)

and the 8-bit register address. The master then issues

a Repeated START (Sr) condition, followed by seven

address bits, a read bit (R/W = 1). If the address byte

is successfully received, the MAX9611/MAX9612 (slave)

issue an acknowledge (A). The master then reads from

the slave. For continuous read, the master issues an

acknowledge bit (AM) after each received byte. The

master terminates the read operation by sending a not

acknowledge (NA) bit. The MAX9611/MAX9612 then

release the data line SDA allowing the master to gener-

ate a STOP condition.

Table 2. MAX9611/MAX9612 Address

Description

Figure 1. I2C Write Operation

Figure 2. I2C Read Operation

A1 A0 DEVICE WRITE

ADDRESS (hex)

DEVICE READ

ADDRESS (hex)

0 0 0xE0 0xE1

0 1/3 x VCC 0xE2 0xE3

0 2/3 x VCC 0xE4 0xE5

0 VCC 0xE6 0xE7

1/3 x VCC 0 0xE8 0xE9

1/3 x VCC 1/3 x VCC 0xEA 0xEB

1/3 x VCC 2/3 x VCC 0xEC 0xED

1/3 x VCC VCC 0xEE 0xEF

2/3 x VCC 0 0xF0 0xF1

2/3 x VCC 1/3 x VCC 0xF2 0xF3

2/3 x VCC 2/3 x VCC 0xF4 0xF5

2/3 x VCC VCC 0xF6 0xF7

VCC 0 0xF8 0xF9

VCC 1/3 x VCC 0xFA 0xFB

VCC 2/3 x VCC 0xFC 0xFD

VCC VCC 0xFE 0xFF

SINGLE WRITE

BURST WRITE

DATA

AAP

ACKNOWLEDGE FROM

MAX9611/MAX9612

R/W

STOP

SLAVE ADDRESSS0A

DATA 2DATA 1

DATA N

DATA 3

ACKNOWLEDGE FROM

MAX9611/MAX9612

R/W

STOP

ACKNOWLEDGE FROM

MAX9611/MAX9612

ACKNOWLEDGE FROM

FROM MASTER

SINGLE READ

SLAVE ADDRESS

SLAVE ADDRESS DATA

ASr1

R/W

NO READ-ACKNOWLEDGE

FROM MASTER

R/W

ACKNOWLEDGE FROM

MAX9611/MAX9612

BURST READ

REPEAT

START

SLAVE ADDRESS DATA

ASr1

R/W

DATA N

AM NA PAM

DATA

High-Side, Current-Sense Amplifiers with

12-Bit ADC and Op Amp/Comparator

MAX9611/MAX9612

______________________________________________________________________________________ 15

Registers

The MAX9611/MAX9612 include five 12-bit data register

banks and two 8-bit control registers.

The two control registers are read/write registers used

to configure the ADC for different modes of operation.

Table 3 lists all the registers, their corresponding POR

values and their addresses.

Table 3. Internal Register/Addresses

Data Registers

The five 12-bit data registers banks comprise two 8-bit registers for 8 MSBs and 4 LSBs. The 12-bit data is split

between the two 8-bit data bytes as seen in Figure 1. They are read-only registers that hold the converted data. Do not

issue a STOP command until both bytes are read. Instead use a Repeated START command to read the second byte.

Byte 1

Byte 2

Control Register 1

Control Register 1 is an 8-bit write/read register that configures the MAX9611/MAX9612 for different modes of opera-

tion. Tables 4 and 5 show the bit location and function for Control Register 1.

Table 4. Control Register 1 Bit Location

REGISTERS POR VALUES (hex) REGISTER ADDRESS (hex)

CSA DATA BYTE 1 (MSBs) 0x000 0x00

CSA DATA BYTE 1 (LSBs) 0x000 0x01

RS+ DATA BYTE 1 (MSBs) 0x000 0x02

RS+ DATA BYTE 1 (LSBs) 0x000 0x03

OUT DATA BYTE 1 ( MSBs) 0x000 0x04

OUT DATA BYTE 1 (LSBs) 0x000 0x05

SET DATA BYTE 1 (MSBs) 0x000 0x06

SET DATA BYTE 1 (LSBs) 0x000 0x07

TEMP DATA BYTE 1 (MSBs) 0x800 0x08

TEMP DATA BYTE 1 (LSBs) 0x000 0x09

CONTROL REGISTER 1 0x000 0x0A

CONTROL REGISTER 2 0x000 0x0B

BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0

MSB12 MSB11 MSB10 MSB09 MSB08 MSB07 MSB06 MSB05

BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0

LSB05 LSB03 LSB02 LSB01 0 0 0 0

BIT NUMBER 7 6 5 4 3 2 1 0

BIT NAME MODE2 MODE1 MODE0 LR SHDN MUX2 MUX1 MUX0

POR VALUE 0 0 0 0 0 0 0 0

High-Side, Current-Sense Amplifiers with

12-Bit ADC and Op Amp/Comparator

MAX9611/MAX9612

16 _____________________________________________________________________________________

Table 5. Control Register 1 Bit Description

Control Register 2

Control Register 2 is an 8-bit write/read register that provides the different time delay options for asserting the com-

parator output when monitoring fault events. Tables 6 and 7 show the bit location and function for Control Register 2.

Table 6. Control Register 2

Table 7. Control Register 2 Bit Descriptions

BIT BIT NAME FUNCTION

2, 1, 0 MUX2, MUX1,

MUX0

000 Channel A: Read current-sense amplifier output from ADC, gain = 1x

001 Channel A: Read current-sense amplifier output from ADC, gain = 4x

010 Channel A: Read current-sense amplifier output from ADC, gain = 8x

011 Channel B: Read average voltage of RS+ (input common-mode voltage) from ADC

100 Channel C: Read voltage of OUT from ADC

101 Channel D: Read voltage of SET from ADC

110 Channel E: Read internal die temperature from ADC

111 Read all channels in fast-read mode, sequentially every 2ms. Uses last gain setting.

3 SHDN

Power-on state = 0

0 = Normal operation

1 = Shutdown mode

4 LR

0 = Normal operation

1 = Reset if comparator is latched due to MODE = 111. This bit is automatically reset after a

1 is written.

7, 6, 5 MODE2, MODE1,

MODE0

000 = Normal operation for op amp/comparator

111 = Comparator mode. OUT remains low until CSA output > VSET for 1ms, OUT latches

high for 50ms, then OUT autoretries by going low. The comparator has an internal

±10mV hysteresis voltage to help with noise immunity. For MAX9612, the polarity is

reversed.

011 = Op-amp mode. OUT regulates pFET for 1ms at VSET, OUT latches high for 50ms,

then OUT autoretries by going low. For MAX9612, the polarity is reversed.

BIT NUMBER 7 6 5 4 3 2 1 0

BIT NAME X X X X DTIM RTIM X X

POR VALUE 0 0 0 0 0 0 0 0

BIT BIT NAME FUNCTION

7, 6, 5, 4 XSet to 0

3 DTIM

Watchdog delay time

0 = 1ms

1 = 100Fs

2 RTIM

Watchdog retry delay time

0 = 50ms

1 = 10ms

1, 0 XSet to 0

High-Side, Current-Sense Amplifiers with

12-Bit ADC and Op Amp/Comparator

MAX9611/MAX9612

______________________________________________________________________________________ 17

Power-On Reset

The MAX9611/MAX9612 include power-on reset cir-

cuitry that ensures all registers reset to a known state on

power-up. Once VCC goes above 2.4V, the POR circuit

releases the registers for normal operation.

Applications Information

Inrush Current Limiter

The MAX9611 can be used as an inrush current limiter

for a number of applications as shown in Figure 3. Note

that the sense resistor can be placed on either side of

the pFET. Since the input common-mode voltage of the

MAX9611 extends to ground, the sense resistor can be

placed at the load side as well, allowing current to be

sensed even when there is a dead-short on the load.

The inrush current limiting circuit reads and measures

the load-current during normal operation and can limit

the load current to a user-set value. In normal operation,

the load current is below the set threshold. The pFET

is fully turned on because the op-amp output is at 0V.

In the event of an overcurrent situation at the load, the

op-amp controls the pFET’s gate-voltage so it transitions

to a linear region, thus limiting the load current. In this

case, the op-amp output voltage is between 0V and

VBAT, as required for current-limiting.

Choose a suitable sense resistor and a low RDS-on pFET to

ensure the best efficiency during normal operation. Choose

a pFET with large power dissipation to ensure compliance

with safe operating area of the pFET. The MAX9611 comes

equipped with a variety of watchdog options to help with

this design (see Control Register 2, Table 7).

Choose resistor values R1 and R2 to ensure that the

pFET is fully on in normal operating conditions and to

ensure that the VGS maximum rating is not exceeded.

Also, R1 and R2 help limit the current in the open-drain

output stage of the internal op amp. RCOMP and CCOMP

help roll-off high-frequency gain of the feedback control

system. R2 and CCOMP set a pole, for which 10kHz is a

good choice. RCOMP and CCOMP set a zero, for which

100kHz is a good choice.

With the internal gain of the current-sense amplifier

(2.5V/V), the inrush current-limit threshold can be set

using resistor-divider R3 and R4 as follows:

( )

×=

+×

CC LIMIT

SENSE

V R3 I

R2 R3 2.5 R

Note: The inrush current limiter can be changed to a

high-side relay-disconnect circuit by using the MAX9611

set to comparator mode (MODE 111).

Figure 3. Inrush Current Limiter

MAX9611

0.1µF

R4R1

CCOMP

VBAT

RCOMP

0.1µF

1µF

VCC

I2C CLOCK

INPUT

I2C DATA

INPUT/OUTPUT

RS+ RS-

SCL

SDA

OUT

SET

2.7V TO 5.5V

GND

LOAD

RSENSE

(OUTPUT SET TO OP-AMP MODE)

INRUSH CURRENT LIMITER

High-Side, Current-Sense Amplifiers with

12-Bit ADC and Op Amp/Comparator

MAX9611/MAX9612

18 _____________________________________________________________________________________

Base-Station PA Gain Control

While the MAX9611 is designed to control high-side

pFETs, the MAX9612 can be similarly used to control

low-side nFETs. For example the MAX9612 can be used

to control the DC bias point of power amplifier LDMOS

or GaN nFETs in base-station applications. The circuit

shown in Figure 4 also allows the option to apply nega-

tive bias voltages to the PA FET, which is required for

certain types of transistors for proper operation.

In the circuit shown, the nFET is in a linear mode of

operation to allow it to amplify high-frequency RF sig-

nals, while the MAX9612 sets the DC operating point.

The gain of the FET can be varied by changing its drain

current. This operating point can be varied by an exter-

nal DAC voltage that feeds the SET pin.

VNEG and VCLAMP together with R1, R2, and R3 set the

DC bias point limits for the PA transistor. VCLAMP is a

suitable positive voltage and VNEG is a suitable nega-

tive voltage. When VOUT = 0V, the gate voltage of the

PA FET is:

( )

×=

NEG OUT

V R2 V

R1 R2

When the OUT open-dran transistor is off, the gate volt-

age of the PA FET is:

( )

= +

++ ++

NEG

CLAMP

GATE

V R2 R3

V R1

VR1 R2 R3 R1 R2 R3

RCOMP and CCOMP connected to the OUT pin compen-

sate the internal amplifier. Choose a corner frequency

of 100kHz.

Choose suitable RSENSE as required for the application.

The inductor isolates the DC measuring point of current

from the high-frequency AC signals through the PA FET,

as well as helping with the high-frequency gain.

Power-Supply Bypassing and Grounding

The MAX9611/MAX9612 share a common ground pin

for both the analog and digital on-chip circuitry. It is

therefore very important to properly bypass the VCC to

GND, and to have a solid low-noise ground plane on the

circuit board so as to minimize ground bounce. Bypass

VCC to GND with low ESR 0.1FF in parallel with a 4.7FF

ceramic capacitors to GND placed as close as possible

to the device.

Figure 4. Base-Station PA Gain Control

Chip Information

PROCESS: BiCMOS

MAX9612

CIN

VCC

RS- RS+

SET

OUT

2.7V TO 5.5V

VNEG

VCLAMP

(OUTPUT SET TO OP-AMP MODE)

BASE-STATION PA GAIN CONTROL

RFIN

GND

I2C CLOCK

INPUT

I2C DATA

INPUT/OUTPUT

SCL

SDA

10-BIT

DAC

RCOMP

CCOMP

RFOUT

High-Side, Current-Sense Amplifiers with

12-Bit ADC and Op Amp/Comparator

MAX9611/MAX9612

______________________________________________________________________________________ 19

Package Information

For the latest package outline information and land patterns, go to www.maxim-ic.com/packages. Note that a “+”, “#”, or “-” in the

package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing pertains to the

package regardless of RoHS status.

PACKAGE TYPE PACKAGE CODE OUTLINE NO. LAND PATTERN NO.

10 FMAX U10+2 21-0061 90-0330

High-Side, Current-Sense Amplifiers with

12-Bit ADC and Op Amp/Comparator

MAX9611/MAX9612

Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied.

Maxim reserves the right to change the circuitry and specifications without notice at any time.

20 Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600

Revision History

REVISION

NUMBER

REVISION

DATE DESCRIPTION PAGES

CHANGED

0 9/10 Initial release —

1 11/10 Updated text in Table 5 to add “comparator” to mode 000 for bits 7, 6, 5 16

2 1/11 Relaxed room temperature limits for 4x and 8x gains from 0.3mV to 0.5mv 1, 2

3 6/11 Updated TYP spec for output current sink in the Electrical Characteristics and TOC

11 3, 7