MM74HC4051MTC - Fairchild Semiconductor

August 1984

Revised May 1999

MM74HC4051 • MM74HC4052 • MM74HC4053 8-Channel Analog Multiplexer •

MM74HC4051 • MM74HC4052 • MM74HC4053

8-Channel Analog Multiplexer •

Dual 4-Channel Analog Multiplexer •

Triple 2-Channel Analog Multiplexer

General Descript ion

The MM74HC4051, MM74HC4052 and MM74HC4053

multiplexers are digitally controlled analog switches imple-

mented in advanced silicon-gate CMO S technolog y. These

switches have low “on” resistance and low “off” leakages.

They are bi dir ectio nal switches, thus any analog i np ut m ay

be used as an output and vi ce-versa. Also the se switches

contain linearization circuitry which lowers the on resis-

tance and increases switch linearity. These devices allow

control of up to ±6V (peak ) analog signal s with digital co n-

trol signals of 0 to 6V. Three supply pins are provided for

VCC, ground, a nd VEE. This enables the connection of 0–

5V logic signals when VCC = 5V and an analog input range

of ±5V when VEE = 5V. All three devices also have an

inhibit control which when HIGH will disable all switches to

their off state. All analog inputs and outputs and digital

inputs are protected from electrostatic damage by diodes

to VCC and ground.

MM74HC4051: This device connects together the outputs

of 8 switches, thus achieving an 8 channel Multiplexer . The

binary code placed on the A, B, and C select lines deter-

mines which one of the eight switches is “on”, and con-

nects one of the eight inputs to the common output.

MM74HC4052: This device connects together the out puts

of 4 switches in two sets, thus achieving a pair of 4-channel

multiplexers. The binary code placed on the A, and B

select lines determine which switch in each 4 channel sec-

tion is “on” , conn ecting one of the four inp uts in each sec-

tion to its common output. This enables the implementation

of a 4-channel differential multiplexer.

MM74HC4053: This device contains 6 switches whose out-

puts are connected t ogether in p airs, thus i mplementing a

triple 2 channel multiplexer, or the equivalent of 3 single-

pole-double throw configurations. Each of the A, B, or C

select lines independently controls one pair of switches,

selecting one of the two switches to be “on”.

Features

■Wide analog input voltage range: ±6V

■Low “on” resistance :

50 typ. (VCC–VEE = 4.5V)

30 typ. (VCC–VEE = 9V)

■Logic le vel translat ion to enable 5V logic wi th ±5V ana-

log signals

■Low quiescen t curre nt: 80 µA maximum (74HC)

■Matched Switch characteristic

Ordering Code:

Devices also ava ilable in Tape and R eel. Speci fy by append ing the suffix let t er “X” to the o rdering code.

Order Number Pack age Number Package Description

MM74HC4051M M16A 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150” Narrow

MM74HC4051WM M16B 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300” Wide

MM74HC4051SJ M16D 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide

MM74HC4051MTC MTC16 16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide

MM74HC4051N N16E 16-Lead Plastic Dual-In-Line Pack age (PDIP), JEDE C MS-0010.300” Wide

MM74HC4052M M16A 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150” Narrow

MM74HC4052WM M16B 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300” Wide

MM74HC4052SJ M16D 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide

MM74HC4052MTC MTC16 16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide

MM74HC4052N N16E 16-Lead Plastic Dual-In-Line Pack age (PDIP), JEDE C MS-0010.300” Wide

MM74HC4053M M16A 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150” Narrow

MM74HC4053WM M16B 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300” Wide

MM74HC4053SJ M16D 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide

MM74HC4053MTC MTC16 16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide

MM74HC4053N N16E 16-Lead Plastic Dual-In-Line Pack age (PDIP), JEDE C MS-0010.300” Wide

www.fairchildsemi.com 2

MM74HC4051 • MM74HC4052 • MM74HC4053

Connection Diagrams

Pin Assignments for DIP, SOIC, SOP and TSSOP

Top View

Truth Tables

MM744051

MM744052

MM744053

Input “ON”

InhCBAChannel

H XXX None

L LLL Y0

LLLH Y1

LLHL Y2

LLHH Y3

LHLL Y4

LHLH Y5

LHHL Y6

L HHH Y7

Inputs “ON” Channels

Inh B A X Y

H X X None None

LLL 0X 0Y

LLH 1X 1Y

LHL 2X 2Y

LHH 3X 3Y

Input “ON” Channels

InhCBA C b a

H X X X None None None

L L L L CX BX AX

LLLHCX BX AY

L L H L CX BY AX

LLHHCX BY AY

L H L L CY BX AX

LHLHCY BX AY

L H H L CY BY AX

L HHH CY BY AY

3 www.fairchildsemi.com

MM74HC4051 • MM74HC4052 • MM74HC4053

Logic Diagrams

MM74HC4051

MM74HC4052

MM74HC4053

www.fairchildsemi.com 4

MM74HC4051 • MM74HC4052 • MM74HC4053

Absolute Maximum Ratings(No te 1)

(Note 2) Recommended Operating

Conditions

Note 1: Absolute Maximum Ratings are those values beyond which dam-

age to the device may occur.

Note 2: Unle s s ot herwise specified all v olt ages are referen c ed to ground.

Note 3: Pow er Dissipa tion temper ature dera ting — plasti c “N” package : −

12 mW/°C from 65 °C to 85°C.

DC Electrical Characteristics (Note 4)

Supply Voltage (VCC)−0.5 to +7.5V

Supply Voltage (VEE)+0.5 to −7.5V

Control Input Voltage (VIN)−1.5 to VCC +1.5V

Switch I/O Voltage (VIO)V

EE −0.5 to VCC +0.5V

Clamp Diode Current (IIK, IOK)±20 mA

Output Current, per pin (IOUT)±25 mA

VCC or GND Cu rrent, per pin (ICC)±50 mA

Storage Temperature Range (TSTG)−65°C to +150°C

Power Dissipation (PD)

(Note 3) 600 mW

S.O. Package only 500 mW

Lead Temperature (TL)

(Soldering 10 seconds) 260°C

Min Max Units

Supply Voltage (VCC)26V

Supply Voltage (VEE)0−6V

DC Input or Output Voltage

(VIN, VOUT)0V

CC V

Operating Temperature Range (TA)−40 +85 °C

Input Rise or Fall Times

(tr, t f) VCC = 2.0V 1000 ns

VCC = 4.5V 500 ns

VCC = 6.0V 400 ns

Symbol Parameter Conditions VEE VCC TA = 25°CT

A = −40 to 85°CT

A = −55 to 125°CUnits

Typ Guaranteed Limits

VIH Minimum HIGH Level 2.0V 1.5 1.5 1.5 V

Input Voltage 4.5V 3.15 3.15 3.15 V

6.0V 4.2 4.2 4.2 V

VIL Maximum LOW Level 2.0V 0.5 0.5 0.5 V

Input Voltage 4.5V 1.35 1.35 1.35 V

6.0V 1.8 1.8 1.8 V

RON Maximum “ON” Resistance VINH = VIL, IS = 2.0 mA GND 4.5V 40 160 200 240 Ω

(Note 5) VIS = VCC to VEE −4.5V 4.5V 30 120 150 170 Ω

(Figure 1) −6.0V 6.0V 20 100 125 140 Ω

VINH = VIL, IS = 2.0 mA GND 2.0V 100 230 280 320 Ω

VIS = VCC or VEE GND 4.5V 40 110 140 170 Ω

(Figure 1) −4.5V 4.5V 20 90 120 140 Ω

−6.0V 6.0V 15 80 100 115 Ω

RON Maximum “ON” Resistance VCTL = VIL GND 4.5V 10 20 25 25 Ω

Matching VIS = VCC to GND −4.5V 4.5V 5 10 15 15 Ω

−6.0V 6.0V 5 10 12 15 Ω

IIN Maximum Control VIN = VCCor GND ±0.1 ±1.0 ±1.0 µA

Input Current VCC = 2−6V

ICC Maximum Quiescent VIN = VCC or GND GND 6.0V 8 80 160 µA

Supply Curre nt IOUT = 0 µA−6.0V 6.0V 16 160 320 µA

IIZ Maximum Switch “OFF” VOS = VCCor VEE GND 6.0V ±60 ±600 ±600 nA

Leakage Current VIS = VEEor VCC −6.0V 6.0V ±100 ±1000 ±1000 nA

(Switch Input) VINH = VIH (Figure 2)

IIZ Maximum Switch VIS = VCC to VEE GND 6.0V ±0.2 ±2.0 ±2.0 µA

“ON” Leakage HC4051 VINH = VIL −6.0V 6.0V ±0.4 ±4.0 ±4.0 µA

Current (Figure 3)

VIS = VCC to VEE GND 6.0V ±0.1 ±1.0 ±1.0 µA

HC4052 VINH = VIL (Figure 3) −6.0V 6.0V ±0.2 ±2.0 ±2.0 µA

VIS = VCC to VEE GND 6.0V ±0.1 ±1.0 ±1.0 µA

HC4053 VINH = VIL (Figure 3) −6.0V 6.0V ±0.1 ±1.0 ±1.0 µA

5 www.fairchildsemi.com

MM74HC4051 • MM74HC4052 • MM74HC4053

DC Electrical Characteristics (Continued)

Note 4: For a pow er s upply of 5V ±10% the worst case on resistances (RON) occ urs for HC at 4.5 V. Thu s the 4.5V val ues shou ld be us ed w hen de sign ing

with this supply. Worst case VIH and VIL occ ur at VCC = 5.5V and 4. 5V respectively. (The VIH value at 5.5V is 3.8 5V.) The w orst cas e leakage current occur

for CMO S at th e higher voltage and so the 5. 5V values s hould be used.

Note 5: At suppl y voltages (VCC–VEE) appro aching 2V the anal og switc h on resist ance beco mes ext remely non -linear. Therefore it is reco mmende d that

these dev ic es be use d t o tr ansmit digit al only wh en using th es e s upply vo lta ges.

AC Electrical Characteristics

VCC = 2.0V−6.0V, VEE = 0V−6V, CL = 50 pF (unless otherwise specified)

Symbol Parameter Conditions VEE VCC TA = 25°CT

A = −40 to 85°CT

A = −55 to 125°CUnits

Typ Guaranteed Limits

IIZ Maximum Switch VOS = VCC or VEE GND 6.0V ±0.2 ±2.0 ±2.0 µA

“OFF” Leakage HC4051 VIS = VEE or VCC −6.0V 6.0V ±0.4 ±4.0 ±4.0 µA

Current (Comm on Pin) VINH = VIH

VOS = VCC or VEE GND 6.0V ±0.1 ±1.0 ±1.0 µA

HC4052 VIS = VEE or VCC −6.0V 6.0V ±0.2 ±2.0 ±2.0 µA

VINH = VIH

VOS = VCC or VEE GND 6.0V ±0.1 ±1.0 ±1.0 µA

HC4053 VIS = VEE or VCC −6.0V 6.0V ±0.1 ±1.0 ±1.0 µA

VINH = VIH

Symbol Parameter Conditions VEE VCC TA = 25°CT

A = −40 to 85°CT

A = −55 to 125°CUnits

Typ Guaranteed Limits

tPHL, tPLH Maximum Propagation GND 2.0V 25 60 75 90 ns

Delay Switch In to Out GND 4.5V 5 12 15 18 ns

−4.5V 4.5V 4 8 12 14 ns

−6.0V 6.0V 3 7 11 13 ns

tPZL, tPZH Maximum Sw itch Turn RL = 1 kΩGND 2.0V 92 355 435 515 ns

“ON” Delay GND 4.5V 69 87 103 ns

−4.5V 4.5V 16 46 58 69 ns

−6.0V 6.0V 15 41 51 62 ns

tPHZ, tPLZ Maximum Switch Turn GND 2.0V 65 290 365 435 ns

“OFF” Delay GND 4.5V 28 58 73 87 ns

−4.5V 4.5V 18 37 46 56 ns

−6.0V 6.0V 16 32 41 48 ns

fMAX Minimum Switch GND 4.5V 30 MHz

Frequency Response −4.5V 4.5V 35 MHz

20 log (VI/VO) = 3 dB

Control to Switch RL = 600Ω,V

IS = 4 VPP 0V 4.5V 1080 mV

Feedthrough Noise f = 1 MHz, VIS = 8 VPP −4.5V 4.5V 250 mV

CL = 50 pF

Crosstalk between RL = 600Ω,V

IS = 4 VPP 0V 4.5 −52 dB

any Two Switches f = 1 MHz VIS = 8 VPP −4.5V 4.5V −50 dB

Switch OFF Signal RL = 600Ω,V

IS = 4 VPP 0V 4.5V −42 dB

Feedthrough f = 1 MHz, VIS = 8 VPP −4.5V 4.5V −44 dB

Isolation VCTL = VIL

THD Sinewave Harmonic RL = 10 kΩ,V

IS = 4 VPP 0V 4.5V 0.013 %

Distortion CL = 50 pF, VIS = 8 VPP −4.5V 4.5V 0.008 %

f = 1 kHz

CIN Maximum Control 5 10 10 10 pF

Input Capacitance

CIN Maximum Swi tch Input 15 pF

Input Capacitance 4051 Common 90

4052 Common 45

4053 Common 30

CIN Maximum Feedthrough

Capacitance 5pF

www.fairchildsemi.com 6

MM74HC4051 • MM74HC4052 • MM74HC4053

AC Test Circuits and Switching Time Waveforms

FIGURE 1. “ON” Resistance FIGURE 2. “OFF” Channel Leakage Current

FIGURE 3. “ON” Channel Leakage Current

FIGURE 4. tPHL, tPLH Propagation Delay Time Signal Input to Signal Output

FIGURE 5. tPZL, tPLZ Propagation Delay Time Control to Signal Output

FIGURE 6. tPZH, tPHZ Propagation Delay Time Control to Signal Output

7 www.fairchildsemi.com

MM74HC4051 • MM74HC4052 • MM74HC4053

AC Test Circuits and Switching Time W aveforms (Continued)

FIGURE 7. Crosstalk: Control Input to Signal Output

FIGURE 8. Crosstalk Between Any Two Switches

Typical Performance Characteristics

Typical “On” Resistance vs Input Voltage

VCC=−VEE

Special Considerations

In certain applications the external load-resistor current

may include both VCC and signal line components. To avoid drawing VCC current when switch current flows into

the ana log switch pins, the volta ge drop across t he switch

must not exceed 1.2V (calculated from the ON resistance).

www.fairchildsemi.com 8

MM74HC4051 • MM74HC4052 • MM74HC4053

Physical Dimensions inches (millimeters) unless otherwise noted

16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150” Narrow

Package Number M16A

16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300” Wide

Package Number M16B

9 www.fairchildsemi.com

MM74HC4051 • MM74HC4052 • MM74HC4053

Physical Dimensions inches (millimeters) unless otherwise noted (Continued)

16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide

Package Number M16D

www.fairchildsemi.com 10

MM74HC4051 • MM74HC4052 • MM74HC4053

Physical Dimensions inches (millimeters) unless otherwise noted (Continued)

16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide

Package Number MTC16

Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications.

MM74HC4051 • MM74HC4052 • MM74HC4053 8-Channel Analog Multiplexer •

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT

DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD

SEMICONDUCTOR CORPORATION. As used herein:

1. Life sup por t de vices o r syst ems are dev ices or syste ms

which, (a) are intended for surgical implant into the

body, or (b) support or sustain life, and (c) whose failure

to perform when properly used in accordance with

instruct ions fo r use pr ovi de d in the labe l ing, can be re a-

sonably expected to result in a significant injury to the

user.

2. A c ritica l compo nent i n any compo nent o f a life s upp ort

device or system whose failure to perform can be rea-

sonabl y e xpec ted to c ause th e fa i lure of the li fe s upp or t

device or system, or to affect its safety or effectiveness.

www.fairchildsemi.com

Physical Dimensions inches (millimeters) unless otherwise noted (Continued)

16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide

Package Number N16E