AS1106, AS1107
8-Digit LED Display Drivers
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Datasheet
1 General Description
The AS1106 and the AS1107 are compact display drivers for 7-
segment numeric displays of up to 8 digits. The devices can be
programmed via SPI, QSPI, and Microwire as well as a conventional
4-wire serial interface.
The devices include an integrated BCD code-B/HEX decoder,
multiplex scan circuitry, segment and display drivers, and a 64-bit
memory. Internal memory stores the LED settings, eliminating the
need for continuous device reprogramming.
Every segment can be individually addressed and updated
separately. Only one external resistor (R SET) is required to set the
current through the LED display. LED brightness can be controlled
by analog or digital means. The devices can be programmed to use
the internal code-B/HEX decoder to display numeric digits or to
directly address each segment.
The AS1106 and the AS1107 feature an extremely low shutdown
current of typically 3µA, and an operational current of less than
500µA. The number of digits can be programmed, the devices can
be reset by software, and an external clock is also supported.
Additionally, segment blinking can be synchronized across multiple
drivers.
Several test modes are available for easy application debugging.
The devices are available in PDIP 24-pin and SOIC 24-pin
packages.
Figure 1. AS1106, AS1107 - Typical Application Diagram
2 Key Features
10MHz SPI-, QSPI-, Microwire-Compatible Serial I/O
Individual LED Segment Control
Segment Blinking Control (can be synchronized across multiple
drivers)
Hexadecimal- or BCD-Code/No-Decode Digit Selection
3µA Low-Power Shutdown Current (typ; data retained)
Extremely Low Operating Current 0.5mA in Open-Loop
Digital and Analog Brightness Control
Display Blanked on Power-Up
Drive Common-Cathode LED Displays
Low-EMI Low Slew-Rate Limited Segment
Drivers (AS1107)
Supply Voltage Range: 2.7 to 5.5V
Software Reset
Optional External Clock
Packages:
-PDIP 24-pin
- SOIC 24-pin
3 Applications
The AS1106 and AS1107 are ideal for bar-graph displays,
instrument-panel meters, LED matrix displays, dot matrix displays,
set-top boxes, white goods, professional audio equipment, medical
equipment, industrial controllers and panel meters.
AS1106/
AS1107
8-Digit Microprocessor Display
DIG0 to
DIG7
SEG A to G
SEP DP
8 Digits
8 Segments
I/O
I/O
SCK
VDD
ISET
DIN
CLK
GND
GND
LOAD/CSN
+5V
9.53kΩ
Micro-
processor
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AS1106, AS1107
Datasheet - Pin Assignments
4 Pin Assignments
Figure 2. DIP and SO Pin Assignments (Top View)
4.1 Pin Descriptions
Table 1. Pin Descriptions
Pin Number Pin Name Description
1DIN Serial-Data Input. Data is loaded into the internal 16-bit shift register on the rising edge of
pin CLK.
2, 3, 5, 6, 7, 8, 10,
11 DIG 0:DIG 7 Digit Drive Lines. 8 Eight-digit drive lines that sink current from the display common
cathode. The AS1 106 pulls the digit outputs to VDD when turned off. The AS1107 digit drivers
are high-impedance when turned off.
4, 9 GND Ground. Both GND pins must be connected.
12 LOAD/CSN
Load-Data Input (AS1106 only). The last 16 bits of serial data are latched on the rising edge
of this pin.
Chip-Select Input (AS1107 or AS1106 SPI-enabled only). Serial data is loaded into the shift
register while this pin is low . The last 16 bits of serial data are latched on the rising edge of
this pin.
13 CLK Serial-Clock Input. 10MHz maximum rate. Data is shifted into the internal shift register on
the rising edge of this pin. Data is clocked out of pin DOUT on the falling edge of this pin. On
the AS1107 or AS1106 SPI-enabled, the CLK input is active only while LOAD/CSN is low.
14, 15, 16, 17, 20,
21, 22, 23 SEG A:SEG G, SEG DP
Seven Segment and Decimal Point Drive Lines. 8 seven-segment drives and decimal
point drive that source current to the display. On the AS1106, when a segment driver is
turned off it is pulled to GND. The AS1107 segment drivers are high-impedance when turned
off.
18 ISET Set Segment Current. Connect to VDD through RSET to set the peak segment current (see
Selecting RSET Resistor Value and Using External Drivers on page 14).
19 VDD Positive Supply Voltage. Connect to +2.7 to +5.5V supply.
24 DOUT Serial-Data Output. The data into pin DIN is valid at pin DOUT 16.5 clock cycles later. This
pin is used to daisy-chain several AS1 106/AS1107 devices and is never high-impedance.
24
23
22
21
20
19
18
17
16
15
14
13
1
2
3
4
5
6
7
8
9
10
11
12
AS1106/
AS1107
DOUT
SEG D
SEG DP
SEG E
SEG C
VDD
ISET
SEG G
SEG B
SEG F
SEG A
CLK
DIN
DIG 0
DIG 4
GND
DIG 6
DIG 2
DIG 3
DIG 7
GND
DIG 5
DIG 1
LOAD/CSN
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AS1106, AS1107
Datashee t - A b s o l u t e M a x i mu m R a t i n g s
5 Absolute Maximum Ratings
Stresses beyond those listed in Table 2 may cause permanent damage to the device. These are stress ratings only, and functional operation of
the device at these or any other conditions beyond those indicated in Electrical Characteristics on page 4 is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
Table 2. Absolute Maximum Ratings
Parameter Min Max Units Notes
Electrical Parameters
VDD to GND -0.3 7 V
All other pins to GND -0.3 7 or
VDD + 0.3 V
Current
DIG 0:DIG 7 Sink Current 500 mA
SEG A:SEG G, SEG DP 100 mA
Latch-Up Immunity ±200 mA All pins except AS1106 pin 14: ±180 mA
Norm: JEDEC 78
Electrostatic Discharge
Digital outputs 1000 V Norm: MIL 883 E method 3015
All other pins 1000 V
Continuous Power Dissipation (TA = +85°C)
Narrow plastic DIP 1066 mW Derate 13.3mW/ºC
above +70ºC
Wide SOIC 941 mW Derate 11.8mW/ºC
above +70ºC
Temperature Ranges and Storage Conditions
Storage Temperature Range -55 +150 ºC
Package Body Temperature (Wide SOIC) +260 ºC
The reflow peak soldering temperature (body
temperature) specified is in accordance with IPC/
JEDEC J-STD-020 “Moisture/Reflow Sensitivity
Classification for Non-Hermetic Solid State Surface
Mount Devices”.
The lead finish for Pb-free leaded packages is
matte tin (100% Sn).
Humidity1
1. only valid for the SOIC 24-pin package
5 85 % Non-condensing
Moisture Sensitive Level11 Represents a max. floor life time of unlimited
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AS1106, AS1107
Datasheet - Electrical Characteristics
6 Electrical Characteristics
Conditions: VDD = 2.7V to 5.5V, RSET = 9.53kΩ±1%, TAMB = TMIN to TMAX (unless otherwise specified).
Table 3. Electrical Characteristics
Symbol Parameter Conditions Min Typ Max Unit
TAMB Operating Temperature Range -40 +85 ºC
VDD Operating Supply Voltage 2.7 5.0 5.5 V
IDDSD Shutdown Supply Current All digital inputs at VDD or GND,
TAMB = +25ºC 10 µA
IDD Operating Supply Current RSET = open circuit. 1 mA
All segments and decimal point on;
ISEG = -40mA. 330
fOSC Display Scan Rate 8 digits scanned 500 800 1300 Hz
IDIGIT Digit Drive Sink Current VOUT = 0.65V 320 mA
ISEG Segment Drive Source Current VDD = 5.0V, VOUT = (VDD -1V) -30 -40 -45 mA
ΔISEG/ΔtSegment Current Slew Rate
(AS1107 only) TAMB = +25ºC, VDD = 5.0V,
VOUT = (VDD -1V) 10 20 50 mA/µs
ΔISEG Segment Drive Current Matching 3.0 %
IDIGIT Digit Drive Leakage
(AS1107 only) Digit off, VDIGIT = VDD -10 µA
ISEG Segment Drive Leakage
(AS1107 only) Segm ent off, VSEG = 0V 1µA
IDIGIT Digit Drive Source Current
(AS1106 only) Digit off, VDIGIT = (VDD - 0.3V) -2 mA
ISEG Segment Drive Sink Current
(AS1106 only) Segment off, VSEG = 0.3V 5mA
tSLOWBLINK Slow Segment Blink Period (ON phase,
Internal Oscillator) 0.64 1 1.65 s
tFASTBLINK Fast Segment Blink Period
(ON phase, Internal Oscillator) 0.32 0.5 0.83 s
Fast or Slow Segment Blink Duty Cycle
(Guaranteed by design) 49.9 50 50.1 %
Table 4. Logic Inputs/Outputs Characteristics
Symbol Parameter Conditions Min Typ Max Unit
IIH, IIL Input Current DIN, CLK, LOAD/CSN VIN = 0V or VDD -1 1 µA
VIH Logic High Input Voltage 0.7 x VDD V
VIL Logic Low Input Voltage VDD = 5.0V ± 10% 0.8 V
VDD = 3.0V ± 10% 0.6
VOH Output High Voltage
DOUT, ISOURCE = -1mA,
VDD = 5.0V ± 10% VDD - 1 V
DOUT, ISOURCE = -1mA,
VDD = 3.0V ± 10% VDD - 0.5
VOL Output Low Voltage DOUT, ISINK = 1.6mA 0.4 V
ΔVIHysteresis Voltage DIN, CLK, LOAD/CSN 1 V
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AS1106, AS1107
Datasheet - Electrical Characteristics
Notes:
1. See Figure 12 on page 8 for more information.
2. All limits are guaranteed. The parameters with min and max values are guaranteed with production tests or SQC (Statistical Quality
Control) methods.
Table 5. Timing Characteristics
Symbol Parameter Conditions Min Typ Max Unit
tCP CLK Clock Period 100 ns
tCH CLK Pulse Width High 50 ns
tCL CLK Pulse Width Low 50 ns
tCSS CSM Fall to CLK Rise Setup Time
(AS1107 or AS1106 SPI-programmed) 25 ns
tCSH CLK Rise to LOAD/CSN Rise
Hold Time 0ns
tDS DIN Setup Time 25 ns
tDH DIN Hold Time 0ns
tDO Output Data Propagation Delay CLOAD = 50pF 25 ns
tLDCK LOAD Rising Edge to Next Clock Rising Edge
(AS1106 only) 50 ns
tCSW Minimum LOAD/CSN Pulse High 50 ns
tDSPD Data-to-Segment Delay 2.25 ms
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AS1106, AS1107
Datasheet - Typical Operating Characteristics
7 Typical Operating Characteristics
VDD = 5V, RSET = 9.53kΩ, TAMB = 25ºC (unless otherwise specified).
Figure 3. Scan Frequency vs.Temperature Figure 4. Scan Frequency vs. VDD
Figure 5. ISEG vs. Temperature Figure 6. ISEG vs. VDD
900
910
920
930
940
950
960
970
980
23456
VDD (V )
FOSC (Hz)
930
940
950
960
970
980
990
-40-200 20406080
TAMB [°C]
FOSC (Hz)
0
5
10
15
20
25
30
35
40
45
50
-40-200 20406080
TAMB (°C)
ISEG (mA)
0
10
20
30
40
50
60
22.533.544.555.56
VDD (V )
ISEG (mA)
VDD = 5V, VOUT = 2.4V
VDD = 5V, VOUT = 4V
VDD = 2.7V, VOUT = 2V
VDD = 2.7V, VOUT = 2.4V
VOUT = 1.7V
VOUT = 2.4V
VOUT = 4V
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AS1106, AS1107
Datasheet - Typical Operating Characteristics
Figure 7. AS1106 Segment Output Current Figure 8. AS1107 Segment Output Current
Figure 9. ISEG vs. VOUT Figure 10. ISEG vs. VOUT
Figure 11. ISEG vs. RSET
Intensit y = 31/32 (0F h)
0
5
10
15
20
25
30
35
40
45
50
0.0 5.0 10.0 15.0 20.0 25.0 30.0 35.0 40.0
Time (µs)
ISEG (mA)
Intensit y = 15/ 16 (0F h)
0
5
10
15
20
25
30
35
40
45
50
0.0 5.0 10.0 15.0 20.0 25.0 30.0 35.0 40.0
Time ( µs)
ISEG (mA)
0
5
10
15
20
25
30
35
40
45
50
00.511.522.533.544.55
VOUT (V)
ISEG (mA)
VDD = 2.7V
0
5
10
15
20
25
00.511.522.5
VOUT (V)
ISEG (mA)
RSET = 10kΩ
RSET = 20kΩ
RSET = 40kΩ
RSET = 40kΩ
RSET = 10kΩ
RSET = 20kΩ
0
10
20
30
40
50
60
0 1020304050607080
RSET (kΩ)
ISEG (mA)
VOUT = 2.4V
VOUT
= 4V
VOUT = 2V
VOUT = 1.7V VDD = 2.7V
VDD = 5V
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AS1106, AS1107
Datasheet - Detailed Description
8 Detailed Description
8.1 AS1106 vs. AS1107
The AS1106 and AS1107 are identical except for two features:
The AS1107 segment drivers are slew-rate limited to reduce electromagnetic interference (EMI).
The AS1107 serial interface is fully SPI compatible (programmable for AS1106).
8.2 Serial-Addressing Format
Programming the AS1 106/AS1107 is done by writing to the device’s internal registers (see Digit- and Control-Registers on page 9) via the 4-wire
serial interface. A programming sequence consists of 16-bit packages as listed in Table 6.
The data is shifted into the internal 16-bit register with the rising edge of the CLK signal. With the rising edge of the LOAD/CSN signal the data is
latched into a digit- or control-register. The LOAD/CSN signal must go high after the 16th rising clock edge.
The LOAD/CSN signal can also come later but this must happen just before the next rising edge of CLK, otherwise the data will be lost. The
contents of the internal shift register are applied 16.5 clock cycles later to pin DOUT. The data is clocked out at the falling edge of CLK.
The first 4 bits (D15:D12) are “don't care”, bits D1 1:D8 contain the register address, and bits D7:D0 contain the data. The first bit is D15, the most
significant bit (MSB). The exact timing is shown in Figure 12.
8.3 Initial Power-Up
On initial power-up, the AS1106/AS1107 registers are reset to their default values, the display is blanked, and the device goes into shutdown
mode. At this time, all registers should be programmed for normal operation.
Note: The default settings enable only scanning of one digit; the internal decoder is disabled and the Intensity Control Register (see page 12)
is set to the minimum values.
Figure 12. Interface Timing
Table 6. 16-Bit Serial Data Format
D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
X X X X Register Address (see Table 7)MSB Data LSB
tCL
LOAD/CSN
CLK
DIN
DOUT
D15 D14 D1 D0
tDO
tCSS
tDS
tDH
tCH tCP tCSH
tCSW
tLDCK
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AS1106, AS1107
Datasheet - Detailed Description
8.4 Shutdown Mode
The AS1106/AS1107 devices feature a shutdown mode, where they consume only 10µA (max) current. Shutdown mode is entered via a write to
the Shutdown Register (see Table 8). For the AS1106, at that point, all segment current sources are pulled to ground and all digit drivers are
connected to VDD, so that all segments are blanked. The AS1107 behavior is identical except the drivers are high impedance.
Note: During shutdown mode the Digit-Registers maintain their data.
Shutdown mode can either be used as a means to reduce power consumption or for generating a flashing display (repeatedly entering and
leaving shutdown mode). For minimum supply current in shutdown mode, logic input should be at GND or VDD (CMOS logic level).
The devices need typically 250µs to exit shutdown mode, and during shutdown mode the AS1106/AS1107 is fully programmable. Only the
display test mode (see page 11) overrides shutdown mode.
When entering or leaving shutdown mode, the Feature Register is reset to its default values (all 0s) when Shutdown Register bit D7 (page 10) =
0.1
Note: If the AS1106/AS1107 is used with an external clock, Shutdown Register bit D7 should be set to 1 when writing to the Shutdown Regis-
ter.
8.5 Digit- and Control-Registers
The AS1106/AS1107 devices contain 8 Digit-Registers and 6 control-registers, which are listed in Table 7. All registers are selected using a 4-bit
address word, and communication is done via the serial interface.
Digit Registers – These registers are realized with an on-chip 64-bit memory. Each digit can be controlled directly without rewriting the
whole register contents.
Control Registers – These registers consist of decode mode, display intensity, number of scanned digits, shutdown, display test and fea-
tures selection registers.
1. When Shutdown Register bit D7 = 1, the Feature Register is left unchanged when entering or leaving shutdown mode.
Table 7. Register Address Map
Register HEX Code Address Page
D15:D12 D11 D10 D9 D8
No-Op 0xX0 X000013
Digit 0 0xX1 X 0 0 0 1 N/A
Digit 1 0xX2 X 0 0 1 0 N/A
Digit 2 0xX3 X 0 0 1 1 N/A
Digit 3 0xX4 X 0 1 0 0 N/A
Digit 4 0xX5 X 0 1 0 1 N/A
Digit 5 0xX6 X 0 1 1 0 N/A
Digit 6 0xX7 X 0 1 1 1 N/A
Digit 7 0xX8 X 1 0 0 0 N/A
Decode-Mode 0xX9 X 1 0 0 1 10
Intensity Control 0xXA X 1 0 1 0 12
Scan Limit 0xXB X 1 0 1 1 12
Shutdown 0xXC X 1 1 0 0 10
N/A 0xXD X1101N/A
Feature 0xXE X 1 1 1 0 13
Display Test 0xXF X 1 1 1 1 11
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AS1106, AS1107
Datasheet - Detailed Description
8.5.1 Shutdown Register (0xXC)
The Shutdown Register controls AS1106/AS1107 shutdown mode (see Shutdown Mode on page 9).
8.5.2 Decode Enable Register (0xX9)
The Decode Enable Register sets the decode mode. BCD/HEX decoding (either BCD code – characters 0:9, E, H, L, P, and -, or HEX code –
characters 0:9 and A:F) is selected by bit D2 (page 13) of the Feature Register. The Decode Enable Register is used to select the decode mode
or no-deco de fo r each d igit. Each bit in t he D ecode Enabl e Regi ster c orres ponds t o its respec tive dis play d igit (i .e., b it D0 corresponds to digit 0,
bit D1 corresponds to digit 1 and so on). Table 10 lists some examples of the possible settings for the Decode Enable Register bits.
Note: A logic high enables decoding and a logic low bypasses the decoder altogether.
When decode mode is used, the decoder looks only at the lower-nibble (bits D3:D0) of the data in the Digit-Registers, disregarding bits D6:D4.
Bit D7 sets the decimal point (SEG DP) independent of the decoder and is positive logic (bit D7 = 1 turns the decimal point on). Table 10 lists the
code-B font; Table 11 lists the HEX font.
When no-decode mode is selected, data bits D7:D0 of the Digit-Registers correspond to the segment lines of the AS1106/AS1107. Table 12
shows the 1:1 pairing of each data bit to the appropriate segment line.
Figure 13. Standard 7-Segment LED Intensity Control and Inter-Digit Blanking
Table 8. Shutdown Register Format (Address (HEX) = 0xXC))
Mode HEX Code Register Data
D7 D6 D5 D4 D3 D2 D1 D0
Shutdown Mode,
Reset Feature Register to Default Settings 0x00 0XXXXXX0
Shutdown Mode, Feature Register Unchanged 0x80 1XXXXXX0
Normal Oper ation,
Reset Feature Register to Default Settings 0x01 0XXXXXX1
Normal Operation, Feature Register Unchanged 0x81 1XXXXXX1
Table 9. Decode Enable Register Format (Address (HEX) = 0xX9))
Decode Mode HEX Code Register Data
D7 D6 D5 D4 D3 D2 D1 D0
No decode for digits 7:0 0x00 0000000 0
Code-B/HEX decode for digit 0. No decode for digits 7:1 0x01 0 0 0 00001
Code-B/HEX decode for digits 3:0. No decode for digits 7:4 0x0F 00001111
Code-B/HEX decode for digits 7:0 0xFF 11111111
Table 10. Code-B Font
7-Segment Character Register Data On Segments = 1
D7 †D6:D4 D3 D2 D1 D0 DP †A B C D E F G
0 X 0000 1111110
1 X 0001 0110000
2 X 0010 1101101
3 X 0011 1111001
4 X 0100 0110011
A
B
G
F
E
D
C
DP
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AS1106, AS1107
Datasheet - Detailed Description
8.5.3 Display-Test Register (0xXF)
The AS1106/AS1107 devices can operate in two modes: normal mode and display test mode. In display test mode all LEDs are switched on at
maximum brightness (duty cycle is 15/16 (AS1 106) or 31/32 (AS1 107). The devices remain in display-test mode until the Display-T est Register is
set for normal operation.
Note: All settings of the digit- and control-registers are maint aine d.
5 X 0101 1011011
6 X 0110 1011111
7 X 0111 1110000
8 X 1000 1111111
9 X 1001 1111011
- X 1010 0000001
E X 1011 1001111
H X 1100 0110111
L X 1101 0001110
P X 1110 1100111
Blank X 1111 0000000
† The decimal point is enabled by setting bit D7 = 1.
Table 11. HEX Font
7-Segment Character Register Data On Segments = 1
D7 †D6:D4 D3 D2 D1 D0 DP †A B C D E F G
0 X 0000 1111110
1 X 0001 0110000
2 X 0010 1101101
3 X 0011 1111001
4 X 0100 0110011
5 X 0101 1011011
6 X 0110 1011111
7 X 0111 1110000
8 X 1000 1111111
9 X 1001 1111011
A X 1010 1110111
b X 1011 0011111
C X 1100 1001110
d X 1101 0111101
E X 1110 1001111
F X 1111 1000111
† The decimal point is enabled by setting bit D7 = 1.
Table 12. No-Decode Mode Data Bits and Corresponding Segment Lines
D7 D6 D5 D4 D3 D2 D1 D0
Corresponding Segment Line DP A B C D E F G
Table 13. Display-Test Register Format (Address (HEX) = 0xXF))
Mode Register Data
D7 D6 D5 D4 D3 D2 D1 D0
Normal Operation XXXXXXX0
Display Test Mode XXXXXXX1
Table 10. Code-B Font (Continued)
7-Segment Character Register Data On Segments = 1
D7 †D6:D4 D3 D2 D1 D0 DP †A B C D E F G
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AS1106, AS1107
Datasheet - Detailed Description
8.5.4 Intensity Control Register (0xXA)
The brightness of the display can be controlled by digital means using the Intensity Control Register and by analog means using RSET (see
Selecting RSET Resistor Value and Using External Drivers on page 14).
Display brightness is controlled by an integrated pulse-width modulator which is controlled by the lower-nibble of the Intensity Control Register.
The modulator scales the average segment-current in 16 steps from a maximum of 31/32 down to 1/32 (15/16 to 1/16 for the AS1107) of the
peak current set by RSET.
8.5.5 Scan-Limit Register (0x0B)
The Scan-Limit Register controls which of the digits are to be displayed. When all 8 digits are to be displayed, the update frequency is typically
800Hz. If the number of digits displayed is reduced, the update frequency is increased. The frequency can be calculated using 8fOSC/N, where
N is the number of digits. Since the number of displayed digits influences the brightness, RSET should be adjusted accordingly . Table 16 lists the
maximum allowed current when fewer than 4 digits are used.
Note: To avoid differences in brightness this register should not be used to blank parts of the display (leading zeros).
Table 14. Intensity Register Format (Address (HEX) = 0xXA))
Duty Cycle HEX Code Register Data
AS1106 AS1107 D7 D6 D5 D4 D3 D2 D1 D0
1/32 (min on)1/16 (min on) 0xX0 XXXX0000
3/32 2/16 0xX1 XXXX0001
5/32 3/16 0xX2 XXXX0010
7/32 4/16 0xX3 XXXX0011
9/32 5/16 0xX4 XXXX0100
11/32 6/16 0xX5 XXXX0101
13/32 7/16 0xX6 XXXX0110
15/32 8/16 0xX7 XXXX0111
17/32 9/16 0xX8 XXXX1000
19/32 10/16 0xX9 XXXX1001
21/32 11/16 0xXA XXXX1010
23/32 12/16 0xXB XXXX1011
25/32 13/16 0xXC XXXX1100
27/32 14/16 0xXD XXXX1101
29/32 15/16 0xXE XXXX1110
31/32 (max on)15/16 (max on) 0xXF XXXX1111
Table 15. Scan-Limit Register Format (Address (HEX) = 0xXB))
Scan Limit HEX Code Register Data
D7 D6 D5 D4 D3 D2 D1 D0
Display digit 0 only (see Table 16) 0xX0 XXXXX000
Display digits 0:1 (see Table 16) 0xX1 XXXXX001
Display digits 0:2 (see Table 16) 0xX2 XXXXX010
Display digits 0:3 0xX3 XXXXX011
Display digits 0:4 0xX4 XXXXX100
Display digits 0:5 0xX5 XXXXX101
Display digits 0:6 0xX6 XXXXX110
Display digits 0:7 0xX7 XXXXX111
Table 16. Maximum Segment Current for 1-, 2-, or 3-Digit Displays
Number of Digits Displayed Maximum Segment Current (mA)
110
220
330
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AS1106, AS1107
Datasheet - Detailed Description
8.5.6 Feature Register (0xXE)
The Feature Register is used for enabling various features including switching the device into external clock mode, applying an external reset,
selecting code-B or HEX decoding, enabling or disabling blinking, enabling or disabling the SPI-compatible interface (AS1106 only), setting the
blinking rate, and resetting the blink timing.
Note: At power-up the Feature Register is initialized to 0.
8.5.7 No-Op Register (0xX0)
The No-Op Register is used when multiple AS1106 or AS1107 devices are cascaded in order to support displays with more than 8 digits. The
cascading must be done in such a way that all DOUT pins are connected to DIN of the next AS1106/AS1107 (see Figure 14 on page 16). The
LOAD/CSN and CLK signals are connected to all devices.
For example, if five devices are cascaded, in order to perform a write operation to the fifth device, the write-command must be followed by four
no-operation commands. When the LOAD/CSN signal goes high, all shift registers are latched. The first four devices will receive no-operation
commands and only the fifth device will receive the intended operation command, and subsequently update its register.
Table 17. Feature Register Summary
D7 D6 D5 D4 D3 D2 D1 D0
blink_
start sync blink_
freq_sel blink_en spi_en decode_sel reg_res clk_en
Table 18. Feature Register Bit Descriptions (Address (HEX) = 0xXE))
Addr: 0xXE Feature Register
Enables and disables various device features.
Bit Bit Name Default Access Bit Description
D0 clk_en 0R/W
External clock active.
0 = Internal oscillator is used for system clock.
1 = Pin CLK of the serial interface operates as system clock input.
D1 reg_res 0R/W
Resets all control registers except the Feature Register.
0 = Reset Disabled. Normal operation.
1 = All control registers are reset to default state (except the Feature Register)
identically after power-up.
Note: The Digit Registers maintain their data.
D2 decode_sel 0R/W
Selects display decoding.
0 = Enable Code-B decoding (see Table 10 on page 10).
1 = Enable HEX decoding (see Table 11 on page 11).
D3 spi_en 0R/W
Enables the SPI-compatible interface.
0 = Disable SPI-compatible interface (AS1106 only).
1 = Enable the SPI-compatible interface (AS1106 only).
Note: The SPI-compatible interface is always enabled in the AS1107.
D4 blink_en 0R/W
Enables blinking.
0 = Disable blinking.
1 = Enable blinking.
D5 blink_freq_sel 0R/W
Sets blink with low frequency (with the internal oscillator enabled):
0 = Blink period typically is 1 second (0.5s on, 0.5s off) .
1 = Blink period is 2 seconds (1s on, 1s off).
D6 sync 0R/W
Synchronizes blinking on the rising edge of pin LOAD/CSN. The multiplex and blink
timing counter is cleared on the rising edge of pin LOAD/CSN. By setting this bit in
multiple AS1106/AS1107 devices, the blink timing can be synchronized across all the
devices.
D7 blink_start 0R/W
Start Blinking with display enabled phase. When bit D4 (blink_en) is set, bit D7
determin es how blinking starts.
0 = Blinking starts with the display turned off.
1 = Blinking starts with the display turned on.
www.austriamicrosystems.com/LED-Driver-ICs/AS1106_07 Revision 2.28 14 - 21
AS1106, AS1107
Datasheet - Application Information
9 Application Information
9.1 Supply Bypassing and Wiring
In order to achieve optimal performance the AS1106/AS1107 should be placed very close to the LED display to minimize effects of
electromagnetic interference and wiring inductance.
Furthermore, it is recommended to connect a 10µF electrolytic and a 0.1µF ceramic capacitor between pins VDD and GND to avoid power
supply ripple (see Figure 14 on page 16).
Note: Both GND pins must be connected to ground.
9.2 Selecting RSET Resistor Value and Using External Drivers
Brightness of the display segments is controlled via RSET. The current that flows between VDD and ISET defines the current that flows through
the LEDs.
Segment current is about 200 times the current in ISET. Typical values for RSET for different segment currents, operating voltages, and LED
voltage drop (VLED) are given in Tables 19 - 23. The maximum current the AS1106/AS1107 devices can drive is 40mA. If higher currents are
needed, external drivers must be used, in which case it is no longer necessary that the devices drive high currents.
In cases where the devices only drive a few digits, Table 16 specifies the maximum currents, and RSET must be set accordingly.
Note: The display brightness can also be logically controlled (see Intensity Control Register (0xXA) on page 12).
Table 19. RSET vs. Segment Current and LED Forward Voltage, VDD = 2.7V
ISEG (mA) VLED(V)
1.5 2.0
40 5kΩ4.4kΩ
30 6.9kΩ5.9kΩ
20 10.7kΩ9.6kΩ
10 22.2kΩ20.7kΩ
Table 20. RSET vs. Segment Current and LED Forward Voltage, VDD = 3.3V
ISEG (mA) VLED(V)
1.5 2.0 2.5
40 6.7kΩ6.4kΩ5.7kΩ
30 9.1kΩ8.8kΩ8.1kΩ
20 13.9kΩ13.3kΩ12.6kΩ
10 28.8kΩ27.7kΩ26kΩ
Table 21. RSET vs. Segment Current and LED Forward Voltage, VDD = 3.6V
ISEG (mA) VLED(V)
1.5 2.0 2.5 3.0
40 7.5kΩ7.2kΩ6.6kΩ5.5kΩ
30 10.18kΩ9.8kΩ9.2kΩ7.5kΩ
20 15.6kΩ15kΩ14.3kΩ13kΩ
10 31.9kΩ31kΩ29.5kΩ27.3kΩ
Table 22. RSET vs. Segment Current and LED Forward Voltage, VDD = 4.0V
ISEG (mA) VLED(V)
1.5 2.0 2.5 3.0 3.5
40 8.6kΩ8.3kΩ7.9kΩ7.6kΩ5.2kΩ
30 11.6kΩ11.2kΩ10.8kΩ9.9kΩ7.8kΩ
20 17.7kΩ17.3kΩ16.6kΩ15.6kΩ13.6kΩ
10 36.89kΩ35.7kΩ34.5kΩ32.5kΩ29.1kΩ
www.austriamicrosystems.com/LED-Driver-ICs/AS1106_07 Revision 2.28 15 - 21
AS1106, AS1107
Datasheet - Application Information
9.3 Calculating the Power Dissipation
The upper limit for power dissipation (PD) for the AS1106/AS1107 is determined from the following equation:
PD = (VDD x 1mA) + (VDD - VLED)(DUTY x ISEG x N) (EQ 1)
Where:
VDD is the supply voltage.
DUTY is the duty cycle set by intensity register (page 12).
N is the number of segments driven (worst case is 8)
VLED is the LED forward voltage
ISEG = segment current set by RSET
Dissipation Example:
ISEG = 40mA, N = 8, DUTY = 31/32, VLED = 1.8V at 40mA, VDD = 5.25V (EQ 2)
PD = 5.25V(1mA) + (5.25V - 1.8V)(31/32 x 40mA x 8) = 1.075W (EQ 3)
Thus, for a PDIP package ΘJA = +75°C/W (from Table 24), the maximum allowed TAMB is given by:
TJ,MAX = TAMB + PD x
Θ
JA = 150°C = TAMB +1.07W x 75°C/W (EQ 4)
Where:
TAMB = +69.4°C.
The TAMB limit for SO Packages in the dissipation example above is +58.6°C.
Table 23. RSET vs. Segment Current and LED Forward Voltage, VDD = 5.0V
ISEG (mA) VLED (V)
1.5 2.0 2.5 3.0 3.5 4.0
40 11.35kΩ11.12kΩ10.84kΩ10.49kΩ10.2kΩ9.9kΩ
30 15.4kΩ15.1kΩ14.7kΩ14.4kΩ13.6kΩ13.1kΩ
20 23.6kΩ23.1kΩ22.6kΩ22kΩ21.1kΩ20.2kΩ
10 48.9kΩ47.8kΩ46.9kΩ45.4kΩ43.8kΩ42kΩ
Table 24. Package Thermal Data
Package Thermal Resistance (ΘJA)
24 Narrow DIP +75°C/W
24 Wide SOIC +85°C/W
www.austriamicrosystems.com/LED-Driver-ICs/AS1106_07 Revision 2.28 16 - 21
AS1106, AS1107
Datasheet - Application Information
9.4 8x8 LED Dot Matrix Driver
The application example in Figure 14 shows the AS1106 as an 8x8 LED dot matrix driver.
The LED columns have common cathodes and are connected to the DIG0:7 outputs. The rows are connected to the segment drivers. Each of
the 64 LEDs can be addressed separately. The columns are selected via the digits as listed in Table 7 on page 9.
The Decode Enable Register (see page 10) must be set to ‘00000000’ as described in Table 9 on page 10. Single LEDs in a column can be
addressed as described in Table 12 on page 11, where bit D0 corresponds to segment G and bit D7 corresponds to segment DP.
Note: For a multiple-digit dot matrix, multiple AS1106 devices must be cascaded.
Figure 14. Application Example as LED Dot Matrix Driver
9.5 Cascading Drivers
The example in Figure 14 drives 2 dot matrix digits using a 4-wire microprocessor interface. All Scan-Limit Registers should be set to the same
value so that one display will not appear brighter than the other.
For example, to display 12 digits, set both Scan-Limit Registers to display 6 digits so that both displays have a 1/6 duty cycle per digit. If 11 digits
are needed, set both Scan-Limit Registers to display 6 digits and leave one digit unconnected. Otherwise, if one driver is set to displa y 6 digits
and the other to display 5 digits
one display will appear brighter because its duty cycle per digit will be 1/5 and the other display’s duty cycle will
be 1/6.
Note: Refer to No-Op Register (0xX0) on page 13 for additional information.
SEG G
DIG0:7
ISET
DIN
GND
GND
LOAD/CSN
CLK
VDD
SEG A:G
SEG DP
9.53kΩ
DIG0:7
ISET
DIN
GND
GND
LOAD/CSN
CLK
VDD
SEG A:G
SEG DP
9.53kΩ
DOUT
8x8 LED Dot Matrix 8x8 LED Dot Matrix
Diode Arrangement
VBATVBAT
Micro-
Processor
SEG A
SEG DP
SEG B
SEG C
SEG D
SEG E
SEG F
SEG G
SEG A
SEG DP
SEG B
SEG C
SEG D
SEG E
SEG F
AS1106/
AS1107
AS1106/
AS1107
www.austriamicrosystems.com/LED-Driver-ICs/AS1106_07 Revision 2.28 17 - 21
AS1106, AS1107
Datasheet - Package Drawings and Markings
10 Package Drawings and Markings
Figure 15. AS1106, AS1107 Marking
Table 25. Packaging Code
YY WW Q or L ZZ
last two digits of the current year manufacturing week plant identifier free choice / traceability code
www.austriamicrosystems.com/LED-Driver-ICs/AS1106_07 Revision 2.28 20 - 21
AS1106, AS1107
Datasheet - Ordering Information
11 Ordering Information
The AS1106 and AS1107 are available as the standard products shown in Table 26.
Note: All products are RoHS compliant.
Buy our products or get free samples online at ICdirect: http://www.austriamicrosystems.com/ICdirect
Technical Support is found at http://www.austriamicrosystems.com/Technical-Support
For further information and requests, please contact us mailto:sales@austriamicrosystems.com
or find your local distributor at http://www.austriamicrosystems.com/distributor
Table 26. Ordering Information
Ordering Code Marking Description Temperature Range Delivery Form Package
AS1106PL1
1. The PDIP 24-pin Package reached end of life. There is the possibility for a last time buy order until end of July 2011.
AS1106PL 8-Digit LED Display Drivers 0 to +70°C Tubes PDIP 24-pin
AS1106WL AS1106WL 8-Digit LED Display Drivers 0 to +70°C Tubes SOIC 24-pin
AS1106WL-T AS1106WL 8-Digit LED Display Drivers 0 to +70°C Tape and Reel SOIC 24-pin
AS1106PE1AS1106PE 8-Digit LED Display Drivers -40 to +85°C Tubes PDIP 24-pin
AS1106WE AS1106WE 8-Digit LED Display Drivers -40 to +85°C Tubes SOIC 24-pin
AS1106WE-T AS1106WE 8-Digit LED Display Drivers -40 to +85°C Tape and Reel SOIC 24-pin
AS1107PL1AS1107PL 8-Digit LED Display Drivers -40 to +85°C Tubes PDIP 24-pin
AS1107WL AS1107WL 8-Digit LED Display Drivers -40 to +85°C Tubes SOIC 24-pin
AS1107WL-T AS1107WL 8-Digit LED Display Drivers -40 to +85°C Tape and Reel SOIC 24-pin
www.austriamicrosystems.com/LED-Driver-ICs/AS1106_07 Revision 2.28 21 - 21
AS1106, AS1107
Datasheet
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