IRFP9240 - Intersil Corporation

4-71

File Number

2294.3

CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures.

IRFP9240

12A, 200V, 0.500 Ohm, P-Channel Power

MOSFET

This P-Channel enhancement mode silicon gate power ﬁeld

effect transistor is an advanced power MOSFET designed,

tested, and guaranteed to withstand a speciﬁed level of

energy in the breakdown avalanche mode of operation. All of

these power MOSFETs are designed for applications such

as switching regulators, switching convertors, motor drivers,

relay drivers, and drivers for high power bipolar switching

transistors requiring high speed and low gate drive power.

These types can be operated directly from integrated

circuits.

Formerly developmental type TA17522.

Features

• 12A, 200V

•r

DS(ON) = 0.500Ω

• Single Pulse Avalanche Energy Rated

• SOA is Power Dissipation Limited

• Nanosecond Switching Speeds

• Linear Transfer Characteristics

• High Input Impedance

Symbol

Packaging

JEDEC STYLE TO-247

Ordering Information

PART NUMBER PACKAGE BRAND

IRFP9240 TO-247 IRFP9240

NOTE: When ordering, use the entire part number.

SOURCE

DRAIN

GATE

DRAIN

(TAB)

Data Sheet July 1999

4-72

Absolute Maximum Ratings TC = 25oC, Unless Otherwise Speciﬁed IRFP9240 UNITS

Drain to Source Breakdown Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .VDS -200 V

Drain to Gate Voltage (RGS = 20kΩ) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDGR -200 V

Continuous Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID

TC = 125oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID-12

-7.5 A

Pulsed Drain Current (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IDM -48 A

Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .VGS ±20 V

Maximum Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .PD150 W

Linear Derating Factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.2 W/oC

Single Pulse Avalanche Energy Rating (Note 4). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .EAS 790 mJ

Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ, TSTG -55 to 150 oC

Maximum Temperature for Soldering

Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TL

Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Tpkg 300

260

CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operationofthe

device at these or any other conditions above those indicated in the operational sections of this speciﬁcation is not implied.

NOTE:

1. TJ = 25oC to 125oC.

Electrical Speciﬁcations TC = 25oC, Unless Otherwise Speciﬁed

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS

Drain to Source Breakdown Voltage BVDSS ID = -250µA, VGS = 0V (Figure 10) -200 - - V

Gate Threshold Voltage VGS(TH) VGS = VDS, ID = -250µA -2.0 - -4.0 V

Zero Gate Voltage Drain Current IDSS VDS = Rated BVDSS, VGS = 0V - - 25 µA

VDS = 0.8 x Rated BVDSS, VGS = 0V, TJ = 125oC - - 250 µA

On-State Drain Current (Note 2) ID(ON) VDS > ID(ON) x rDS(ON)MAX, VGS = -10V -12 - - A

Gate to Source Leakage Current IGSS VGS = ±20V - - ±100 nA

Drain to Source On Resistance (Note 2) rDS(ON) ID = -6.3A, VGS = -10V (Figures 8, 9) - 0.380 0.500 Ω

Forward Transconductance (Note 2) gfs VDS ≤ -50V, ID = -6.3A (Figure 12) 3.8 5.7 - S

Turn-On Delay Time td(ON) VDD = -100V, ID≈ -12A, RG = 9.1Ω,

VGS = -10V, RL = 7.6Ω, (Figures 17, 18)

MOSFET Switching Times are Essentially Indepen-

dent of Operating Temperature

-1822ns

Rise Time tr-4568ns

Turn-Off Delay Time td(OFF) -7590ns

Fall Time tf-2944ns

Total Gate Charge

(Gate to Source + Gate to Drain) Qg(TOT) VGS = -10V, ID = -12A, VDS = 0.8 x Rated BVDSS

Ig(REF) = -1.5mA (Figures 14, 19, 20)

Gate Charge is Essentially Independent of Operat-

ing Temperature

-3857nC

Gate to Source Charge Qgs -8-nC

Gate to Drain “Miller” Charge Qgd -21-nC

Input Capacitance CISS VDS = -25V, VGS = 0V, f = 1MHz

(Figure 11) - 1400 - pF

Output Capacitance COSS - 350 - pF

Reverse Transfer Capacitance CRSS - 140 - pF

Internal Drain Inductance LDMeasured From the Con-

tact Screw on Header

ClosertoSourceandGate

Pins to Center of Die

Modified MOSFET

Symbol Showing the

Internal Devices

Inductances

- 5.0 - nH

Internal Source Inductance LSMeasured From the

Source Pin, 6mm (0.25in)

From Header to Source

Bonding Pad

- 12.5 - nH

Thermal Resistance Junction to Case RθJC - - 0.83 oC/W

Thermal Resistance Junction to Ambient RθJA Free Air Operation - - 30 oC/W

IRFP9240

4-73

Source to Drain Diode Speciﬁcations

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS

Continuous Source to Drain Current ISD Modified MOSFET Symbol

Showing the Integral Re-

verse P-N Junction Rectifier

- - -12 A

Pulse Source to Drain Current

(Note 3) ISDM - - -48 A

Source to Drain Diode Voltage (Note 2) VSD TJ = 25oC, ISD = -12A, VGS = 0V, (Figure 13) - - -1.5 V

Reverse Recovery Time trr TJ = 25oC, ISD = -11A, dISD/dt = 100A/µs - 210 - ns

Reverse Recovery Charge QRR TJ = 25oC, ISD = -11A, dISD/dt = 100A/µs - 2.0 - µC

NOTES:

2. Pulse test: pulse width ≤300µs, duty cycle ≤ 2%.

3. Repetitive rating: pulse width limited by maximum junction temperature. See Transient Thermal Impedance curve (Figure 3).

4. VDD = 50V, starting TJ= 25oC, L = 8.2mH, RG= 50Ω, peak IAS = 12A (Figures 15, 16).

Typical Performance Curves

Unless Otherwise Speciﬁed

FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE

TEMPERATURE FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs

CASE TEMPERATURE

FIGURE 3. MAXIMUM TRANSIENT THERMAL IMPEDANCE

TC, CASE TEMPERATURE (oC)

POWER DISSIPATION MULTIPLIER

0.0 0 25 50 75 100 150

0.2

0.4

0.6

0.8

1.0

1.2

125 050 100

ID, DRAIN CURRENT (A)

TC, CASE TEMPERATURE (oC)

150

25 75 125

0.1

10-3

10-5 10-4 10-3 10-2 0.1 1 10

ZθJC, NORMALIZED

THERMAL IMPEDANCE

t1, RECTANGULAR PULSE DURATION (S)

SINGLE PULSE

PDM

NOTES:

DUTY FACTOR: D = t1/t2

PEAK TJ = PDM x ZθJC x RθJC + TC

0.1

0.02

0.2

0.5

0.01

0.05

10-2

IRFP9240

4-74

FIGURE 4. FORWARD BIAS SAFE OPERATING AREA FIGURE 5. OUTPUT CHARACTERISTICS

FIGURE 6. SATURATION CHARACTERISTICS FIGURE 7. TRANSFER CHARACTERISTICS

NOTE: Heating effect of 2µs pulse is minimal.

FIGURE 8. DRAIN TO SOURCE ON RESISTANCE vs GATE

VOLTAGE AND DRAIN CURRENT FIGURE 9. NORMALIZED DRAIN TO SOURCE ON

RESISTANCE vs JUNCTION TEMPERATURE

Typical Performance Curves

Unless Otherwise Speciﬁed (Continued)

-1 -10 -102-103

VDS, DRAIN TO SOURCE VOLTAGE (V)

-103

-102

-10

-1

-0.1

ID, DRAIN CURRENT (A)

SINGLE PULSE

TJ = MAX RATED

BY rDS(ON)

AREA IS LIMITED

OPERATION IN THIS

10µs

100µs

1ms

10ms

ID, DRAIN CURRENT (A)

020406080

100

VGS = -5V

VDS, DRAIN TO SOURCE VOLTAGE (V)

VGS = -4V

VGS = -6V

VGS = -8V

VGS = -10V

VGS = -7V

PULSE DURATION = 80µs

DUTY CYCLE = 0.5% MAX

0246 10

ID, DRAIN CURRENT (A)

VDS, DRAIN TO SOURCE VOLTAGE (V)

20 VGS = -10V

VGS = -4V

VGS = -6V

VGS = -8V

VGS = -7V

VGS = -5V

PULSE DURATION = 80µs

DUTY CYCLE = 0.5% MAX

0-4 -6 -8 -10-2

VGS, GATE TO SOURCE VOLTAGE (V)

-0.1

-1.0

-10

ID, DRAIN CURRENT (A)

-102

TJ = 25oCTJ = 150oC

PULSE DURATION = 80µs

DUTY CYCLE = 0.5% MAX

VDS ≤ -50V

-10 -20 -30 -40

rDS(ON), DRAIN TO SOURCE

ID, DRAIN CURRENT (A) -50

VGS = -20V

VGS = -10V

ON RESISTANCE (Ω)

PULSE DURATION = 80µs

DUTY CYCLE = 0.5% MAX

NORMALIZED DRAIN TO SOURCE

3.0

1.8

1.2

0.6

0-40 0 40

TJ, JUNCTION TEMPERATURE (oC)

120

2.4

80 160

ON RESISTANCE

PULSE DURATION = 80µs

DUTY CYCLE = 0.5% MAX

VGS = -10V, ID = -6.3A

IRFP9240

4-75

FIGURE 10. NORMALIZED DRAIN TO SOURCE BREAKDOWN

VOLTAGE vs JUNCTION TEMPERATURE FIGURE 11. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE

FIGURE 12. TRANSCONDUCTANCE vs DRAIN CURRENT FIGURE 13. SOURCE TO DRAIN DIODE VOLTAGE

FIGURE 14. GATE TO SOURCE VOLTAGE vs GATE CHARGE

Typical Performance Curves

Unless Otherwise Speciﬁed (Continued)

1.25

0.95

0.85

0.75 -40 0 40

TJ, JUNCTION TEMPERATURE (oC)

NORMALIZED DRAIN TO SOURCE

BREAKDOWN VOLTAGE

80 120 160

1.05

1.15

ID = 250µA

VDS, DRAIN TO SOURCE VOLTAGE (V)

C, CAPACITANCE (nF)

3000

2400

1800

1200

600

0-1 -2 -5 -10 -2 -5 -102

CISS = CGS + CGD

CRSS = CGD

COSS ≈ CDS + CGD

VGS = 0V, f = 1MHz

CISS

COSS

CRSS

ID, DRAIN CURRENT (A)

gfs, TRANSCONDUCTANCE (S)

0 -4 -8 -12 -16

-20

TJ = 150oC

TJ = 25oC

PULSE DURATION = 80µs

DUTY CYCLE = 0.5% MAX

VDS ≤-50V

-0.4 -1.0 -1.2 -1.6 -1.8-0.6 VSD, SOURCE TO DRAIN VOLTAGE (V)

-0.8 -1.4

-0.1

-1.0

-10

ISD, DRAIN CURRENT (A)

-100

TJ = 25oC

TJ = 150oC

PULSE DURATION = 80µs

DUTY CYCLE = 0.5% MAX

0 1224364860

ID = -12A

Qg(TOT), TOTAL GATE CHARGE (nC)

VGS, GATE TO SOURCE (V)

VDS = -160V

VDS = -40V

VDS = -100V

IRFP9240

4-76

Test Circuits and Waveforms

FIGURE 15. UNCLAMPED ENERGY TEST CIRCUIT FIGURE 16. UNCLAMPED ENERGY WAVEFORMS

FIGURE 17. SWITCHING TIME TEST CIRCUIT FIGURE 18. RESISTIVE SWITCHING WAVEFORMS

FIGURE 19. GATE CHARGE TEST CIRCUIT FIGURE 20. GATE CHARGE WAVEFORMS

0.01Ω

IAS

VDS

VDD

DUT

VARY tP TO OBTAIN

REQUIRED PEAK IAS

VGS

VDD

VDS

BVDSS

IAS

tAV

VGS

DUT

-VDD

td(ON)

90%

10%

VDS 90%

td(OFF)

tOFF

90%

50%

10%

PULSE WIDTH

VGS

tON

10%

0.3µF

12V

BATTERY 50kΩ

+VDS

DUT

Ig(REF)

(ISOLATED

-VDS

0.2µF

CURRENT

REGULATOR

ID CURRENT

SAMPLING

IG CURRENT

SAMPLING

SUPPLY)

RESISTOR RESISTOR

DUT

Qg(TOT)

Qgd

Qgs

VDS

VGS

VDD

Ig(REF)

IRFP9240

4-77

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Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time with-

out notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and

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P. O. Box 883, Mail Stop 53-204

Melbourne, FL 32902

TEL: (407) 724-7000

FAX: (407) 724-7240

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IRFP9240