1
File Number 1894.4
CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures.
http://www.intersil.com or 407-727-9207 |Copyright © Intersil Corporation 1999
IRFF430
2.75A, 500V, 1.500 Ohm, N-Channel
Power MOSFET
This N-Channel enhancement mode silicon gate power field
effect transistor is an advanced power MOSFET designed,
tested, and guaranteed to withstand a specified level of
energy in the breakdown avalanche mode of operation. All of
these power MOSFETs are designed for applications such
as switching regulators, switching convertors, motor drivers,
relay drivers, and drivers for high power bipolar switching
transistors requiring high speed and low gate drive power.
These types can be operated directly from integrated
circuits.
Formerly developmental type TA17415.
Features
2.75A, 500V
•r
DS(ON) = 1.500
Single Pulse Avalanche Energy Rated
SOA is Power Dissipation Limited
Nanosecond Switching Speeds
Linear Transfer Characteristics
High Input Impedance
Related Literature
- TB334 “Guidelines for Soldering Surface Mount
Components to PC Boards”
Symbol
Packaging
JEDEC TO-205AF
Ordering Information
PART NUMBER PACKAGE BRAND
IRFF430 TO-205AF IRFF430
NOTE: When ordering, include the entire part number.
D
G
S
SOURCE
GATE
DRAIN
(CASE)
Data Sheet March 1999
2
Absolute Maximum Ratings TC = 25oC, Unless Otherwise Specified
IRFF430 UNITS
Drain to Source Voltage (Note 1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .VDS 500 V
Drain to Gate Voltage (RGS = 20kΩ) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDGR 500 V
Continuous Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID2.75 A
Pulsed Drain Current (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IDM 11 A
Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .VGS ±20 V
Maximum Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .PD25 W
Linear Derating Factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.2 W/oC
Single Pulse Avalanche Energy Rating (Note 4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .EAS 300 mJ
Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ,T
STG -55 to 150 oC
Maximum Temperature for Soldering
Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TL
Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .T
pkg 300
260
oC
oC
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. TJ = 25oC to TJ = 125oC.
Electrical Specifications TC = 25oC, Unless Otherwise Specified
PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
Drain to Source Breakdown Voltage BVDSS VGS = 0V, ID = 250µA (Figure 10) 500 - - V
Gate to Threshold Voltage VGS(TH) VGS = VDS, ID = 250µA 2.0 - 4.0 V
Zero-Gate Voltage Drain Current IDSS VDS = Rated BVDSS, VGS = 0V - - 25 µA
VDS = 0.8 x Rated BVDSS, VGS = 0V, TJ = 125oC - - 250 µA
On-State Drain Current (Note 2) ID(ON) VDS > ID(ON) xr
DS(ON)MAX,V
GS = 10V (Figure 7) 2.75 - - A
Gate to Source Leakage Current IGSS VGS = ±20V - - ±100 nA
Drain to Source On Resistance (Note 2) rDS(ON) VGS = 10V, ID = 1.5A (Figures 8, 9) - 1.3 1.500
Forward Transconductance (Note 2) gfs VDS 10V, ID = 2.7A (Figure 12) 2.5 3.0 - S
Turn-On Delay Time td(ON) ID 2.75A, RG = 9.1, VDD = 225V, RL = 80,
VGS =10V(Figures17,18),MOSFETSwitchingTimes
are Essentially Independent of Operating Temperature
- - 30 ns
Rise Time tr- - 30 ns
Turn-Off Delay Time td(OFF) - - 55 ns
Fall Time tf- - 30 ns
Total Gate Charge
(Gate to Source + Gate to Drain) Qg(TOT) VGS = 10V, ID 2.75A, VDS = 0.8 x Rated BVDSS,
IG(REF) = 1.5mA (Figures 14, 19, 20), Gate Charge is
Essentially Independent of Operating Temperature
-2230nC
Gate to Source Charge Qgs -11- nC
Gate to Drain “Miller” Charge Qgd -11- nC
Input Capacitance CISS VGS = 0V, VDS = 25V, f = 1.0MHz (Figure 11) - 600 - pF
Output Capacitance COSS - 100 - pF
Reverse-Transfer Capacitance CRSS -30- pF
Internal Drain Inductance LDMeasured from the Drain
Lead, 5mm (0.2in) from
Header to Center of Die
Modified MOSFET
Symbol Showing the
Internal Device
Inductances
- 5.0 - nH
Internal Source Inductance LSMeasuredfromtheSource
Lead, 5mm (0.2in) from
Header and Source
Bonding Pad
-15- nH
Thermal Resistance Junction to Case RθJC - - 5.0 oC/W
Thermal Resistance Junction to Ambient RθJA Free Air 0peration - - 175 oC/W
LD
LS
D
S
G
IRFF430
3
Source to Drain Diode Specifications
PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
Continuous Source to Drain Current ISD Modified MOSFET
Symbol Showing the
Integral Reverse P-N
Junction Rectifier
- - 2.75 A
Pulse Source to Drain Current (Note 3) ISDM - - 11 A
Source to Drain Diode Voltage (Note 2) VSD TJ = 25oC, ISD = 2.75A, VGS = 0V (Figure 13) - - 1.4 V
Reverse Recovery Time trr TJ = 150oC, ISD = 2.75A, dISD/dt = 100A/µs - 800 - ns
Reverse Recovered Charge QRR TJ = 150oC, ISD = 2.75A, dISD/dt = 100A/µs - 4.6 - µC
NOTES:
2. Pulse test: pulse width 300µs, duty cycle 2%.
3. Repetitive rating: pulse width limited by Max junction temperature. See Transient Thermal Impedance curve (Figure 3).
4. VDD = 50V, start TJ = 25oC, L = 69.42mH, RG = 50, peak IAS = 2.75A (Figures 15, 16).
Typical Performance Curves Unless Otherwise Specified
FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE
TEMPERATURE FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs
CASE TEMPERATURE
FIGURE 3. NORMALIZED MAXIMUM TRANSIENT THERMAL IMPEDANCE
D
S
G
0 50 100 150
0
TC, CASE TEMPERATURE (oC)
POWER DISSIPATION MULTIPLIER
0.2
0.4
0.6
0.8
1.0
1.2
TC, CASE TEMPERATURE (oC)
50 75 10025 150
3.0
2.4
1.8
0
1.2
ID, DRAIN CURRENT (A)
0.6
125
ZθJC, NORMALIZED TRANSIENT
1.0
0.1
10-2
10-2
10-5 10-4 10-3 0.1 1 10
SINGLE PULSE
t1, RECTANGULAR PULSE DURATION (s)
0.01
0.5
0.1
0.05
0.02
0.2
THERMAL IMPEDANCE
DUTY FACTOR: D = t1/t2
NOTES:
PEAK TJ= PDM x ZθJC x RθJC + TC
t2
PDM
t1t2
IRFF430
4
FIGURE 4. FORWARD BIAS SAFE OPERATING AREA FIGURE 5. OUTPUT CHARACTERISTICS
FIGURE 6. SATURATION CHARACTERISTICS FIGURE 7. TRANSFER CHARACTERISTICS
NOTE: Heating effect of 2µs pulse is minimal.
FIGURE 8. DRAIN TO SOURCE ON RESISTANCE vs GATE
VOLTAGE AND DRAIN CURRENT
FIGURE 9. NORMALIZED DRAIN TO SOURCE ON
RESISTANCE vs JUNCTION TEMPERATURE
Typical Performance Curves Unless Otherwise Specified (Continued)
10
1
0.1
103
11010
2
0.01
ID, DRAIN CURRENT (A)
VDS, DRAIN TO SOURCE VOLTAGE (V)
20
OPERATION IN THIS
AREA IS LIMITED
BY rDS(ON) 10ms
100ms
1ms
DC
100 s
10 s
TC = 25oC
TJ = MAX RATED
SINGLE PULSE
VDS, DRAIN TO SOURCE VOLTAGE (V)
100 2000 300
6
4
3
0
2
ID, DRAIN CURRENT (A)
VGS = 5V
VGS = 4.5V
VGS = 4V
80µs PULSE TEST
1
VGS = 5.5V
5VGS = 10V
VDS, DRAIN TO SOURCE VOLTAGE (V)
2468010
5
4
3
0
2
ID, DRAIN CURRENT (A)
VGS = 10V
VGS = 5V
VGS = 4.5V
VGS = 5.5V
80µs PULSE TEST
1VGS = 4V
VDS > ID(ON) x rDS(ON)MAX
80µs PULSE TEST
TJ = 125oC
ID(ON), ON-STATE DRAIN CURRENT (A)
VGS, GATE TO SOURCE VOLTAGE (V)
5
3
1
001234 7
2
4
TJ = -55oC
TJ = 25oC
56
ID, DRAIN CURRENT (A)
5 101520025
4
1
3
rDS(ON), DRAIN TO SOURCE
VGS = 20V
2
VGS = 10V
ON RESISTANCE
2.2
1.4
0.6
0 160
TJ, JUNCTION TEMPERATURE (oC)
NORMALIZED DRAIN TO SOURCE
1.8
1.0
0.2 -40 40 80 120
ID = 1.5A
VGS = 10V
ON RESISTANCE
IRFF430
5
FIGURE 10. NORMALIZED DRAIN TO SOURCE BREAKDOWN
VOLTAGE vs JUNCTION TEMPERATURE FIGURE 11. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE
FIGURE 12. TRANSCONDUCTANCE vs DRAIN CURRENT FIGURE 13. SOURCE TO DRAIN DIODE VOLTAGE
FIGURE 14. GATE TO SOURCE VOLTAGE vs GATE CHARGE
Typical Performance Curves Unless Otherwise Specified (Continued)
1.25
1.05
0.85
0 160
TJ, JUNCTION TEMPERATURE (oC)
NORMALIZED DRAIN TO SOURCE
1.15
0.95
0.75
-40 40 80 120
BREAKDOWN VOLTAGE
VDS, DRAIN TO SOURCE VOLTAGE (V)
C, CAPACITANCE (pF)
2000
1600
1200
800
400
0
VGS = 0V, f = 1MHz
CISS = CGS + CGD
CRSS = CGD
COSS CDS + CGD
CISS
COSS
CRSS
1 1020304050
ID, DRAIN CURRENT (A)
123405
5
4
3
0
2
gfs, TRANSCONDUCTANCE (S)
1
TJ = 125oC
TJ = 25oC
TJ = -55oC
80µs PULSE TEST
TJ = 150oC
ISD, SOURCE TO DRAIN CURRENT (A)
VSD, SOURCE TO DRAIN VOLTAGE (V)
100
10
101234
TJ = 25oC
TJ = 150oC
TJ = 25oC
80µs PULSE TEST
Qg(TOT), TOTAL GATE CHARGE (nC)
8162432040
20
15
0
10
VGS, GATE TO SOURCE VOLTAGE (V)
5
ID = 2.75A
VDS = 400V
VDS = 250V
VDS = 100V
IRFF430
6
Test Circuits and Waveforms
FIGURE 15. UNCLAMPED ENERGY TEST CIRCUIT FIGURE 16. UNCLAMPED ENERGY WAVEFORMS
FIGURE 17. SWITCHING TIME TEST CIRCUIT FIGURE 18. RESISTIVE SWITCHING WAVEFORMS
FIGURE 19. GATE CHARGE TEST CIRCUIT FIGURE 20. GATE CHARGE WAVEFORMS
tP
VGS
0.01
L
IAS
+
-
VDS
VDD
RG
DUT
VARY tP TO OBTAIN
REQUIRED PEAK IAS
0V
VDD
VDS
BVDSS
tP
IAS
tAV
0
VGS
RL
RG
DUT
+
-VDD
tON
td(ON)
tr
90%
10%
VDS 90%
10%
tf
td(OFF)
tOFF
90%
50%
50%
10% PULSE WIDTH
VGS
0
0
0.3µF
12V
BATTERY 50k
VDS
S
DUT
D
G
IG(REF)
0
(ISOLATED
VDS
0.2µF
CURRENT
REGULATOR
ID CURRENT
SAMPLING
IG CURRENT
SAMPLING
SUPPLY)
RESISTOR RESISTOR
SAME TYPE
AS DUT Qg(TOT)
Qgd
Qgs
VDS
0
VGS
VDD
IG(REF)
0
IRFF430
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Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time with-
out notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
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IRFF430