MAX77387
Dual-Phase Adaptive DC-DC Step-Up Converter
With 2x 1000mA High-Side Current Regulators
31Maxim Integrated
Adaptive Output Voltage Regulation
The IC uses an adaptive voltage scheme to optimize
system efficiency based on the forward voltage of the
populated LED. To ensure that the DC-DC converter is
operating in a stable condition and that the current regu-
lators are providing the correct output current levels, the
voltages across the current regulators are sampled to
determine whether the output voltage of the DC-DC con-
verter needs to be increased or decreased.
The adaptive control loop controls an internal 9-bit DAC
that sets the output voltage of the DC-DC converter.
During a torch or flash event, the DC-DC converter con-
tinuously adapts its output voltage up or down by one
DAC LSB (VADPT_REG_STEP) every 1Fs during soft-
start, and every 8Fs during normal operation.
During the torch or flash event, the DC-DC converter
output voltage is logged and then stored in both the
DCDC_OUT and DCDC_OUT_MAX registers.
The DCDC_OUT register is used to store the value of the
DC-DC converter output voltage just before the current
regulator is disabled. The DCDC_OUT_MAX register is
used to store the maximum value of the DC-DC con-
verter output voltage that occurred during the torch or
flash event. The information stored in these two registers
allows the user to predict the forward voltage of the LED
for diagnostics.
In certain cases, the adaptive control loop operation is
limited. During minimum duty cycle operation, the DC-DC
converter output voltage is only allowed to increase
to ensure correct operation. During the time when the
DC-DC converter is operating at the peak input current
limit, the DC-DC converter output voltage is only allowed
to decrease since increasing the output voltage would
require a greater input current than is allowed.
If the adaptive control loop attempts to increase the
DC-DC converter output voltage above the OVP_D volt-
age level, then the output voltage is maintained at this
level for the duration of the OVP_D debounce time. If the
adaptive control loop continues to attempt to increase the
output voltage above the OVP_D voltage level after the
OVP_D debounce timer expires, then this is an indication
that the LED forward voltage is too high for the IC or the
LED is not correctly installed.
Current Regulator Voltage Headroom
The current regulator headroom is selectable between
+120mV to +210mV in 30mV steps. This allows the user
to optimize for either efficiency or accuracy.
Lowering the voltage headroom of the current regulator
reduces the accuracy and the PSRR of the current regu-
lator while improving the system efficiency.
Increasing the voltage headroom of the current regula-
tor improves the accuracy and the PSRR of the current
regulator while reducing the system efficiency.
Step-Up Converter
The IC includes a dual-phase PWM step-up converter
that supplies power to the flash LEDs. The output volt-
age can be adaptively controlled based on the forward
voltage of the installed LEDs. The step-up converter
switches an internal power MOSFET at frequencies up to
4MHz (per phase), resulting in a maximum output ripple
frequency of 8MHz, with a duty cycle that can vary from
3.125% to 75% to maintain constant output voltage as
VIN and load vary. Internal circuitry prevents any unwant-
ed subharmonic switching by forcing a minimum duty-
cycle. Alternatively, the converter can be programmed to
enter skip mode for light load conditions to ensure high
efficiency for low output current operation.
Dual-Phase Operation
The advantage of the IC dual-phase control architecture
is that the effective switching frequency is doubled. This
provides a significant reduction in the output voltage
ripple, hence reducing stress on the output capacitor.
Lowering the output voltage ripple also lowers the output
current ripple of the current regulator, resulting in lower
EMI for the system.
For high-current applications such as LED flash, the dual
phase scheme also helps reduce the inductor size. For
example, a traditional single-phase architecture requiring
an input current of 3A and an inductor saturation current
of 3A would require and inductor sized approximately
5mm x 5mm with a height of 1mm. By going to a dual-
phase architecture the 5x5mm inductor can be replaced
by two 1.8mm x 1.0mm inductors to significantly reduce
the total solution size. In addition, the second advantage
is inductor saturation current (per phase) could be low-
ered to 1.8A.
Skip Mode
In PWM operation, the DC-DC converter switches cycles
continuously. When SKIP mode is enabled, the DC-DC
converter can disable a switching cycle if the output volt-
age is sufficiently high. When this condition is detected,
the next switching cycle is skipped. The peak inductor
current value is chosen to be high enough so that suf-
ficient energy is transferred to the output in a burst of