MJE13002G - ON Semiconductor

January, 2006 − Rev. 2 1Publication Order Number:

MJE13003/D

MJE13003

SWITCHMODEt Series NPN

Silicon Power Transistor

These devices are designed for high−voltage, high−speed power

switching inductive circuits where fall time is critical. They are

particularly suited for 115 and 220 V SWITCHMODE applications

such as Switching Regulators, Inverters, Motor Controls,

Solenoid/Relay drivers and Deflection circuits.

Features

•Reverse Biased SOA with Inductive Loads @ TC = 100_C

•Inductive Switching Matrix 0.5 to 1.5 A, 25 and 100_C

tc @ 1 A, 100_C is 290 ns (Typ)

•700 V Blocking Capability

•SOA and Switching Applications Information

•Pb−Free Package is Available*

MAXIMUM RATINGS

Rating Symbol Value Unit

ÎÎÎÎÎÎÎÎÎÎÎÎ

Collector−Emitter Voltage

ÎÎÎ

VCEO(sus)

ÎÎÎÎ

400

ÎÎÎ

Vdc

ÎÎÎÎÎÎÎÎÎÎÎÎ

Collector−Emitter Voltage

ÎÎÎ

VCEV

ÎÎÎÎ

700

ÎÎÎ

Vdc

ÎÎÎÎÎÎÎÎÎÎÎÎ

Emitter Base Voltage

ÎÎÎ

VEBO

ÎÎÎÎ

9

ÎÎÎ

Vdc

ÎÎÎÎÎÎÎÎÎÎÎÎ

Î

ÎÎÎÎÎÎÎÎÎÎ

Î

ÎÎÎÎÎÎÎÎÎÎÎÎ

Collector Current − Continuous

− Peak (Note 1)

ÎÎÎ

Î

ÎÎÎ

IC

ICM

ÎÎÎÎ

Î

ÎÎ

Î

ÎÎÎÎ

1.5

3

ÎÎÎ

Î

ÎÎÎ

Adc

ÎÎÎÎÎÎÎÎÎÎÎÎ

Î

ÎÎÎÎÎÎÎÎÎÎ

Î

ÎÎÎÎÎÎÎÎÎÎÎÎ

Base Current − Continuous

− Peak (Note 1)

ÎÎÎ

Î

ÎÎÎ

IB

IBM

ÎÎÎÎ

Î

ÎÎ

Î

ÎÎÎÎ

0.75

1.5

ÎÎÎ

Î

ÎÎÎ

Adc

ÎÎÎÎÎÎÎÎÎÎÎÎ

Emitter Current − Continuous

− Peak (Note 1)

ÎÎÎ

IE

IEM

ÎÎÎÎ

2.25

4.5

ÎÎÎ

Adc

ÎÎÎÎÎÎÎÎÎÎÎÎ

Î

ÎÎÎÎÎÎÎÎÎÎ

Î

ÎÎÎÎÎÎÎÎÎÎÎÎ

Total Power Dissipation @ TA = 25_C

Derate above 25_C

ÎÎÎ

Î

ÎÎÎ

PD

ÎÎÎÎ

Î

ÎÎ

Î

ÎÎÎÎ

1.4

11.2

ÎÎÎ

Î

ÎÎÎ

W

mW/_C

ÎÎÎÎÎÎÎÎÎÎÎÎ

Total Power Dissipation @ TC = 25_C

Derate above 25_C

ÎÎÎ

PD

ÎÎÎÎ

40

320

ÎÎÎ

W

mW/_C

ÎÎÎÎÎÎÎÎÎÎÎÎ

Î

ÎÎÎÎÎÎÎÎÎÎ

Î

ÎÎÎÎÎÎÎÎÎÎÎÎ

Operating and Storage Junction

Temperature Range

ÎÎÎ

Î

ÎÎÎ

TJ, Tstg

ÎÎÎÎ

Î

ÎÎ

Î

ÎÎÎÎ

–65 to

+150

ÎÎÎ

Î

ÎÎÎ

_C

THERMAL CHARACTERISTICS

Characteristic Symbol Max Unit

ÎÎÎÎÎÎÎÎÎÎÎÎ

Thermal Resistance, Junction−to−Case

ÎÎÎ

RqJC

ÎÎÎÎ

3.12

ÎÎÎ

_C/W

ÎÎÎÎÎÎÎÎÎÎÎÎ

Thermal Res istance, Junc t ion−to−Ambient

ÎÎÎ

RqJA

ÎÎÎÎ

89

ÎÎÎ

_C/W

ÎÎÎÎÎÎÎÎÎÎÎÎ

Maximum Load Tem perature for Soldering

Purposes: 1/8 ″ from Cas e for 5 Seconds

ÎÎÎ

TL

ÎÎÎÎ

275

ÎÎÎ

_C

Maximum ratings are those values beyond which device damage can occur.

Maximum ratings applied to the device are individual stress limit values (not

normal operating conditions) and are not valid simultaneously. If these limits are

exceeded, device functional operation is not implied, damage may occur and

reliability may be affected.

1. Pulse Test: Pulse Width = 5 ms, Duty Cycle ≤ 10%.

*For additional information on our Pb−Free strategy and soldering details, please

download the ON Semiconductor Soldering and Mounting Techniques

Reference Manual, SOLDERRM/D.

Device Package Shipping

ORDERING INFORMATION

MJE13003 TO−225 500 Units/Box

1.5 AMPERES

NPN SILICON POWER

TRANSISTORS

300 AND 400 VOLTS

40 WATTS

http://onsemi.com

MJE13003G TO−225

(Pb−Free) 500 Units/Box

TO−225

CASE 77

STYLE 3

21

3

MARKING DIAGRAM

YWW

JE

13003G

Y = Year

WW = Work Week

JE13003 = Device Code

G = Pb−Free Package

1 BASE

2 COLLECTOR

3 EMITTER

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2

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

ELECTRICAL CHARACTERISTICS (TC = 25_C unless otherwise noted)

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

Characteristic

ÎÎÎÎÎ

Symbol

ÎÎÎ

Min

ÎÎÎ

Typ

ÎÎÎÎ

Max

ÎÎÎ

Unit

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

OFF CHARACTERISTICS (Note 2)

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

Collector−Emitter Sustaining Voltage (IC = 10 mA, IB = 0)

ÎÎÎÎÎ

VCEO(sus)

ÎÎÎ

400

ÎÎÎ

−

ÎÎÎÎ

−

ÎÎÎ

Vdc

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

Î

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

Î

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

Collector Cutoff Current

(VCEV = Rated Value, VBE(off) = 1.5 Vdc)

(VCEV = Rated Value, VBE(off) = 1.5 Vdc, TC = 100_C)

ÎÎÎÎÎ

Î

ÎÎÎ

Î

ÎÎÎÎÎ

ICEV

ÎÎÎ

Î

ÎÎÎ

−

ÎÎÎ

Î

ÎÎÎ

−

ÎÎÎÎ

Î

ÎÎ

Î

ÎÎÎÎ

1

5

ÎÎÎ

Î

ÎÎÎ

mAdc

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

Emitter Cutoff Current (VEB = 9 Vdc, IC = 0)

ÎÎÎÎÎ

IEBO

ÎÎÎ

−

ÎÎÎ

−

ÎÎÎÎ

1

ÎÎÎ

mAdc

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

SECOND BREAKDOWN

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

Second Breakdown Collector Current with bass forward biased

ÎÎÎÎÎ

IS/b

ÎÎÎÎÎÎÎÎ

See Figure 11

ÎÎÎ

−

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

Clamped Inductive SOA with base reverse biased

ÎÎÎÎÎ

RBSOA

ÎÎÎÎÎÎÎÎ

See Figure 12

ÎÎÎ

−

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

ON CHARACTERISTICS (Note 2)

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

Î

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

Î

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

DC Current Gain

(IC = 0.5 Adc, VCE = 2 Vdc)

(IC = 1 Adc, VCE = 2 Vdc)

ÎÎÎÎÎ

Î

ÎÎÎ

Î

ÎÎÎÎÎ

hFE

ÎÎÎ

Î

ÎÎÎ

8

5

ÎÎÎ

Î

ÎÎÎ

−

ÎÎÎÎ

Î

ÎÎ

Î

ÎÎÎÎ

40

25

ÎÎÎ

Î

ÎÎÎ

−

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

Î

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

Î

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

Î

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

Î

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

Collector−Emitter Saturation Voltage

(IC = 0.5 Adc, IB = 0.1 Adc)

(IC = 1 Adc, IB = 0.25 Adc)

(IC = 1.5 Adc, IB = 0.5 Adc)

(IC = 1 Adc, IB = 0.25 Adc, TC = 100_C)

ÎÎÎÎÎ

Î

ÎÎÎ

Î

ÎÎÎ

Î

ÎÎÎ

Î

ÎÎÎÎÎ

VCE(sat)

ÎÎÎ

Î

ÎÎÎ

−

ÎÎÎ

Î

ÎÎÎ

−

ÎÎÎÎ

Î

ÎÎ

Î

ÎÎ

Î

ÎÎ

Î

ÎÎÎÎ

0.5

1

3

1

ÎÎÎ

Î

ÎÎÎ

Vdc

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

Î

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

Î

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

Base−Emitter Saturation Voltage

(IC = 0.5 Adc, IB = 0.1 Adc)

(IC = 1 Adc, IB = 0.25 Adc)

(IC = 1 Adc, IB = 0.25 Adc, TC = 100_C)

ÎÎÎÎÎ

Î

ÎÎÎ

Î

ÎÎÎÎÎ

VBE(sat)

ÎÎÎ

Î

ÎÎÎ

−

ÎÎÎ

Î

ÎÎÎ

−

ÎÎÎÎ

Î

ÎÎ

Î

ÎÎÎÎ

1

1.2

1.1

ÎÎÎ

Î

ÎÎÎ

Vdc

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

DYNAMIC CHARACTERISTICS

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

Current−Gain − Bandwidth Product (IC = 100 mAdc, VCE = 10 Vdc, f = 1 MHz)

ÎÎÎÎÎ

fT

ÎÎÎ

4

ÎÎÎ

10

ÎÎÎÎ

−

ÎÎÎ

MHz

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

Output Capacitance (VCB = 10 Vdc, IE = 0, f = 0.1 MHz)

ÎÎÎÎÎ

Cob

ÎÎÎ

−

ÎÎÎ

21

ÎÎÎÎ

−

ÎÎÎ

pF

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

SWITCHING CHARACTERISTICS

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

Resistive Load (Table 1)

ÎÎÎÎÎÎÎÎ

Delay Time

ÎÎÎÎÎÎÎÎÎÎÎÎÎ

Î

ÎÎÎÎÎÎÎÎÎÎÎ

Î

ÎÎÎÎÎÎÎÎÎÎÎ

Î

ÎÎÎÎÎÎÎÎÎÎÎ

Î

ÎÎÎÎÎÎÎÎÎÎÎÎÎ

(VCC = 125 Vdc, IC = 1 A,

IB1 = IB2 = 0.2 A, tp = 25 ms,

Duty Cycle v 1%)

ÎÎÎÎÎ

td

ÎÎÎ

−

ÎÎÎ

0.05

ÎÎÎÎ

0.1

ÎÎÎ

ms

ÎÎÎÎÎÎÎÎ

Rise Time

ÎÎÎÎÎ

tr

ÎÎÎ

−

ÎÎÎ

0.5

ÎÎÎÎ

1

ÎÎÎ

ms

ÎÎÎÎÎÎÎÎ

Storage Time

ÎÎÎÎÎ

ts

ÎÎÎ

−

ÎÎÎ

2

ÎÎÎÎ

4

ÎÎÎ

ms

ÎÎÎÎÎÎÎÎ

Fall Time

ÎÎÎÎÎ

tf

ÎÎÎ

−

ÎÎÎ

0.4

ÎÎÎÎ

0.7

ÎÎÎ

ms

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

Inductive Load, Clamped (Table 1, Figure 13)

ÎÎÎÎÎÎÎÎ

Storage Time

ÎÎÎÎÎÎÎÎÎÎÎÎÎ

Î

ÎÎÎÎÎÎÎÎÎÎÎ

Î

ÎÎÎÎÎÎÎÎÎÎÎ

Î

ÎÎÎÎÎÎÎÎÎÎÎÎÎ

(IC = 1 A, Vclamp = 300 Vdc,

IB1 = 0.2 A, VBE(off) = 5 Vdc, TC = 100_C)

ÎÎÎÎÎ

tsv

ÎÎÎ

−

ÎÎÎ

1.7

ÎÎÎÎ

4

ÎÎÎ

ms

ÎÎÎÎÎÎÎÎ

Crossover Time

ÎÎÎÎÎ

tc

ÎÎÎ

−

ÎÎÎ

0.29

ÎÎÎÎ

0.75

ÎÎÎ

ms

ÎÎÎÎÎÎÎÎ

Fall Time

ÎÎÎÎÎ

tfi

ÎÎÎ

−

ÎÎÎ

0.15

ÎÎÎÎ

−

ÎÎÎ

ms

2. Pulse Test: PW = 300 ms, Duty Cycle v 2%.

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C, CAPACITANCE (pF) VCE, COLLECTOR−EMITTER VOLTAGE (VOLTS

)

0.02

IC, COLLECTOR CURRENT (AMP)

0.35

0.3

0.2

1.4

IC, COLLECTOR CURRENT (AMP)

1.2

1

0.8

0.6

0.02

Figure 1. DC Current Gain

IC, COLLECTOR CURRENT (AMP)

40.05 0.1 0.7 2

10

Figure 2. Collector Saturation Region

0.01

IB, BASE CURRENT (AMP)

0.02 0.05

1.2

0.4

0

80

hFE, DC CURRENT GAIN

VCE = 2 V

VCE = 5 V

0.1 0.2 0.5 1

Figure 3. Base−Emitter Voltage Figure 4. Collector−Emitter Saturation Region

Figure 5. Collector Cutoff Region

2

0.8

104

VBE, BASE−EMITTER VOLTAGE (VOLTS)

10−1

0

TJ = 25°C

TJ = 150°C

20

0.07 0.3

−0.4

Figure 6. Capacitance

500

VR, REVERSE VOLTAGE (VOLTS)

Cib

0.1

, COLLECTOR CURRENT (A)μIC

0.05

103

102

101

100

−0.2 +0.2 +0.4 +0.6

REVERSE FORWARD

VCE = 250 V

70

10

2 20 500 1000

1.6

0.0050.002

0.4 0

0.1

25°C

−55 °C

0.3 A

IC = 0.1 A

TJ = −55°C

6

0.03 0.2 0.5 1 2

0.03 0.1 0.70.07 20.02 0.05 0.30.2 0.5 1

0.15

0.25

60

40

30

8

1 A

VBE(sat) @ IC/IB = 3

VBE(on) @ VCE = 2 V

300

200

100

50

5

7

20

30

2001005010510.50.2

150°C

0.03 0.1 0.70.07 20.05 0.30.2 0.5 1

V, VOLTAGE (VOLTS)

IC/IB = 3

0.5 A 1.5 A

25°C

Cob

TJ = −55°C

25°C

150°C

TJ = 150°C

125°C

100°C

75°C

50°C

25°C

TJ = 25°C

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REVERSE BIAS SAFE OPERATING AREA AND INDUCTIVE SWITCHING RESISTIVE

SWITCHING

OUTPUT WAVEFORMS

TEST CIRCUITS

CIRCUIT

VALUES

TEST WAVEFORMS

NOTE

PW and VCC Adjusted for Desired IC

RB Adjusted for Desired IB1

5 V

PW

DUTY CYCLE ≤ 10%

tr, tf ≤ 10 ns 68

1 k

0.001 mF

0.02 mF

1N4933

270

+5 V

1

k2N2905

47

1/2 W 100

−VBE(off)

MJE200

T.U.T.

IB

RB

1N4933

1N4933 33

33

2N222

2

1

k

MJE210

VCC

+5 V

L

IC

MR826*

Vclamp

*SELECTED FOR ≥ 1 kV

VCE

5.1 k

51

+125 V

RC

SCOPE

−4.0

V

D1

RB

TUT

Coil Data:

Ferroxcube Core #6656

Full Bobbin (~200 Turns) #20

GAP for 30 mH/2 A

Lcoil = 50 mH VCC = 20 V

Vclamp = 300 Vdc

VCC = 125 V

RC = 125 W

D1 = 1N5820 or Equiv.

RB = 47 W

IC

VCE

IC(pk)

t

t2

tf CLAMPED t1 Adjusted to

Obtain IC

t1 ≈

Lcoil (ICpk)

VCC

t2 ≈

Lcoil (ICpk)

Vclamp

Test Equipment

Scope−Tektronics

475 or Equivalent

+10.3 V 25 ms

0

−8.5 V

tr, tf < 10 ns

Duty Cycle = 1.0%

RB and RC adjusted

for desired IB and IC

t

VCEor

Vclamp

TIME

t1tf

Table 1. Test Conditions for Dynamic Performance

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5

trv

TIME

IC

VCE

90% IB1

tsv

ICPK Vclamp

90% Vclamp 90% IC

10% Vclamp 10%

ICPK 2% IC

IB

tfi tti

tc

Figure 7. Inductive Switching Measurements

Table 2. Typical Inductive Switching Performance

ÎÎÎ

Î

ÎÎÎ

IC

AMP

ÎÎÎ

Î

ÎÎÎ

TC

_C

ÎÎÎÎ

Î

ÎÎ

Î

ÎÎÎÎ

tsv

ms

ÎÎÎ

Î

ÎÎÎ

trv

ms

ÎÎÎ

Î

ÎÎÎ

tfi

ms

ÎÎÎ

Î

ÎÎÎ

tti

ms

ÎÎÎ

Î

ÎÎÎ

tc

ms

ÎÎÎ

0.5

ÎÎÎ

25

100

ÎÎÎÎ

1.3

1.6

ÎÎÎ

0.23

0.26

ÎÎÎ

0.30

ÎÎÎ

0.35

0.40

ÎÎÎ

0.30

0.36

ÎÎÎ

Î

ÎÎÎ

1

ÎÎÎ

Î

ÎÎÎ

25

100

ÎÎÎÎ

Î

ÎÎ

Î

ÎÎÎÎ

1.5

1.7

ÎÎÎ

Î

ÎÎÎ

0.10

0.13

ÎÎÎ

Î

ÎÎÎ

0.14

0.26

ÎÎÎ

Î

ÎÎÎ

0.05

0.06

ÎÎÎ

Î

ÎÎÎ

0.16

0.29

ÎÎÎ

Î

ÎÎÎ

1.5

ÎÎÎ

Î

ÎÎÎ

25

100

ÎÎÎÎ

Î

ÎÎ

Î

ÎÎÎÎ

1.8

3

ÎÎÎ

Î

ÎÎÎ

0.07

0.08

ÎÎÎ

Î

ÎÎÎ

0.10

0.22

ÎÎÎ

Î

ÎÎÎ

0.05

0.08

ÎÎÎ

Î

ÎÎÎ

0.16

0.28

NOTE: All Data Recorded in the Inductive Switching Circuit in Table 1

SWITCHING TIMES NOTE

In resistive switching circuits, rise, fall, and storage times

have been defined and apply to both current and voltage

waveforms since they are in phase. However , for inductive

loads which are common to SWITCHMODE power

supplies and hammer drivers, current and voltage

waveforms are not in phase. Therefore, separate

measurements must be made on each waveform to

determine the total switching time. For this reason, the

following new terms have been defined.

tsv = Voltage Storage Time, 90% IB1 to 10% Vclamp

trv = Voltage Rise Time, 10−90% Vclamp

tfi = Current Fall Time, 90−10% IC

tti = Current Tail, 10−2% IC

tc = Crossover Time, 10% Vclamp to 10% IC

An enlarged portion of the inductive switching

waveforms is shown in Figure 7 to aid in the visual identity

of these terms.

For the designer, there is minimal switching loss during

storage time and the predominant switching power losses

occur during the crossover interval and can be obtained

using the standard equation from AN−222:

PSWT = 1/2 VCCIC(tc)f

In general, trv + tfi ] tc. However, at lower test currents

this relationship may not be valid.

As is common with most switching transistors, resistive

switching is specified at 25_C and has become a benchmark

for designers. However, for designers of high frequency

converter circuits, the user oriented specifications which

make this a “SWITCHMODE” transistor are the inductive

switching speeds (tc and tsv) which are guaranteed at 100_C.

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t, TIME (s)μ

t, TIME OR PULSE WIDTH (ms)

1

0.01

0.02

0.7

0.2

0.1

0.05

0.02

r(t), EFFECTIVE TRANSIENT THERMAL

0.05 1 2 5 10 20 50 100 200 500

ZqJC(t) = r(t) RqJC

RqJC = 3.12°C/W MAX

D CURVES APPLY FOR POWER

PULSE TRAIN SHOWN

READ TIME AT t1

TJ(pk) − TC = P(pk) RqJC(t)

P(pk)

t1

t2

DUTY CYCLE, D = t1/t2

D = 0.5

0.2

0.05

0.02

0.01

SINGLE PULSE

0.1

0.1 0.50.2

RESISTANCE (NORMALIZED)

1000

0.5

0.3

0.07

0.03

0.03 0.3 3

IC, COLLECTOR CURRENT (AMP)

0.02 0.2 10.1

tr

0.5 20.05 0.7

td @ VBE(off) = 5 V

Figure 8. Turn−On Time Figure 9. Turn−Off Time

0.1

0.7

0.5

0.3

0.2

10

5

3

2

1

Figure 10. Thermal Response

0.03

0.02

2

1

0.5

0.3

0.7

0.2

IC, COLLECTOR CURRENT (AMP)

0.1 0.5 200.3 0.70.02 0.2 10

VCC = 125 V

IC/IB = 5

TJ = 25°C

0.07

0.05

0.07

0.1

7 VCC = 125 V

IC/IB = 5

TJ = 25°C

0.03 0.07 0.30.050.03

0.01

ts

tf

RESISTIVE SWITCHING PERFORMANCE

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The Safe Operating Area figures shown in Figures 1 1 and 12 are

specified ratings for these devices under the test conditions

shown.

IC, COLLECTOR CURRENT (AMP) IC, COLLECTOR CURRENT (AMP)

1.6

0

800

0.4

100 300

TJ ≤ 100°C

IB1 = 1 A

500 700

VBE(off) = 9 V

0

0.8

VCEV, COLLECTOR−EMITTER CLAMP VOLTAGE (VOLTS)

1.2

100 ms10 ms

1.0 ms

dc

5

VCE, COLLECTOR−EMITTER VOLTAGE (VOLTS)

0.01

10 500

1

0.5

2

0.2

0.0

5

0.02

20 50 100 200

Figure 11. Active Region Safe Operating

Area

TC = 25°C

Figure 12. Reverse Bias Safe Operating Area

0.1

300

200 400 600

5 V

1.5 V

5.0ms

10

MJE13003

3 V

THERMAL LIMIT (SINGLE PULSE)

BONDING WIRE LIMIT

SECOND BREAKDOWN LIMIT

CURVES APPLY BELOW RATED VCEO

SAFE OPERATING AREA INFORMATION

FORWARD BIAS

There are two limitations on the power handling ability of

a transistor: average junction temperature and second

breakdown. Safe operating area curves indicate IC − V CE

limits of the transistor that must be observed for reliable

operation; i.e., the transistor must not be subjected to greater

dissipation than the curves indicate.

The data of Figure 11 is based on TC = 25_C; T J(pk) is

variable depending on power level. Second breakdown

pulse limits are valid for duty cycles to 10% but must be

derated when TC ≥ 25_C. Second breakdown limitations do

not derate the same as thermal limitations. Allowable

current at the voltages shown on Figure 11 may be found at

any case temperature by using the appropriate curve on

Figure 13.

TJ(pk) may be calculated from the data in Figure 10. At

high case temperatures, thermal limitations will reduce the

power that can be handled to values less than the limitations

imposed by second breakdown.

REVERSE BIAS

For inductive loads, high voltage and high current must be

sustained simultaneously during turn−off, in most cases,

with the base to emitter junction reverse biased. Under these

conditions the collector voltage must be held to a safe level

at or below a specific value of collector current. This can be

accomplished by several means such as active clamping, RC

snubbing, load line shaping, etc. The safe level for these

devices is specified as Reverse Bias Safe Operating Area

and represents the voltage−current conditions during

reverse biased turn−off. This rating is verified under

clamped conditions so that the device is never subjected to

an avalanche mode. Figure 12 gives RBSOA characteristics.

TC, CASE TEMPERATURE (°C)

040 120 160

0.6

POWER DERATING FACTOR

SECOND BREAKDOWN

DERATING

1

0.8

0.4

0.2

60 100 14080

THERMAL

DERATING

20

Figure 13. Forward Bias Power Derating

MJE13003

http://onsemi.com

8

PACKAGE DIMENSIONS

TO−225

CASE 77−09

ISSUE Z

NOTES:

1. DIMENSIONING AND TOLERANCING PER ANSI

Y14.5M, 1982.

2. CONTROLLING DIMENSION: INCH.

3. 077−01 THRU −08 OBSOLETE, NEW STANDARD

077−09.

−B−

−A− M

K

FC

Q

H

V

G

S

D

JR

U

132

2 PL

M

A

M

0.25 (0.010) B M

M

A

M

0.25 (0.010) B M

DIM MIN MAX MIN MAX

MILLIMETERSINCHES

A0.425 0.435 10.80 11.04

B0.295 0.305 7.50 7.74

C0.095 0.105 2.42 2.66

D0.020 0.026 0.51 0.66

F0.115 0.130 2.93 3.30

G0.094 BSC 2.39 BSC

H0.050 0.095 1.27 2.41

J0.015 0.025 0.39 0.63

K0.575 0.655 14.61 16.63

M5 TYP 5 TYP

Q0.148 0.158 3.76 4.01

R0.045 0.065 1.15 1.65

S0.025 0.035 0.64 0.88

U0.145 0.155 3.69 3.93

V0.040 −−− 1.02 −−−

__

STYLE 3:

PIN 1. BASE

2. COLLECTOR

3. EMITTER

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