1. Product profile
1.1 General description
NPN/PNP double low VCEsat Breakthrough In Small Signal (BISS) transistor in a medium
power Surface-Mounted Device (SMD) plastic package.
1.2 Features
nLow collector-emitter saturation voltage VCEsat
nHigh collector current capability IC and ICM
nHigh collector current gain (hFE) at high IC
nHigh efficiency due to less heat generation
nSmaller required Printed-Circuit Board (PCB) area than for conventional transistors
1.3 Applications
nComplementary MOSFET driver
nHalf and full bridge motor drivers
nDual low power switches (e.g. motors, fans)
nAutomotive
1.4 Quick reference data
PBSS4350SPN
50 V, 2.7 A NPN/PNP low VCEsat (BISS) transistor
Rev. 01 — 5 April 2007 Product data sheet
Table 1. Product overview
Type number Package NPN/NPN
complement PNP/PNP
complement
NXP Name
PBSS4350SPN SOT96-1 SO8 PBSS4350SS PBSS5350SS
Table 2. Quick reference data
Symbol Parameter Conditions Min Typ Max Unit
TR1; NPN low VCEsat transistor
VCEO collector-emitter voltage open base - - 50 V
ICcollector current - - 2.7 A
ICM peak collector current single pulse;
tp≤1ms --5 A
RCEsat collector-emitter
saturation resistance IC=2A;
IB= 200 mA [1] - 90 130 mΩ
PBSS4350SPN_1 © NXP B.V. 2007. All rights reserved.
Product data sheet Rev. 01 — 5 April 2007 2 of 19
NXP Semiconductors PBSS4350SPN
50 V, 2.7 A NPN/PNP low VCEsat (BISS) transistor
[1] Pulse test: tp≤300 µs; δ≤0.02.
2. Pinning information
3. Ordering information
4. Marking
TR2; PNP low VCEsat transistor
VCEO collector-emitter voltage open base - - −50 V
ICcollector current - - −2.7 A
ICM peak collector current single pulse;
tp≤1ms --−5A
RCEsat collector-emitter
saturation resistance IC=−2A;
IB=−200 mA [1] - 95 140 mΩ
Table 2. Quick reference data
…continued
Symbol Parameter Conditions Min Typ Max Unit
Table 3. Pinning
Pin Description Simplified outline Symbol
1 emitter TR1
2 base TR1
3 emitter TR2
4 base TR2
5 collector TR2
6 collector TR2
7 collector TR1
8 collector TR1
4
5
1
8
006aaa985
8765
1234
TR1 TR2
Table 4. Ordering information
Type number Package
Name Description Version
PBSS4350SPN SO8 plastic small outline package; 8 leads; body width
3.9 mm SOT96-1
Table 5. Marking codes
Type number Marking code
PBSS4350SPN 4350SPN
PBSS4350SPN_1 © NXP B.V. 2007. All rights reserved.
Product data sheet Rev. 01 — 5 April 2007 3 of 19
NXP Semiconductors PBSS4350SPN
50 V, 2.7 A NPN/PNP low VCEsat (BISS) transistor
5. Limiting values
[1] Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint.
[2] Device mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for collector 1 cm2.
[3] Device mounted on a ceramic PCB, Al2O3, standard footprint.
Table 6. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter Conditions Min Max Unit
Per transistor; for the PNP transistor with negative polarity
VCBO collector-base voltage open emitter - 50 V
VCEO collector-emitter voltage open base - 50 V
VEBO emitter-base voltage open collector - 5 V
ICcollector current - 2.7 A
ICM peak collector current single pulse;
tp≤1ms -5A
IBbase current - 0.5 A
Ptot total power dissipation Tamb ≤25 °C[1] - 0.55 W
[2] - 0.87 W
[3] - 1.43 W
Per device
Ptot total power dissipation Tamb ≤25 °C[1] - 0.75 W
[2] - 1.2 W
[3] -2W
Tjjunction temperature - 150 °C
Tamb ambient temperature −65 +150 °C
Tstg storage temperature −65 +150 °C
PBSS4350SPN_1 © NXP B.V. 2007. All rights reserved.
Product data sheet Rev. 01 — 5 April 2007 4 of 19
NXP Semiconductors PBSS4350SPN
50 V, 2.7 A NPN/PNP low VCEsat (BISS) transistor
(1) Ceramic PCB, Al2O3, standard footprint
(2) FR4 PCB, mounting pad for collector 1 cm2
(3) FR4 PCB, standard footprint
Fig 1. Per device: Power derating curves
Tamb (°C)
−75 17512525 75−25
006aaa967
1.0
1.5
0.5
2.0
2.5
Ptot
(W)
0
(1)
(2)
(3)
PBSS4350SPN_1 © NXP B.V. 2007. All rights reserved.
Product data sheet Rev. 01 — 5 April 2007 5 of 19
NXP Semiconductors PBSS4350SPN
50 V, 2.7 A NPN/PNP low VCEsat (BISS) transistor
6. Thermal characteristics
[1] Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint.
[2] Device mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for collector 1 cm2.
[3] Device mounted on a ceramic PCB, Al2O3, standard footprint.
Table 7. Thermal characteristics
Symbol Parameter Conditions Min Typ Max Unit
Per transistor
Rth(j-a) thermal resistance from
junction to ambient in free air [1] - - 227 K/W
[2] - - 144 K/W
[3] --87K/W
Rth(j-sp) thermal resistance from
junction to solder point --40K/W
Per device
Rth(j-a) thermal resistance from
junction to ambient in free air [1] - - 167 K/W
[2] - - 104 K/W
[3] --63K/W
FR4 PCB, standard footprint
Fig 2. Per transistor: Transient thermal impedance from junction to ambient as a function of pulse duration;
typical values
006aaa809
10
1
102
103
Zth(j-a)
(K/W)
10−1
10−51010−2
10−4102
10−1tp (s)
10−3103
1
0.01
0
0.02
0.05
0.1
0.2
0.33
0.5
0.75
1.0
duty cycle =
PBSS4350SPN_1 © NXP B.V. 2007. All rights reserved.
Product data sheet Rev. 01 — 5 April 2007 6 of 19
NXP Semiconductors PBSS4350SPN
50 V, 2.7 A NPN/PNP low VCEsat (BISS) transistor
FR4 PCB, mounting pad for collector 1 cm2
Fig 3. Per transistor: Transient thermal impedance from junction to ambient as a function of pulse duration;
typical values
Ceramic PCB, Al2O3, standard footprint
Fig 4. Per transistor: Transient thermal impedance from junction to ambient as a function of pulse duration;
typical values
006aaa810
10
1
102
103
Zth(j-a)
(K/W)
10−1
10−51010−2
10−4102
10−1tp (s)
10−3103
1
duty cycle =
0.01
0
0.02
0.05
0.1
0.2
0.33
0.5
0.75
1.0
006aaa811
tp (s)
10−4102103
10110−310−1
10−2
102
10
103
Zth(j-a)
(K/W)
1
0.02
0.05
0.1
0.2
0.33
0.5
0.75
1.0
0
0.01
duty cycle =
PBSS4350SPN_1 © NXP B.V. 2007. All rights reserved.
Product data sheet Rev. 01 — 5 April 2007 7 of 19
NXP Semiconductors PBSS4350SPN
50 V, 2.7 A NPN/PNP low VCEsat (BISS) transistor
7. Characteristics
Table 8. Characteristics
T
amb
=25
°
C unless otherwise specified.
Symbol Parameter Conditions Min Typ Max Unit
TR1; NPN low VCEsat transistor
ICBO collector-basecut-off
current VCB =50V; I
E= 0 A - - 100 nA
VCB =50V; I
E=0A;
Tj= 150 °C--50µA
ICES collector-emitter
cut-off current VCE =50V; V
BE = 0 V - - 100 nA
IEBO emitter-base cut-off
current VEB =5V; I
C= 0 A - - 100 nA
hFE DC current gain VCE =2V; I
C= 100 mA 300 520 -
VCE =2V; I
C= 500 mA [1] 300 500 -
VCE =2V; I
C=1A [1] 300 470 -
VCE =2V; I
C=2A [1] 200 340 -
VCE =2V; I
C= 2.7 A [1] 120 180 -
VCEsat collector-emitter
saturation voltage [1]
IC= 0.5 A; IB= 50 mA - 50 80 mV
IC= 1 A; IB= 50 mA - 100 160 mV
IC= 2 A; IB= 100 mA - 190 280 mV
IC= 2 A; IB= 200 mA - 180 260 mV
IC= 2.7 A; IB= 270 mA - 240 340 mV
RCEsat collector-emitter
saturation resistance IC= 2 A; IB= 200 mA [1] - 90 130 mΩ
VBEsat base-emitter
saturation voltage [1]
IC= 2 A; IB= 100 mA - 0.95 1.1 V
IC= 2.7 A; IB= 270 mA - 1.1 1.2 V
VBEon base-emitter turn-on
voltage VCE =2V; I
C=1A [1] - 0.8 1.2 V
tddelay time VCC =10V; I
C=2A;
IBon = 100 mA;
IBoff =−100 mA
-8-ns
trrise time - 96 - ns
ton turn-on time - 104 - ns
tsstorage time - 355 - ns
tffall time - 165 - ns
toff turn-off time - 520 - ns
Cccollector capacitance VCB =10V; I
E=i
e=0A;
f=1MHz - 1825pF
PBSS4350SPN_1 © NXP B.V. 2007. All rights reserved.
Product data sheet Rev. 01 — 5 April 2007 8 of 19
NXP Semiconductors PBSS4350SPN
50 V, 2.7 A NPN/PNP low VCEsat (BISS) transistor
[1] Pulse test: tp≤300 µs; δ≤0.02.
TR2; PNP low VCEsat transistor
ICBO collector-basecut-off
current VCB =−50 V; IE=0A - - −100 nA
VCB =−50 V; IE=0A;
Tj= 150 °C--−50 µA
ICES collector-emitter
cut-off current VCE =−50 V; VBE =0V - - −100 nA
IEBO emitter-base cut-off
current VEB =−5 V; IC=0A - - −100 nA
hFE DC current gain VCE =−2 V; IC=−100 mA 200 340 -
VCE =−2 V; IC=−500 mA [1] 200 290 -
VCE =−2 V; IC=−1A [1] 180 250 -
VCE =−2 V; IC=−2A [1] 130 180 -
VCE =−2 V; IC=−2.7 A [1] 95 135 -
VCEsat collector-emitter
saturation voltage [1]
IC=−0.5 A; IB=−50 mA - −60 −90 mV
IC=−1 A; IB=−50 mA - −125 −180 mV
IC=−2 A; IB=−100 mA - −225 −320 mV
IC=−2 A; IB=−200 mA - −190 −280 mV
IC=−2.7 A; IB=−270 mA - −255 −370 mV
RCEsat collector-emitter
saturation resistance IC=−2 A; IB=−200 mA [1] - 95 140 mΩ
VBEsat base-emitter
saturation voltage [1]
IC=−2 A; IB=−100 mA - −0.95 −1.1 V
IC=−2.7 A; IB=−270 mA - −1−1.2 V
VBEon base-emitter turn-on
voltage VCE =−2 V; IC=−1A [1] -−0.8 −1.2 V
tddelay time VCC =−10 V; IC=−2A;
IBon =−100 mA;
IBoff = 100 mA
-9-ns
trrise time - 54 - ns
ton turn-on time - 63 - ns
tsstorage time - 190 - ns
tffall time - 50 - ns
toff turn-off time - 240 - ns
Cccollector capacitance VCB =−10 V; IE=i
e=0A;
f=1MHz - 2535pF
Table 8. Characteristics
…continued
T
amb
=25
°
C unless otherwise specified.
Symbol Parameter Conditions Min Typ Max Unit
PBSS4350SPN_1 © NXP B.V. 2007. All rights reserved.
Product data sheet Rev. 01 — 5 April 2007 9 of 19
NXP Semiconductors PBSS4350SPN
50 V, 2.7 A NPN/PNP low VCEsat (BISS) transistor
VCE =2V
(1) Tamb = 100 °C
(2) Tamb =25°C
(3) Tamb =−55 °C
Tamb =25°C
Fig 5. TR1 (NPN): DC current gain as a function of
collector current; typical values Fig 6. TR1 (NPN): Collector current as a function of
collector-emitter voltage; typical values
VCE =2V
(1) Tamb =−55 °C
(2) Tamb =25°C
(3) Tamb = 100 °C
IC/IB=20
(1) Tamb =−55 °C
(2) Tamb =25°C
(3) Tamb = 100 °C
Fig 7. TR1 (NPN): Base-emitter voltage as a function
of collector current; typical values Fig 8. TR1 (NPN): Base-emitter saturation voltage as a
function of collector current; typical values
006aaa968
400
600
200
800
1000
hFE
0
IC (mA)
10−1104
103
110
2
10
(1)
(2)
(3)
VCE (V)
0 2.01.60.8 1.20.4
006aaa969
2
3
1
4
5
IC
(A)
0
IB (mA) = 100 90
10
80 70
60 50
40
30
20
006aaa970
0.4
0.8
1.2
VBE
(V)
0
IC (mA)
10−1104
103
110
2
10
(1)
(2)
(3)
006aaa971
0.6
1.0
1.4
VBEsat
(V)
0.2
IC (mA)
10−1104
103
110
2
10
(1)
(2)
(3)
PBSS4350SPN_1 © NXP B.V. 2007. All rights reserved.
Product data sheet Rev. 01 — 5 April 2007 10 of 19
NXP Semiconductors PBSS4350SPN
50 V, 2.7 A NPN/PNP low VCEsat (BISS) transistor
IC/IB=20
(1) Tamb = 100 °C
(2) Tamb =25°C
(3) Tamb =−55 °C
Tamb =25°C
(1) IC/IB= 100
(2) IC/IB=50
(3) IC/IB=10
Fig 9. TR1 (NPN): Collector-emitter saturation voltage
as a function of collector current; typical values Fig 10. TR1 (NPN): Collector-emitter saturation voltage
as a function of collector current; typical values
IC/IB=20
(1) Tamb = 100 °C
(2) Tamb =25°C
(3) Tamb =−55 °C
Tamb =25°C
(1) IC/IB= 100
(2) IC/IB=50
(3) IC/IB=10
Fig 11. TR1 (NPN): Collector-emitter saturation
resistance as a function of collector current;
typical values
Fig 12. TR1 (NPN): Collector-emitter saturation
resistance as a function of collector current;
typical values
006aaa972
10−1
10−2
1
VCEsat
(V)
10−3
IC (mA)
10−1104
103
110
2
10
(1)
(2)
(3)
006aaa973
10−1
10−2
1
VCEsat
(V)
10−3
IC (mA)
10−1104
103
110
2
10
(1)
(2)
(3)
IC (mA)
10−1104
103
110
2
10
006aaa974
1
10−1
102
10
103
RCEsat
(Ω)
10−2
(1)
(2)
(3)
IC (mA)
10−1104
103
110
2
10
006aaa975
1
10−1
102
10
103
RCEsat
(Ω)
10−2
(1)
(2)
(3)
PBSS4350SPN_1 © NXP B.V. 2007. All rights reserved.
Product data sheet Rev. 01 — 5 April 2007 11 of 19
NXP Semiconductors PBSS4350SPN
50 V, 2.7 A NPN/PNP low VCEsat (BISS) transistor
VCE =−2V
(1) Tamb = 100 °C
(2) Tamb =25°C
(3) Tamb =−55 °C
Tamb =25°C
Fig 13. TR2 (PNP): DC current gain as a function of
collector current; typical values Fig 14. TR2 (PNP): Collector current as a function of
collector-emitter voltage; typical values
VCE =−2V
(1) Tamb =−55 °C
(2) Tamb =25°C
(3) Tamb = 100 °C
IC/IB=20
(1) Tamb =−55 °C
(2) Tamb =25°C
(3) Tamb = 100 °C
Fig 15. TR2 (PNP): Base-emitter voltage as a function
of collector current; typical values Fig 16. TR2 (PNP): Base-emitter saturation voltage as a
function of collector current; typical values
006aaa977
200
400
600
hFE
0
IC (mA)
−10−1−104
−103
−1−102
−10
(1)
(2)
(3)
VCE (V)
0−2.0−1.6−0.8 −1.2−0.4
006aaa978
−2
−3
−1
−4
−5
IC
(A)
0
IB (mA) = −140
−126
−112
−98
−84
−70
−56
−14
−28
−42
006aaa979
−0.4
−0.8
−1.2
VBE
(V)
0
IC (mA)
−10−1−104
−103
−1−102
−10
(1)
(2)
(3)
006aaa980
−0.6
−1.0
−1.4
VBEsat
(V)
−0.2
IC (mA)
−10−1−104
−103
−1−102
−10
(1)
(2)
(3)
PBSS4350SPN_1 © NXP B.V. 2007. All rights reserved.
Product data sheet Rev. 01 — 5 April 2007 12 of 19
NXP Semiconductors PBSS4350SPN
50 V, 2.7 A NPN/PNP low VCEsat (BISS) transistor
IC/IB=20
(1) Tamb = 100 °C
(2) Tamb =25°C
(3) Tamb =−55 °C
Tamb =25°C
(1) IC/IB= 100
(2) IC/IB=50
(3) IC/IB=10
Fig 17. TR2 (PNP): Collector-emitter saturation voltage
as a function of collector current; typical values Fig 18. TR2 (PNP): Collector-emitter saturation voltage
as a function of collector current; typical values
IC/IB=20
(1) Tamb = 100 °C
(2) Tamb =25°C
(3) Tamb =−55 °C
Tamb =25°C
(1) IC/IB= 100
(2) IC/IB=50
(3) IC/IB=10
Fig 19. TR2 (PNP): Collector-emitter saturation
resistance as a function of collector current;
typical values
Fig 20. TR2 (PNP): Collector-emitter saturation
resistance as a function of collector current;
typical values
006aaa981
−10−1
−10−2
−1
VCEsat
(V)
−10−3
IC (mA)
−10−1−104
−103
−1−102
−10
(1)
(2)
(3)
006aaa982
−10−1
−10−2
−1
VCEsat
(V)
−10−3
IC (mA)
−10−1−104
−103
−1−102
−10
(1)
(2)
(3)
IC (mA)
−10−1−104
−103
−1−102
−10
006aaa983
1
10−1
102
10
103
RCEsat
(Ω)
10−2
(1)
(2)
(3)
IC (mA)
−10−1−104
−103
−1−102
−10
006aaa984
1
10−1
102
10
103
RCEsat
(Ω)
10−2
(1)
(2)
(3)
PBSS4350SPN_1 © NXP B.V. 2007. All rights reserved.
Product data sheet Rev. 01 — 5 April 2007 13 of 19
NXP Semiconductors PBSS4350SPN
50 V, 2.7 A NPN/PNP low VCEsat (BISS) transistor
8. Test information
Fig 21. TR1 (NPN): BISS transistor switching time definition
VCC =10V; I
C= 2 A; IBon = 100 mA; IBoff =−100 mA
Fig 22. TR1 (NPN): Test circuit for switching times
006aaa003
IBon (100 %)
IB
input pulse
(idealized waveform)
IBoff
90 %
10 %
IC (100 %)
IC
tdton
90 %
10 %
tr
output pulse
(idealized waveform)
tf
t
ts
toff
RC
R2
R1
DUT
mlb826
Vo
RB(probe)
450 Ω
(probe)
450 Ω
oscilloscope oscilloscope
VBB
VI
VCC
PBSS4350SPN_1 © NXP B.V. 2007. All rights reserved.
Product data sheet Rev. 01 — 5 April 2007 14 of 19
NXP Semiconductors PBSS4350SPN
50 V, 2.7 A NPN/PNP low VCEsat (BISS) transistor
Fig 23. TR2 (PNP): BISS transistor switching time definition
VCC =−10 V; IC=−2 A; IBon =−100 mA; IBoff = 100 mA
Fig 24. TR2 (PNP): Test circuit for switching times
006aaa266
−IBon (100 %)
−IB
input pulse
(idealized waveform)
−IBoff
90 %
10 %
−IC (100 %)
−IC
tdton
90 %
10 %
tr
output pulse
(idealized waveform)
tf
t
ts
toff
RC
R2
R1
DUT
mgd624
Vo
RB(probe)
450 Ω
(probe)
450 Ω
oscilloscope oscilloscope
VBB
VI
VCC
PBSS4350SPN_1 © NXP B.V. 2007. All rights reserved.
Product data sheet Rev. 01 — 5 April 2007 15 of 19
NXP Semiconductors PBSS4350SPN
50 V, 2.7 A NPN/PNP low VCEsat (BISS) transistor
9. Package outline
10. Packing information
[1] For further information and the availability of packing methods, see Section 14.
Fig 25. Package outline SOT96-1 (SO8)
03-02-18Dimensions in mm
1.0
0.4
1.75
pin 1 index
0.49
0.36 0.25
0.19
5.0
4.8
4.0
3.8
6.2
5.8
1.27
Table 9. Packing methods
The indicated -xxx are the last three digits of the 12NC ordering code.
[1]
Type number Package Description Packing quantity
1000 2500
PBSS4350SPN SOT96-1 8 mm pitch, 12 mm tape and reel -115 -118
PBSS4350SPN_1 © NXP B.V. 2007. All rights reserved.
Product data sheet Rev. 01 — 5 April 2007 16 of 19
NXP Semiconductors PBSS4350SPN
50 V, 2.7 A NPN/PNP low VCEsat (BISS) transistor
11. Soldering
Fig 26. Reflow soldering footprint SOT96-1 (SO8)
Fig 27. Wave soldering footprint SOT96-1 (SO8)
sot096-1_fr
occupied area
solder lands Dimensions in mm
placement accuracy ± 0.25
1.30
0.60 (8×)
1.27 (6×)
4.00 6.60
5.50
7.00
sot096-1_fw
solder resist
occupied area
solder lands Dimensions in mm
board direction
placement accurracy ± 0.25
4.00
5.50
1.30
0.3 (2×)
0.60 (6×)
1.20 (2×)
1.27 (6×)
7.00
6.60
enlarged solder land
PBSS4350SPN_1 © NXP B.V. 2007. All rights reserved.
Product data sheet Rev. 01 — 5 April 2007 17 of 19
NXP Semiconductors PBSS4350SPN
50 V, 2.7 A NPN/PNP low VCEsat (BISS) transistor
12. Revision history
Table 10. Revision history
Document ID Release date Data sheet status Change notice Supersedes
PBSS4350SPN_1 20070405 Product data sheet - -
PBSS4350SPN_1 © NXP B.V. 2007. All rights reserved.
Product data sheet Rev. 01 — 5 April 2007 18 of 19
NXP Semiconductors PBSS4350SPN
50 V, 2.7 A NPN/PNP low VCEsat (BISS) transistor
13. Legal information
13.1 Data sheet status
[1] Please consult the most recently issued document before initiating or completing a design.
[2] The term ‘short data sheet’ is explained in section “Definitions”.
[3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
13.2 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
13.3 Disclaimers
General — Information in this document is believed to be accurate and
reliable. However, NXP Semiconductors does not give any representations or
warranties, expressed or implied, as to the accuracy or completeness of such
information and shall have no liability for the consequences of use of such
information.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
Suitability for use — NXP Semiconductors products are not designed,
authorized or warranted to be suitable for use in medical, military, aircraft,
space or life support equipment, nor in applications where failure or
malfunction of a NXP Semiconductors product can reasonably be expected to
result in personal injury, death or severe property or environmental damage.
NXP Semiconductors accepts no liability for inclusion and/or use of NXP
Semiconductors products in such equipment or applications and therefore
such inclusion and/or use is at the customer’s own risk.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) may cause permanent
damage to the device. Limiting values are stress ratings only and operation of
the device at these or any other conditions above those given in the
Characteristics sections of this document is not implied. Exposure to limiting
values for extended periods may affect device reliability.
Terms and conditions of sale — NXP Semiconductors products are sold
subject to the general terms and conditions of commercial sale, as published
at http://www.nxp.com/profile/terms, including those pertaining to warranty,
intellectual property rights infringement and limitation of liability, unless
explicitly otherwise agreed to in writing by NXP Semiconductors. In case of
any inconsistency or conflict between information in this document and such
terms and conditions, the latter will prevail.
No offer to sell or license — Nothing in this document may be interpreted
or construed as an offer to sell products that is open for acceptance or the
grant, conveyance or implication of any license under any copyrights, patents
or other industrial or intellectual property rights.
13.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
14. Contact information
For additional information, please visit: http://www.nxp.com
For sales office addresses, send an email to: salesaddresses@nxp.com
Document status[1][2] Product status[3] Definition
Objective [short] data sheet Development This document contains data from the objective specification for product development.
Preliminary [short] data sheet Qualification This document contains data from the preliminary specification.
Product [short] data sheet Production This document contains the product specification.
NXP Semiconductors PBSS4350SPN
50 V, 2.7 A NPN/PNP low VCEsat (BISS) transistor
© NXP B.V. 2007. All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
Date of release: 5 April 2007
Document identifier: PBSS4350SPN_1
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
15. Contents
1 Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.1 General description. . . . . . . . . . . . . . . . . . . . . . 1
1.2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.4 Quick reference data. . . . . . . . . . . . . . . . . . . . . 1
2 Pinning information. . . . . . . . . . . . . . . . . . . . . . 2
3 Ordering information. . . . . . . . . . . . . . . . . . . . . 2
4 Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
5 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 3
6 Thermal characteristics. . . . . . . . . . . . . . . . . . . 5
7 Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . 7
8 Test information. . . . . . . . . . . . . . . . . . . . . . . . 13
9 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 15
10 Packing information. . . . . . . . . . . . . . . . . . . . . 15
11 Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
12 Revision history. . . . . . . . . . . . . . . . . . . . . . . . 17
13 Legal information. . . . . . . . . . . . . . . . . . . . . . . 18
13.1 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 18
13.2 Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
13.3 Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 18
13.4 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 18
14 Contact information. . . . . . . . . . . . . . . . . . . . . 18
15 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
