MIC2582/MIC2583
Single-Channel Hot Swap Controllers
Micrel Inc. • 2180 Fortune DriveSan Jose, CA 95131 • USA • tel +1 (408) 944-0800 • fax + 1 (408) 474-1000 • http://www.micrel.com
May 23, 2014
Revision 5.0
General Description
The MIC2582 and MIC2583 are single-channel positive
voltage hot swap controllers designed to allow the safe
insertion of boards into live system backplanes. The
MIC2582 and MIC2583 are available in 8-pin SOIC and
16-pin QSOP packages, respectively. Using a few external
components and by controlling the gate drive of an
external N-Channel MOSFET device, the MIC2582/83
provide inrush current limiting and output voltage slew rate
control in harsh, critical power supply environments.
Additionally, a circuit breaker function will latch the output
MOSFET off if the current-limit threshold is exceeded for a
determined period. The MIC2583R option includes an
auto-restart function upon detecting an over current
condition.
Datasheets and support documentation are available on
Micrel’s web site at: www.micrel.com.
Features
MIC2582: Pin-for-pin functional equivalent to the
LTC1422
2.3V to 13.2V supply voltage operation
Surge voltage protection up to 20V
Current regulation limits inrush current regardless of
load capacitance
Programmable inrush current limiting
Electronic circuit breaker
Optional dual-level overcurrent threshold detects
excessive load faults
Fast response to short-circuit conditions (<1µs)
Programmable output under-voltage detection
Undervoltage Lockout (UVLO) protection
Auto-restart function (MIC2583R)
Power-on-Reset (POR) status output
Power good (PG) status output (MIC2583 and
MIC2583R)
/FAULT status output (MIC2583 and MIC2583R)
Applications
RAID systems
Base stations
PC board hot swap insertion and removal
+12V backplanes
Network switches
Typical Application
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Ordering Information
Part Number
Fast Circuit Breaker Threshold
Circuit Breaker
Package
MIC2582-xYM
x = J, 100mV
x = J1, Off
x = M, Off
Latched off
8-pin SOIC
MIC2583-xYQS
x = J, 100mV
x = K(1), 150mV
x = L(1), 200mV
x = M(1), Off
Latched off
16-pin QSOP
MIC2583R-xYQS
x = J, 100mV
x = K(1), 150mV
x = L(1), 200mV
x = M(1), Off
Auto-retry
16-pin QSOP
Note:
1. Contact factory for availability.
Pin Configuration
8-Pin SOIC (M)
16-Pin QSOP (QS)
Pin Description
Pin Number
8-Pin SOIC
Pin Number
16-Pin QSOP
Pin Name
Pin Function
1
1
/POR
Power-on-Reset output: Open drain N-channel device, active low. This pin
remains asserted during start-up until a time period (tPOR) after the FB pin
voltage rises above the power good threshold (VFB). The timing capacitor CPOR
determines tPOR. When the output voltage monitored at the FB pin falls below
VFB, /POR is asserted for a minimum of one timing cycle (tPOR). The /POR pin
requires a pull-up resistor (10kΩ minimum) to VCC.
2
3
ON
ON input: Active high. The ON pin is an input to a Schmitt-triggered comparator
used to enable/disable the controller, is compared to a 1.24V reference with
50mV of hysteresis. When a logic high is applied to the ON pin (VON > 1.24V), a
start-up sequence begins and the GATE pin starts ramping up towards its final
operating voltage. When the ON pin receives a logic low signal (VON < 1.19V),
the GATE pin is grounded and /FAULT remains high if VCC is above the UVLO
threshold. ON must be low for at least 20µs after VCC is above the UVLO
threshold in order to initiate a start-up sequence. Additionally, toggling the ON
pin LOW to HIGH resets the circuit breaker.
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Pin Description (Continued)
Pin Number
8-Pin SOIC
Pin Number
16-Pin QSOP
Pin Name
Pin Function
3
4
CPOR
Power-on-Reset timer: A capacitor connected between this pin and ground sets
the supply contact start-up delay (tSTART) and the power-on reset interval (tPOR).
When VCC rises above the UVLO threshold, and the ON pin is above the ON
threshold, the capacitor connected to CPOR begins to charge. When the voltage
at CPOR crosses 0.3V, the start-up threshold (VSTART), a start cycle is initiated if
ON is asserted while capacitor CPOR is immediately discharged to ground. When
the voltage at FB rises above VFB, capacitor CPOR begins to charge again. When
the voltage at CPOR rises above the power-on reset delay threshold (VTH), the
timer resets by pulling CPOR to ground, and /POR is de-asserted. If CPOR is left
open, then tSTART defaults to 20µs.
4
7, 8
GND
Ground connection: Tie to analog ground.
5
12
FB
Power good threshold input (Undervoltage detect): This input is internally
compared to a 1.24V reference with 30mV of hysteresis. An external resistive
divider may be used to set the voltage at this pin. If this input momentarily goes
below 1.24V, then /POR is activated for one timing cycle, tPOR, indicating an
output undervoltage condition. The /POR signal de-asserts one timing cycle after
the FB pin exceeds the power good threshold by 30mV. A 5µs filter on this pin
prevents glitches from inadvertently activating this signal.
6
14
GATE
Gate drive output: Connects to the gate of an external N-channel MOSFET. An
internal clamp ensures that no more than 9V is applied between the GATE pin
and the source of the external MOSFET. The GATE pin is immediately brought
low when either the circuit breaker trips or an undervoltage lockout condition
occurs.
7
15
SENSE
Circuit breaker sense input: A resistor between this pin and VCC sets the
current-limit threshold. Whenever the voltage across the sense resistor exceeds
the slow trip current-limit threshold (VTRIPSLOW), the GATE voltage is adjusted to
ensure a constant load current. If VTRIPSLOW (50mV) is exceeded for longer than
time period tOCSLOW, then the circuit breaker is tripped and the GATE pin is
immediately pulled low. If the voltage across the sense resistor exceeds the fast
trip circuit breaker threshold, VTRIPFAST, at any point due to fast, high amplitude
power supply faults, then the GATE pin is immediately brought low without delay.
To disable the circuit breaker, the SENSE and VCC pins can be tied together.
The default VTRIPFAST for either device is 100mV. Other fast trip thresholds are
available: 150mV, 200mV, or OFF (VTRIPFAST disabled). Please contact factory for
availability of other options.
8
16
VCC
Positive supply input: 2.3V to 13.2V. The GATE pin is held low by an internal
undervoltage lockout circuit until VCC exceeds a threshold of 2.2V. If VCC
exceeds 13.2V, an internal shunt regulator protects the chip from transient
voltages up to 20V at the VCC and SENSE pins.
n/a
2
PWRGD
Power good output: Open-drain N-channel device, active high. When the voltage
at the FB pin is lower than 1.24V, PWRGD output is held low. When the voltage
at the FB pin exceeds 1.24V, then PWRGD is asserted immediately. The
PWRGD pin requires a pull-up resistor (10kΩ minimum) to VCC.
n/a
5
CFILTER
Current-limit response timer: A capacitor connected to this pin defines the period
of time (tOCSLOW) in which an overcurrent event must last to signal a fault
condition and trip the circuit breaker. If no capacitor is connected, then tOCSLOW
defaults to 5µs.
n/a
11
/FAULT
Circuit breaker fault status output: Open-drain N-channel device, active low. The
/FAULT pin is asserted when the circuit breaker trips due to an overcurrent
condition or when an undervoltage lockout condition exists. The/FAULT pin
requires a pull-up resistor (10kΩ minimum) to VCC.
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Pin Description (Continued)
Pin Number
8-Pin SOIC
Pin Number
16-Pin QSOP
Pin Name
Pin Function
n/a
13
DIS
Discharge output: When the MIC2583/83R is turned off, a 500Ω internal resistor
at this output allows the discharging of any load capacitance to ground.
n/a
6, 9, 10
NC
No internal connection.
Note: Please refer to the Applications Section and Figure 3 for a detailed explanation of the start-up and operation sequence of the MIC2582
pins shown in the Pin Description table.
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Absolute Maximum Ratings(2)
Supply Voltage (VCC) ..................................... 0.3V to +20V
/POR, /FAULT, PWRGD Pins. ........................ 0.3V to 15V
SENSE Pin ............................................0.3V to VCC+0.3V
ON Pin ...................................................0.3V to VCC+0.3V
GATE Pin ........................................................ 0.3V to 20V
FB Input Pins ..................................................... 0.3V to 6V
Junction Temperature .............................................. +125°C
Lead Temperature
Standard Package (-JBM and xBQS)
(IR Reflow, Peak Temperature) ......... 240°C + 0°C/-5°C
Pb-Free Package (-xYM or xYQS)
(IR Reflow, Peak Temperature) ......... 260°C + 0°C/-5°C
ESD Rating(4)
Human body model.................................................. 2kV
Machine model ...................................................... 100V
Operating Ratings(3)
Supply Voltage (VCC) .................................. +2.3V to +13.2V
Ambient Temperature (TA) .......................... 40°C to +85°C
Junction Thermal Resistance
SOIC (JA) ........................................................ 163°C/W
QSOP (JA) ...................................................... 112°C/W
Electrical Characteristics(5)
VCC = 5.0V; TA = 25°C, bold values indicate 40°C TA +85°C, unless noted.
Symbol
Parameter
Condition
Min.
Typ.
Max.
Units
VCC
Supply Voltage
2.3
13.2
V
ICC
Supply Current
VON = 2V
1.5
2.5
mA
VTRIP
Circuit Breaker Trip Voltage
(Current-Limit Threshold)
VTRIP = VCC VSENSE
VTRIPSLOW
42
50
59
VTRIPFAST
(MIC2582-Jxx)
100
mV
VTRIPFAST
(MIC2583/83R) X = J
X = K
X = L
85
130
175
100
150
200
110
170
225
mV
mV
mV
VGS
External Gate Drive
VGATE VCC
VCC > 3V
7
8
9
V
VCC = 2.3V
3.5
4.8
6.5
V
IGATE
GATE Pin Pull-Up Current
Start Cycle, VGATE = 0V, VCC = 13.2V
30
17
8
µA
VCC = 2.3V
26
17
8
µA
IGATEOFF
GATE Pin Sink Current
VGATE > 1V
/FAULT = 0
(MIC2583/83R only)
VCC = 13.2V, Note 6
100
mA
VCC = 2.3V, Note 6
50
mA
Turn Off
110
µA
ITIMER
Current-Limit/Overcurrent Timer
(CFILTER) Current
(MIC2583/83R)
VCC VSENSE > VTRIPSLOW (timer on)
8.5
6.5
4.5
µA
VCC VSENSE > VTRIPSLOW (timer off)
4.5
6.5
8.5
µA
ICPOR
Power-on-Reset Timer Current
Timer on
3.5
2.5
1.5
µA
Timer off
0.5
1.3
mA
VTH
POR Delay and Overcurrent
Timer (CFILTER) Threshold
VCPOR rising
VCFILTER rising (MIC2583/83R only)
1.19
1.245
1.30
V
VUV
Undervoltage Lockout Threshold
VCC rising
2.1
2.2
2.3
V
VCC falling
1.90
2.05
2.20
V
VUVHYS
Undervoltage Lockout Hysteresis
150
mV
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Electrical Characteristics(5) (Continued)
Symbol
Parameter
Condition
Min.
Typ.
Max.
Units
VON
ON Pin Threshold Voltage
2.3V VCC 13.2V
ON rising
1.19
1.24
1.29
V
ON falling
1.14
1.19
1.24
V
VONHYS
ON Pin Hysteresis
50
mV
VON
ON Pin Threshold Line Regulation
2.3V VCC 13.2V
2
mV
ION
ON Pin Input Current
VON = VCC
0.5
µA
VSTART
Start-Up Delay Timer Threshold
VCPOR rising
0.26
0.31
0.36
V
VAUTO
Auto-Restart Threshold Voltage
(MIC2583R only)
Upper threshold
0.19
1.24
1.30
V
Lower threshold
0.26
0.31
0.36
V
IAUTO
Auto-Restart Current
(MIC2583R only)
Charge current
10
13
16
µA
Discharge current
1.4
2
µA
VFB
Power-Good Threshold Voltage
2.3V = VCC = 13.2V
FB rising
1.19
1.24
1.29
V
FB falling
1.15
1.20
1.25
V
VFBHYS
FB Hysteresis
40
mV
IFBLKG
FB Pin Leakage Current
2.3V = VCC = 13.2V, VFB = 1.3V
1.5
µA
VOL
/POR, /FAULT, PWRGD
Output Voltage
(/FAULT, PWRGD MIC2583/83R
only)
IOUT = 1mA
0.4
V
RDIS
Output Discharge Resistance
(MIC2583/83R only)
500
1000
tOCFAST
Fast Overcurrent SENSE to GATE
Low Trip Time
VCC = 5V, VCC VSENSE = 100mV
CGATE = 10nF, Figure 1
1
µs
tOCSLOW
Slow Overcurrent SENSE to GATE
Low Trip Time
VCC = 5V, VCC VSENSE = 50mV
CFILTER = 0, Figure 1
5
µs
tONDLY
ON Delay Filter
20
µs
tFBDLY
FB Delay Filter
20
µs
Notes:
2. Exceeding the absolute maximum ratings may damage the device.
3. The device is not guaranteed to function outside its operating ratings.
4. Devices are ESD sensitive. Handling precautions are recommended. Human body model, 1.5k in series with 100pF.
5. Specification for packaged product only.
6. Not a tested parameter, guaranteed by design.
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Timing Diagrams
Figure 1. Current-Limit Response
Figure 2. MIC2583 Power-on-Reset Response
Figure 3. Power-on Start-up Delay Timing(7)
Note:
7. Please refer to the Applications Section, Start-Up Cycle sub-section, for a detailed explanation of the timing shown in this figure.
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Test Circuit
Figure 4. Applications Test Circuit
(not all pins shown for simplicity)
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Typical Characteristics
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Typical Characteristics (Continued)
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Functional Characteristics
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Functional Characteristics (Continued)
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Functional Diagram
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Functional Description
Hot Swap Insertion
When circuit boards are inserted into live system
backplanes and supply voltages, high inrush currents can
result due to the charging of bulk capacitance that
resides across the supply pins of the circuit board. This
inrush current, although transient in nature, may be high
enough to cause permanent damage to on board
components or may cause the system’s supply voltages
to go out of regulation during the transient period which
may result in system failures. The MIC2582 and MIC2583
act as a controller for external N-channel MOSFET
devices in which the gate drive is controlled to provide
inrush current-limiting and output voltage slew rate
control during hot plug insertions.
Power Supply
VCC is the supply input to the MIC2582/83 controller with
a voltage range of 2.3V to 13.2V. The VCC input can
withstand transient spikes up to 20V. In order to ensure
stability of the supply voltage, a minimum 0.47µF
capacitor from VCC to ground is recommended.
Alternatively, a low pass filter, shown in the Typical
Application circuit, can be used to eliminate high
frequency oscillations as well as help suppress transient
spikes.
Also, due to the existence of an undetermined amount of
parasitic inductance in the absence of bulk capacitance
along the supply path, placing a Zener diode at the VCC
side of the controller to ground in order to provide
external supply transient protection is strongly
recommended for relatively high current applications
(≥3A). See the Typical Application.
Start-Up Cycle
Referring to Figure 3: When the VCC input voltage is first
applied, it raises above the UVLO threshold voltage (VUV,
in Figure 3). A minimum of 20μs later, ( in Figure
3), the voltage on the ON pin can be taken above the ON
pin threshold (VON). At that time the CPOR current source
(ICPOR), is turned on, and the voltage at the CPOR pin
starts to rise. See Table 2 for some typical supply start-up
delays using several standard value capacitors. When
the CPOR voltage reaches the start threshold voltage
(VSTART, in Figure 3), two things happen:
The external power FET driver charge pump is turned
on, and the output voltage starts to rise.
The capacitor on the CPOR pin is discharged to
ground.
The voltage on the feedback (FB) pin tracks the VOUT,
output voltage through the feedback divider resistors (R1
and R2 in Figure 4). When the output voltage rises, and
the FB voltage reaches the FB threshold voltage (VFB),
the current source into the CPOR pin is again turned on,
and the voltage at the CPOR pin starts to rise. When the
CPOR voltage reaches the threshold voltage (VTH, in
Figure 3), the /POR pin goes high impedance, and is
allowed to be pulled up by the external pull-up resistor on
the /POR pin. This indicates that the output power is
good.
In the MIC2583, when the FB threshold voltage (VFB) is
reached, the power good (PWRGD) pin goes open
circuit, high impedance, and is allowed to be pulled up by
the external pull-up resistor on the PWRGD pin. The non-
delayed power good feature is only available on the
MIC2583.
Active current regulation is employed to limit the inrush
current transient response during start-up by regulating
the load current at the programmed current-limit value
(See the Current Limiting and Dual-Level Circuit Breaker
section). The following equation is used to determine the
nominal current-limit value:
SENSESENSE
TRIPSLOW
LIM RmV
R
V
I50
Eq. 1
where VTRIPSLOW is the current limit slow trip threshold
found in the electrical table and RSENSE is the selected
value that will set the desired current limit. There are two
basic start-up modes for the MIC2582/83: Start-up
dominated by load capacitance or Start-up dominated by
total gate capacitance. The magnitude of the inrush
current delivered to the load will determine the dominant
mode. If the inrush current is greater than the
programmed current limit (ILIM), then load capacitance is
dominant. Otherwise, gate capacitance is dominant. The
expected inrush current may be calculated using the
following equation:
GATE
LOAD
GATE
LOAD
GATE C
C
xA
C
C
xIINRUSH
17
Eq. 2
where IGATE is the GATE pin pull-up current, CLOAD is the
load capacitance, and CGATE is the total GATE
capacitance (CISS of the external MOSFET and any
external capacitor connected from the MIC2582/83 GATE
pin to ground).
Load Capacitance-Dominated Start-Up
In this case, the load capacitance (CLOAD) is large enough
to cause the inrush current to exceed the programmed
current limit but is less than the fast-trip threshold (or the
fast-trip threshold is disabled, M’ option). During start-up
under this condition, the load current is regulated at the
programmed current-limit value (ILIM) and held constant
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until the output voltage rises to its final value. The output
slew rate and equivalent GATE voltage slew rate is
computed by the following equation:
Output voltage slew rate: dVOUT/dt =
LOAD
LIM
CI
Eq. 3
where ILIM is the programmed current-limit value.
Consequently, the value of CFILTER must be selected to
ensure that the overcurrent response time, tOCSLOW,
exceeds the time needed for the output to reach its final
value. For example, given a MOSFET with an input
capacitance CISS = CGATE = 4700pF, CLOAD is 2200µF, and
ILIM is set to 6A with a 12V input, then the load
capacitance dominates as determined by the calculated
INRUSH > ILIM. Therefore, the output voltage slew rate
determined from Equation 3 is:
Output voltage slew rate: dVOUT/dt =
ms
V
F
A73.2
2200
6
Eq. 4
and the resulting tOCSLOW needed to achieve a 12V output
is approximately 4.5ms. (See Power-on-Reset and
Overcurrent Timer Delays section to calculate tOCSLOW).
GATE Capacitance-Dominated Start-Up
In this case, the value of the load capacitance relative to
the GATE capacitance is small enough such that the load
current during start-up never exceeds the current-limit
threshold as determined by Equation 1. The minimum
value of CGATE that will ensure that the current limit is
never exceeded is given by the equation below:
dVOUT/dt =
GATE
GATE
C
I
Eq. 5
Table 1 depicts the output slew rate for various values of
CGATE.
Table 1. Output Slew Rate Selection for Gate Capacitance-
Dominated Start-Up
IGATE = 17µA
CGATE
dVOUT/dt
0.001µF
17V/ms
0.01µF
1.7V/ms
0.1µF
0.17V/ms
1µF
0.017V/ms
Current Limiting and Dual-Level Circuit Breaking
Many applications will require that the inrush and steady
state supply current be limited at a specific value in order
to protect critical components within the system.
Connecting a sense resistor between the VCC and
SENSE pins sets the nominal current limit value of the
MIC2582/83 and the current limit is calculated using
Equation 1.
The MIC2582/83 also features a dual-level circuit breaker
triggered via the 50mV and 100mV current-limit
thresholds which are sensed across the VCC and
SENSE pins. The first level of the circuit breaker
functions as follows. For the MIC2583/83R, once the
voltage sensed across these two pins exceeds 50mV, the
overcurrent timer, its duration set by capacitor CFILTER,
starts to ramp the voltage at CFILTER using a 6.5µA
constant current source. If the voltage at CFILTER reaches
the overcurrent timer threshold (VTH) of 1.24V, then
CFILTER immediately returns to ground as the circuit
breaker trips and the GATE output is immediately shut
down. The default overcurrent time period for the
MIC2582/83 is 5µs. For the second level, if the voltage
sensed across VCC and SENSE exceeds 100mV at any
time, the circuit breaker trips and the GATE shuts down
immediately, bypassing the overcurrent time period. The
MIC2582-MYM option is equipped with only a single
circuit breaker threshold (50mV). To disable current-limit
and circuit breaker operation, tie the SENSE and VCC
pins together and the CFILTER (MIC2583/83R) pin to
ground.
Output Undervoltage Detection
The MIC2582/83 employ output undervoltage detection
by monitoring the output voltage through a resistive
divider connected at the FB pin. During turn-on, while the
voltage at the FB pin is below the threshold (VFB), the
/POR pin is asserted low.
Once the FB pin voltage crosses VFB, a 2.5µA current
source charges capacitor CPOR. Once the CPOR pin
voltage reaches 1.24V, the time period tPOR elapses as
the CPOR pin is pulled to ground and the /POR pin goes
HIGH. If the voltage at FB drops below VFB for more than
10µs, the /POR pin resets for at least one timing cycle
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defined by tPOR (See Applications Information for an
example).
Power-on-Reset and Overcurrent Timer Delays
The Power-on-Reset delay, tPOR, is the time period for
the /POR pin to go HIGH once the voltage at the FB pin
exceeds the power good threshold (VFB). A capacitor
connected to CPOR sets the interval and is determined
by using Equation 6:
FC
IV
Ct POR
CPOR
TH
PORPOR
5.0
Eq. 6
where the Power-on-Reset threshold (VTH) and timer
current (ICPOR) are typically 1.24V and 2.5µA,
respectively.
For the MIC2583/83R, a capacitor connected to CFILTER
is used to set the timer which activates the circuit breaker
during overcurrent conditions. When the voltage across
the sense resistor exceeds the slow trip current-limit
threshold of 50mV, the overcurrent timer begins to
charge for a time period (tOCSLOW), determined by CFILTER.
When no capacitor is connected to CFILTER and for the
MIC2582, tOCSLOW defaults to 5µs. If tOCSLOW elapses, then
the circuit breaker is activated and the GATE output is
immediately pulled to ground. For the MIC2583/83R, the
following equation is used to determine the overcurrent
timer period, tOCSLOW.
)(0.19 FC
IV
Ct FILTER
TIMER
TH
FILTEROCSLOW
Eq. 7
where VTH, the CFILTER timer threshold, is 1.24V and
ITIMER, the overcurrent timer current, is 6.5µA. Table 2 and
Table 3 provide a quick reference for several timer
calculations using select standard value capacitors.
Table 2. Selected Power-on-Reset and Start-Up Delays
CPOR
tSTART
tPOR
0.01µF
1.2ms
5ms
0.02µF
2.4ms
10ms
0.033µF
4ms
16.5ms
0.05µF
6ms
25ms
0.1µF
12ms
50ms
0.33µF
40ms
165ms
0.47µF
56ms
235ms
1µF
120ms
500ms
Table 3. Selected Overcurrent Timer Delays
CFILTER
tOCSLOW
680pF
130µs
2200pF
420µs
4700pF
900µs
8200pF
1.5ms
0.033µF
6ms
0.1µF
19ms
0.22µF
42ms
0.47µF
90ms
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Application Information
Design Consideration for Output Undervoltage
Detection
For output undervoltage detection, the first consideration
is to establish the output voltage level that indicates
“power is good.” For this example, the output value for
which a 12V supply will signal “good” is 11V. Next,
consider the tolerances of the input supply and FB
threshold (VFB). For this example, the 12V supply varies
±5%, thus the resulting output voltage may be as low as
11.4V and as high as 12.6V. Additionally, the FB
threshold has ±50mV tolerance and may be as low as
1.19V and as high as 1.29V. Thus, to determine the
values of the resistive divider network (R5 and R6) at the
FB pin, shown in the typical application circuit on page 1,
use the following iterative design procedure.
Choose R6 to allow 100µA or more in the FB
resistive divider branch.
kΩ.
AA
R912
100
1.29V
100
V
6FB(MAX)
Eq. 8
R6 is chosen as 12.4k ±1%
Next, determine R5 using the output good” voltage
of 11V and the following equation.
R6R6R5
FBOUT(Good) VV
Eq. 9
Using some basic algebra and simplifying Equation 9 to
isolate R5 yields:
165 FB(MAX)
OUT(Good)
V
V
RR
Eq. 10
where VFB(MAX) = 1.29V, VOUT(Good) = 11V, and R6 is
12.4kΩ. Substituting these values into Equation 10 now
yields R5 = 93.33kΩ. A standard 93.1k±1% is selected.
Now, consider the 11.4V minimum output voltage, the
lower tolerance for R6 and higher tolerance for R5,
12.28kΩ and 94.03kΩ, respectively. With only 11.4V
available, the voltage sensed at the FB pin exceeds
VFB(MAX), thus the /POR and PWRGD (MIC2583/83R)
signals will transition from LOW to HIGH, indicating
“power is good” given the worse case tolerances of this
example. Lastly, in giving consideration to the leakage
current associated with the FB input, it is recommended
to either provide ample design margin (20mV to 30mV) to
allow for loss in the potential (∆V) at the FB pin, or allow
>100µA to flow in the FB resistor network.
PCB Connection Sense
There are several configuration options for the
MIC2582/83’s ON pin to detect if the PCB has been fully
seated in the backplane before initiating a start-up cycle.
In the typical applications circuit, the MIC2582/83 is
mounted on the PCB with a resistive divider network
connected to the ON pin. R2 is connected to a short pin
on the PCB edge connector. Until the connectors mate,
the ON pin is held low which keeps the GATE output
charge pump off. Once the connectors mate, the resistor
network is pulled up to the input supply,
Figure 5. PCB Connection Sense with ON/OFF Control
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12V in this example, and the ON pin voltage exceeds its
threshold (VON) of 1.24V and the MIC2582/83 initiates a
start-up cycle. In Figure 5, the connection sense consisting
of a discrete logic-level MOSFET and a few resistors
allows for interrupt control from the processor or other
signal controller to shut off the output of the MIC2582/83.
R4 pulls the GATE of Q2 to VIN and the ON pin is held low
until the connectors are fully mated.
Once the connectors fully mate, a logic LOW at the
/ON_OFF signal turns Q2 off and allows the ON pin to pull
up above its threshold and initiate a start-up cycle.
Applying a logic HIGH at the /ON_OFF signal will turn Q2
on and short the ON pin of the MIC2582/83 to ground
which turns off the GATE output charge pump.
Higher UVLO Setting
Once a PCB is inserted into a backplane (power supply),
the internal UVLO circuit of the MIC2582/83 holds the
GATE output charge pump off until VCC exceeds 2.2V. If
VCC falls below 2.1V, the UVLO circuit pulls the GATE
output to ground and clears the overvoltage and/or current
limit faults. A typical 12V application, for example, should
implement a higher UVLO than the internal 2.1V threshold
of MIC2582 to avoid delivering power to downstream
modules/loads while the input is below tolerance. For a
higher UVLO threshold, the circuit in Figure 6 can be used
to delay the output MOSFET from switching on until the
desired input voltage is achieved. The circuit allows the
charge pump to remain off until VIN exceeds
.24.1
2
1
1V
R
R
The GATE drive output will be shut
down when VIN falls below
.19.1
2
1
1V
R
R
In the
example circuit (Figure 6), the rising UVLO threshold is set
at approximately 9.5V and the falling UVLO threshold is
established as 9.1V. The circuit consists of an external
resistor divider at the ON pin that keeps the GATE output
charge pump off until the voltage at the ON pin exceeds its
threshold (VON) and after the start-up timer elapses.
5V Switch with 3.3V Supply Generation
The MIC2582/83 can be configured to switch a primary
supply while generating a secondary regulated voltage rail.
The circuit in Figure 8 enables the MIC2582 to switch a 5V
supply while also providing a 3.3V low dropout regulated
supply with only a few added external components. Upon
enabling the MIC2582, the GATE output voltage increases
and thus the 3.3V supply also begins to ramp. As the 3.3V
output supply crosses 3.3V, the FB pin threshold is also
exceeded which triggers the power-on reset comparator.
The /POR pin goes HIGH, turning on transistor Q3 which
lowers the voltage on the gate of MOSFET Q2. The result
is a regulated 3.3V supply with the gate feedback loop of
Q2 compensated by capacitor C3 and resistors R4 and
R5. For MOSFET Q2, special consideration must be given
to the power dissipation capability of the selected
MOSFET as 1.5V to 2V will drop across the device during
normal operation in this application. Therefore, the device
is susceptible to overheating dependent upon the current
requirements for the regulated output. In this example, the
power dissipated by Q2 is approximately 1W. However, a
substantial amount of power will be generated with higher
current requirements and/or conditions. As a general
guideline, expect the ambient temperature within the
power supply box to exceed the maximum operating
ambient temperature of the system environment by
approximately 20ºC. Given the MOSFET’s Rθ(JA) and the
expected power dissipated by the MOSFET, an
approximation for the junction temperature at which the
device will operate is obtained as follows:
TJ = (PD x R(JA)) + TA Eq. 11
where TA = TA(MAX OPERATING) + 20ºC. As a precaution, the
implementation of additional copper heat sinking is highly
recommended for the area under/around the MOSFET
Figure 6. Higher UVLO Setting
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For additional information on MOSFET thermal
considerations, please see MOSFET Selection text and
subsequent sections.
Auto-Restart for MIC2583R
The MIC2583R provides an auto-restart function. Upon an
overcurrent fault condition such as a short circuit, the
MIC2583R initially shuts off the GATE output. The
MIC2583R attempts to restart with a 12µA charge current
at a preset 10% duty cycle until the fault condition is
removed. The interval between auto-retry attempts is set
by capacitor CFILTER.
Sense Resistor Selection
The MIC2582 and MIC2583 use a low-value sense resistor
to measure the current flowing through the MOSFET
switch (and therefore the load). This sense resistor is
nominally set at 50mV/ILOAD(CONT). To accommodate worst-
case tolerances for both the sense resistor (allow ±3%
over time and temperature for a resistor with ±1% initial
tolerance) and still supply the maximum required steady-
state load current, a slightly more detailed calculation must
be used.
The current limit threshold voltage (i.e., the “trip point”) for
the MIC2582/83 may be as low as 42mV, which would
equate to a sense resistor value of 42mV/ILOAD(CONT).
Carrying the numbers through for the case where the
value of the sense resistor is 3% high yields:
)()(
)( 8.40
03.1 42
CONTLOADCONTLOAD
MAXSENSE ImV
ImV
R
Eq. 12
Once the value of RSENSE has been chosen in this manner,
it is good practice to check the maximum ILOAD(CONT) which
the circuit may let through in the case of tolerance buildup
in the opposite direction. Here, the worst-case maximum
current is found using a 59mV trip voltage and a sense
resistor that is 3% low in value. The resulting equation is:
)()(
),( 8.60
)97.0( 59
NOMSENSENOMSENSE
MAXCONTLOAD RmV
RmV
I
Eq. 13
As an example, if an output must carry a continuous 2A
without nuisance trips occurring, Equation 12 yields:
.4.20
2
8.40
)( m
A
mV
RMAXSENSE
The next lowest standard value is 20mΩ. At the other set
of tolerance extremes for the output in question,
A
m
mV
IMAXCONTLOAD 04.3
0.208.60
),(
approximately 3A. Knowing this final data, we can
determine the necessary wattage of the sense resistor
using P = I2R, where I will be ILOAD(CONT, MAX), and R will be
(0.97)(RSENSE(NOM)). These numbers yield the following:
PMAX = (3A)2 (19.4mΩ) = 0.175W.
In this example, a ¼W sense resistor is sufficient.
Figure 7. 5V Switch/3.3V LDO Application
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MOSFET Selection
Selecting the proper external MOSFET for use with the
MIC2582/83 involves three straightforward tasks.
The choice of a MOSFET that meets minimum voltage
requirements.
The selection of a device to handle the maximum
continuous current (steady-state thermal issues).
Verification of the selected part’s ability to withstand
any peak currents (transient thermal issues).
MOSFET Voltage Requirements
The first voltage requirement for the MOSFET is easily
stated: the drain-source breakdown voltage of the
MOSFET must be greater than VIN(MAX). For instance, a
12V input may reasonably be expected to see high-
frequency transients as high as 18V. Therefore, the drain-
source breakdown voltage of the MOSFET must be at
least 19V. For ample safety margin and standard
availability, the closest value will be 20V.
The second breakdown voltage criterion that must be met
is a bit subtler than simple drain-source breakdown
voltage, but is not hard to meet. In MIC2582/83
applications, the gate of the external MOSFET is driven up
to approximately 19.5V by the internal output MOSFET
(again, assuming 12V operation).
At the same time, if the output of the external MOSFET (its
source) is suddenly subjected to a short, the gate-source
voltage will go to (19.5V 0V) = 19.5V. This means that
the external MOSFET must be chosen to have a gate-
source breakdown voltage of 20V or more, which is an
available standard maximum value. However, if operation
is at or above 13V, the 20V gate-source maximum will
likely be exceeded. As a result, an external Zener diode
clamp should be used to prevent breakdown of the
external MOSFET when operating at voltages above 8V. A
Zener diode with 10V rating is recommended as shown in
Figure 8. At the present time, most power MOSFETs with
a 20V gate-source voltage rating have a 30V drain-source
breakdown rating or higher.
As a general tip, choose surface-mount devices with a
drain-source rating of 30V as a starting point.
Finally, the external gate drive of the MIC2582/83 requires
a low-voltage logic level MOSFET when operating at
voltages lower than 3V. There are 2.5V logic level
MOSFETs available. Please see Table 4 MOSFET and
Sense Resistor Vendors” for suggested manufacturers.
Figure 8. Zener-Clamped MOSFET Gate
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MOSFET Steady-State Thermal Issues
The selection of a MOSFET to meet the maximum
continuous current is a fairly straightforward exercise.
First, the designer needs the following data:
The value of ILOAD(CONT, MAX.) for the output in question
(see Sense Resistor Selection).
The manufacturer’s datasheet for the candidate
MOSFET.
The maximum ambient temperature in which the
device will be required to operate.
Any knowledge one can get about the heat sinking
available to the device (e.g., can heat be dissipated
into the ground plane or power plane, if using a
surface-mount part? Is any airflow available?).
The datasheet will almost always give a value of on
resistance given for the MOSFET at a gate-source voltage
of 4.5V, and another value at a gate-source voltage of
10V. As a first approximation, add the two values together
and divide by two to get the on-resistance of the part with
8V of enhancement.
Call this value RON. Since a heavily enhanced MOSFET
acts as an ohmic (resistive) device, almost all that’s
required to determine steady-state power dissipation is to
calculate I2R.
The one addendum to this is that MOSFETs have a slight
increase in RON with increasing die temperature. A good
approximation for this value is 0.5% increase in RON per ºC
rise in junction temperature above the point at which RON
was initially specified by the manufacturer. For instance, if
the selected MOSFET has a calculated RON of 10mat a
TJ = 25ºC, and the actual junction temperature ends up at
110ºC, a good first cut at the operating value for RON would
be:
mmRON 3.14005.025110110
Eq. 14
The final step is to make sure that the heat sinking
available to the MOSFET is capable of dissipating at least
as much power (rated in ºC/W) as that with which the
MOSFETs performance was specified by the
manufacturer. Here are a few practical tips:
The heat from a surface-mount device such as an
SOIC-8 MOSFET flows almost entirely out of the drain
leads. If the drain leads can be soldered down to one
square inch or more, the copper will act as the heat
sink for the part. This copper must be on the same
layer of the board as the MOSFET drain.
Airflow works. Even a few LFM (linear feet per minute)
of air will cool a MOSFET down substantially. If you
can, position the MOSFET(s) near the inlet of a power
supply’s fan, or the outlet of a processor’s cooling fan.
The best test of a surface-mount MOSFET for an
application (assuming the above tips show it to be a
likely fit) is an empirical one. Check the MOSFETs
temperature in the actual layout of the expected final
circuit, at full operating current. The use of a
thermocouple on the drain leads, or infrared pyrometer
on the package, will then give a reasonable idea of the
device’s junction temperature.
MOSFET Transient Thermal Issues
Having chosen a MOSFET that will withstand the imposed
voltage stresses, and the worse case continuous I2R
power dissipation which it will see, it remains only to verify
the MOSFETs ability to handle short-term overload power
dissipation without overheating. A MOSFET can handle a
much higher pulsed power without damage than its
continuous dissipation ratings would imply. The reason for
this is that, like everything else, thermal devices (silicon
die, lead frames, etc.) have thermal inertia.
In terms related directly to the specification and use of
power MOSFETs, this is known as “transient thermal
impedance,” or Z(JA). Almost all power MOSFET
datasheets give a Transient Thermal Impedance Curve.
For example, take the following case: VIN = 12V, tOCSLOW
has been set to 100ms, ILOAD(CONT. MAX) is 2.5A, the slow-trip
threshold is 50mV nominal, and the fast-trip threshold is
100mV. If the output is accidentally connected to a 3Ω
load, the output current from the MOSFET will be
regulated to 2.5A for 100ms (tOCSLOW) before the part trips.
During that time, the dissipation in the MOSFET is given
by:
P = E × I; EMOSFET = [12V-(2.5A)(3Ω)] = 4.5V
PMOSFET = (4.5V × 2.5A) = 11.25W for 100ms.
At first glance, it would appear that a really hefty MOSFET
is required to withstand this sort of fault condition. This is
where the transient thermal impedance curves become
very useful. Figure 9 shows the curve for the Vishay
(Siliconix) Si4410DY, a commonly used SOIC-8 power
MOSFET.
Taking the simplest case first, we’ll assume that once a
fault event such as the one in question occurs, it will be a
long timeten minutes or morebefore the fault is isolated
and the channel is reset. In such a case, we can
approximate this as a “single pulse” event, that is to say,
there’s no significant duty cycle. Then, reading up from the
X-axis at the point where “Square Wave Pulse Duration” is
equal to 0.1sec (=100ms), we see that the Z(JA) of this
MOSFET to a highly infrequent event of this duration is
only 8% of its continuous R(JA).
This particular part is specified as having an R(JA) of
50°C/W for intervals of 10 seconds or less.
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Thus:
Assume TA = 55°C maximum, 1 square inch of copper at
the drain leads, no airflow.
Recalling from our previous approximation hint, the part
has an RON of (0.0335/2) = 17mΩ at 25°C.
Assume it has been carrying just about 2.5A for some
time.
When performing this calculation, be sure to use the
highest anticipated ambient temperature (TA(MAX)) in which
the MOSFET will be operating as the starting temperature,
and find the operating junction temperature increase (∆TJ)
from that point. Then, as shown next, the final junction
temperature is found by adding TA(MAX) and ∆TJ. Since this
is not a closed-form equation, getting a close
approximation may take one or two iterations, and the
calculation tends to converge quickly.
Then the starting (steady-state) TJ is:
TJ TA(MAX) + ∆TJ
TJ TA(MAX) + [RON + TA(MAX) TA)(0.005/ºC)(RON)]
x I2 x R(JA)
TJ 55ºC + [17m+ (55ºC-25ºC)(0.005)(17mΩ)]
x (2.5A)2 x (50ºC/W)
TJ (55ºC + (0.122W)(50ºC/W)
TJ 61.1ºC
Iterate the calculation once to see if this value is within a
few percent of the expected final value. For this iteration
we will start with TJ equal to the already calculated value of
61.1°C:
TJ TA + [17mΩ + (61.1ºC-25ºC)(0.005)(17mΩ)]
x (2.5A)2 x (50ºC/W)
TJ (55ºC + (0.125W)(50ºC/W) 61.27ºC
So our original approximation of 61.1ºC was very close to
the correct value. We will use TJ = 61ºC.
Finally, add the temperature increase due to the maximum
power dissipation calculated from a “single event”,
(11.25W)(50ºC/W)(0.08) = 45ºC to the steady-state TJ to
get TJ(TRANSIENT MAX.) = 106ºC. This is an acceptable
maximum junction temperature for this part.
Figure 9. Transient Thermal Impedance
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PCB Layout Considerations
Because of the low values of the sense resistors used with
the MIC2582/83 controllers, special attention to the layout
must be used in order for the device’s circuit breaker
function to operate properly. Specifically, the use of a 4-
wire Kelvin connection to accurately measure the voltage
across RSENSE is highly recommended. Kelvin sensing is
simply a means of making sure that any voltage drops in
the power traces connecting to the resistors does not get
picked up by the traces themselves. Additionally, these
Kelvin connections should be isolated from all other signal
traces to avoid introducing noise onto these sensitive
nodes. Figure 10 illustrates a recommended, single layer
layout for the RSENSE, power MOSFET, timer(s), and
feedback network connections. The feedback network
resistor values are selected for a 12V application. Many
hot swap applications will require load currents of several
amperes. Therefore, the power (VCC and Return) trace
widths (W) need to be wide enough to allow the current to
flow while the rise in temperature for a given copper plate
(e.g., 1oz. or 2oz.) is kept to a maximum of 10ºC~25ºC.
Also, these traces should be as short as possible in order
to minimize the IR drops between the input and the load.
Finally, the use of plated-through vias will be needed to
make circuit connections to power and ground planes
when utilizing multi-layer PC boards.
MOSFET and Sense Resistor Vendors
Device types and manufacturer contact information for
power MOSFETs and sense resistors are provided in
Table 4. Some of the recommended MOSFETs include a
metal heat sink on the bottom side of the package. The
recommended trace for the MOSFET Gate of Figure 10
must be redirected when using MOSFETs packaged in this
style. Contact the device manufacturer for package
information.
Figure 10. Recommended PCB Layout for Sense Resistor,
Power MOSFET, and Feedback Network
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Table 4. MOSFET and Sense Resistor Vendors
MOSFET Vendor
Key MOSFET Type(s)
Applications(8)
Contact Information
Vishay (Siliconix)
Si4420DY (SOIC-8) package
Si4442DY (SOIC-8) package
Si4876DY (SOIC-8) package
Si7892DY (PowerPAK® SOIC-8)
IOUT 10A
IOUT = 10-15A, VCC < 3V
IOUT 5A, VCC 5V
IOUT 15A
www.siliconix.com
(203) 452-5664
International Rectifier
IRF7413 (SOIC-8) package
IRF7457 (SOIC-8) package
IRF7601 (SOIC-8) package
IOUT 10A
IOUT = 10-15A
IOUT 5A, VCC < 3V
www.irf.com
(310) 322-3331
Fairchild Semiconductor
FDS6680A (SOIC-8) package
IOUT 10A
www.fairchildsemi.com
(207) 775-8100
Philips
PH3230 (SOT669-LFPAK)
IOUT ≥ 20A
www.philips.com
Hitachi
HAT2099H (LFPAK)
IOUT ≥ 20A
www.halsp.hitachi.com
(408) 433-1990
Note:
8. These devices are not limited to these conditions in many cases, but these conditions are provided as a helpful reference for customer applications.
Resistor Vendors
Sense Resistors
Contact Information
Vishay (Dale)
“WSL” Series
www.vishay.com/docswsl_30100.pdf
(203) 452-5664
IRC
“OARS” Series
“LR” Series
(second source to “WSL”)
www.irctt.com/pdf_files/OARS.pdf
www.irctt.com/pdf_files/LRC.pdf
(828) 264-8861
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Package Information(9)
8-Pin SOIC (M)
MIC2582/MIC5283
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Package Information(9) (Continued)
16-Pin QSOP (QS)
Note:
9. Package information is correct as of the publication date. For updates and most current information, go to www.micrel.com.
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