For free samples & the latest literature: http://www.maxim-ic.com, or phone 1-800-998-8800.
For small orders, phone 1-800-835-8769.
General Description
The MAX7401/MAX7405 8th-order, lowpass, Bessel,
switched-capacitor filters (SCFs) operate from a single
+5V (MAX7401) or +3V (MAX7405) supply. These
devices draw only 2mA of supply current and allow cor-
ner frequencies from 1Hz to 5kHz, making them ideal
for low-power post-DAC filtering and anti-aliasing appli-
cations. They feature a shutdown mode that reduces
supply current to 0.2µA.
Two clocking options are available on these devices:
self-clocking (through the use of an external capacitor)
or external clocking for tighter corner-frequency control.
An offset adjust pin allows for adjustment of the DC out-
put level.
The MAX7401/MAX7405 Bessel filters provide low over-
shoot and fast settling. Their fixed response simplifies
the design task to selecting a clock frequency.
Applications
ADC Anti-Aliasing CT2 Base Stations
Post-DAC Filtering Speech Processing
Air-Bag Electronics
Features
8th-Order, Lowpass Bessel Filters
Low Noise and Distortion: -82dB THD + Noise
Clock-Tunable Corner Frequency (1Hz to 5kHz)
100:1 Clock-to-Corner Ratio
Single-Supply Operation
+5V (MAX7401)
+3V (MAX7405)
Low Power
2mA (Operating Mode)
0.2µA (Shutdown Mode)
Available in 8-Pin SO/DIP Packages
Low Output Offset: ±5mV
MAX7401/MAX7405
8th-Order, Lowpass, Bessel,
Switched-Capacitor Filters
________________________________________________________________
Maxim Integrated Products
1
OS
OUTVDD
1
2
8
7
CLK
SHDNIN
GND
COM
SO/DIP
TOP VIEW
3
4
6
5
MAX7401
MAX7405
VDD
IN
CLK
OUT
GND
INPUT
0.1µF
0.1µF
CLOCK
SHDN
OUTPUT
VSUPPLY
COM
OS
MAX7401
MAX7405
Typical Operating Circuit
19-4788; Rev 1; 6/99
Pin Configuration
Ordering Information
PART
MAX7401CPA
MAX7401ESA
MAX7401EPA -40°C to +85°C
-40°C to +85°C
0°C to +70°C
TEMP. RANGE PIN-PACKAGE
8 Plastic DIP
8 SO
8 Plastic DIP
MAX7405CSA
MAX7405CPA
MAX7405ESA
MAX7405EPA -40°C to +85°C
-40°C to +85°C
0°C to +70°C
0°C to +70°C 8 SO
8 Plastic DIP
8 SO
8 Plastic DIP
MAX7401CSA 0°C to +70°C 8 SO
MAX7401/MAX7405
8th-Order, Lowpass, Bessel,
Switched-Capacitor Filters
2 _______________________________________________________________________________________
ABSOLUTE MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS—MAX7401
(VDD = +5V, filter output measured at OUT, 10k|| 50pF load to GND at OUT, OS = COM, 0.1µF from COM to GND,
SHDN = VDD, fCLK = 100kHz, TA= TMIN to TMAX, unless otherwise noted. Typical values are at TA= +25°C.)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
VDD to GND
MAX7401..............................................................-0.3V to +6V
MAX7405..............................................................-0.3V to +4V
IN, OUT, COM, OS, CLK ...........................-0.3V to (VDD + 0.3V)
SHDN........................................................................-0.3V to +6V
OUT Short-Circuit Duration...................................................1sec
Continuous Power Dissipation (TA= +70°C)
8-Pin SO (derate 5.88mW/°C above +70°C)................471mW
8-Pin DIP (derate 9.09mW/°C above +70°C)...............727mW
Operating Temperature Ranges
MAX740 _C_A ....................................................0°C to +70°C
MAX740 _E_A .................................................-40°C to +85°C
Storage Temperature Range.............................-65°C to +150°C
Lead Temperature (soldering, 10sec).............................+300°C
COSC = 1000pF (Note 4)
VOS = 0 to (VDD - 1V) (Note 3)
SHDN = GND, VCOM = 0 to VDD
(Note 1)
Input, COM externally driven
fIN = 200Hz, VIN = 4Vp-p,
measurement bandwidth = 22kHz
VIN = VCOM = VDD / 2
VCOM = VDD / 2 (Note 2)
CONDITIONS
29 38 48fOSC
Internal Oscillator Frequency
±0.1 ±10Input Leakage Current at OS ±0.1 ±10Input Leakage Current at COM
50 500CL
10 1RL
Resistive Output Load Drive 10Clock Feedthrough 75 125RCOM
Input Resistance at COM
100:1fCLK /f
C
Clock-to-Corner Ratio 0.001 to 5fC
Corner Frequency
VCOM
1AOS
OS Voltage Gain to OUT
-82THD+N
Total Harmonic Distortion
plus Noise
10Clock-to-Corner Tempco 0.25 VDD - 0.25Output Voltage Range ±5 ±25VOFFSET
Output Offset Voltage
-0.1 0.15 0.3
DC Insertion Gain with
Output Offset Removed
MIN TYP MAX
SYMBOLPARAMETER
VCLK = 0 or 5V
0.5VIL
Clock Input Low VDD - 0.5VIH
Clock Input High ±15 ±30ICLK
Clock Input Current
V
V
µA
kHz
µA
µA
pF
k
mVp-p
k
V
V/V
dB
dB
mV
V
ppm/°C
kHz
UNITS
Maximum Capacitive Load at
OUT
COM Voltage Range
VDD / 2 VDD / 2 VDD / 2
- 0.5 + 0.5
VCOM ±0.1VOS
Input Voltage Range at OS V
VDD / 2 VDD / 2 VDD / 2
- 0.2 + 0.2
FILTER CHARACTERISTICS
CLOCK
Output, COM internally biased
MAX7401/MAX7405
8th-Order, Lowpass, Bessel,
Switched-Capacitor Filters
_______________________________________________________________________________________ 3
ELECTRICAL CHARACTERISTICS—MAX7401 (continued)
(VDD = +5V, filter output measured at OUT, 10k|| 50pF load to GND at OUT, OS = COM, 0.1µF from COM to GND,
SHDN = VDD, fCLK = 100kHz, TA= TMIN to TMAX, unless otherwise noted. Typical values are at TA= +25°C.)
ELECTRICAL CHARACTERISTICS—MAX7405
(VDD = +3V, filter output measured at OUT, 10k|| 50pF load to GND at OUT, OS = COM, 0.1µF from COM to GND,
SHDN = VDD, fCLK = 100kHz, TA= TMIN to TMAX, unless otherwise noted. Typical values are at TA= +25°C.)
CONDITIONS MIN TYP MAX
SYMBOLPARAMETER
Measured at DC
SHDN = GND, CLK driven from 0 to VDD
Operating mode, no load, IN = OS = COM
0.5VSDL
SHDN Input Low VDD - 0.5VSDH
SHDN Input High
60PSRRPower-Supply Rejection Ratio 0.2 1ISHDN
Shutdown Current 2 3.5Supply Current IDD
4.5 5.5VDD
Supply Voltage
V
V
dB
µA
mA
V
UNITS
SHDN Input Leakage Current VSHDN = 0 to VDD ±0.1 ±10 µA
POWER REQUIREMENTS
SHUTDOWN
µA±0.1 ±10VOS = 0 to (VDD - 1V) (Note 3)Input Leakage Current at OS µA±0.1 ±10
SHDN = GND, VCOM = 0 to VDD
Input Leakage Current at COM
Maximum Capacitive
Load at OUT
UNITS
kHz
ppm/°C
V
mV
dB
dB
V/V
V
mVp-p
k
pF
PARAMETER SYMBOL MIN TYP MAX
DC Insertion Gain with
Output Offset Removed -0.1 0.03 0.3
Output Offset Voltage VOFFSET ±5 ±25
Output Voltage Range 0.25 VDD - 0.25
Clock-to-Corner Tempco 10
Total Harmonic Distortion
plus Noise THD+N -84
OS Voltage Gain to OUT AOS 1
Corner Frequency fC0.001 to 5
Clock-to-Corner Ratio fCLK/fC100:1
COM Voltage Range VCOM VDD / 2 VDD / 2 VDD / 2
- 0.1 + 0.1
Clock Feedthrough 10
Resistance Output Load Drive RL10 1
CL50 500
CONDITIONS
VCOM = VDD / 2 (Note 2)
VIN = VCOM = VDD / 2
fIN = 200Hz, VIN = 2.5Vp-p,
measurement bandwidth = 22kHz
(Note 1)
kInput Resistance at COM RCOM 75 125
COM internally biased or externally driven
VInput Voltage Range at OS VOS VCOM ±0.1
FILTER CHARACTERISTICS
MAX7401/MAX7405
8th-Order, Lowpass, Bessel,
Switched-Capacitor Filters
4 _______________________________________________________________________________________
COSC = 1000pF (Note 4)
CONDITIONS
26 34 43fOSC
Internal Oscillator Frequency
MIN TYP MAX
SYMBOLPARAMETER
Measured at DC
SHDN = GND, CLK driven from 0 to VDD
Operating mode, no load, IN = OS = COM
VCLK = 0 or 3V
0.5VSDL
SHDN Input Low VDD - 0.5VSDH
SHDN Input High
60PSRRPower-Supply Rejection Ratio 0.2 1ISHDN
Shutdown Current 2 3.5
2.7 3.6VDD
Supply Voltage
0.5VIL
Clock Input Low VDD - 0.5VIH
Clock Input High ±15 ±30ICLK
Clock Input Current
V
V
dB
µA
V
V
V
µA
kHz
UNITS
SHDN Input Leakage Current VSHDN = 0 to VDD ±0.1 ±10 µA
FILTER CHARACTERISTICSMAX7401/MAX7405
(VDD = +5V for MAX7401, VDD = +3V for MAX7405; filter output measured at OUT; 10k|| 50pF load to GND at OUT; SHDN = VDD;
VCOM = VOS = VDD/2;fCLK = 100kHz; TA = TMIN to TMAX; unless otherwise noted. Typical values are at TA= +25°C.)
Note 1: The maximum fCis defined as the clock frequency, fCLK = 100 ·fC, at which the peak SINAD drops to 68dB with a sinu-
soidal input at 0.2fC.
Note 2: DC insertion gain is defined as VOUT / VIN.
Note 3: OS voltages above VDD - 1V saturate the input and result in a 75µA typical input leakage current.
Note 4: For MAX7401, fOSC (kHz) 38 ·103/ COSC (pF). For MAX7405, fOSC (kHz) 34 ·103/ COSC (pF).
CLOCK
POWER REQUIREMENTS
SHUTDOWN
CONDITIONS UNITS
MIN TYP MAX
PARAMETER
mAIDD
Supply Current
ELECTRICAL CHARACTERISTICS—MAX7405 (continued)
(VDD = +3V, filter output measured at OUT, 10k|| 50pF load to GND at OUT, OS = COM, 0.1µF from COM to GND,
SHDN = VDD, fCLK = 100kHz, TA= TMIN to TMAX, unless otherwise noted. Typical values are at TA= +25°C.)
fIN = 0.5fC-1.0 -0.8 -0.6
fIN = fC-3.3 -3.0 -2.7
fIN = 3fC-33 -29
fIN = 6fC
dB
-79 -74
Insertion Gain Relative to
DC Gain
MAX7401/MAX7405
8th-Order, Lowpass, Bessel,
Switched-Capacitor Filters
_______________________________________________________________________________________ 5
-70
-50
-60
-40
-10
0
-20
-30
10
012345
FREQUENCY RESPONSE
MAX7401 toc01
INPUT FREQUENCY (kHz)
GAIN (dB)
fC = 1kHz
-3.5
-2.5
-3.0
-2.0
-0.5
0
-1.0
-1.5
0.5
0 202 404 606 808 1010
PASSBAND FREQUENCY RESPONSE
MAX7409 toc02
INPUT FREQUENCY (Hz)
GAIN (dB)
fC = 1kHz
1.97
1.99
1.98
2.01
2.00
2.02
2.03
-40 20 40-20 0 60 80 100
SUPPLY CURRENT
vs. TEMPERATURE
MAX7401 toc05
TEMPERATURE (°C)
SUPPLY CURRENT (mA)
NO LOAD
MAX7401
MAX7405
10,000
0.1 0.01 0.1 1 10 100 1000
INTERNAL OSCILLATOR FREQUENCY
vs. COSC CAPACITANCE
1
MAX7401 toc08
COSC CAPACITANCE (nF)
OSCILLATOR FREQUENCY (kHz)
10
100
1000
-20
-15
-10
-5
0
5
10
15
20
2.5 3.53.0 4.0 4.5 5.0 5.5
OFFSET VOLTAGE
vs. SUPPLY VOLTAGE
MAX7401 toc06
SUPPLY VOLTAGE (V)
OFFSET VOLTAGE (mV)
MAX7401
VIN = VCOM = VDD / 2
MAX7405
0.80
0.85
0.90
0.95
1.00
1.05
1.10
1.15
1.20
2.5 3.53.0 4.0 4.5 5.0 5.5
NORMALIZED OSCILLATOR FREQUENCY
vs. SUPPLY VOLTAGE
MAX7401 toc09
SUPPLY VOLTAGE (V)
NORMALIZED OSCILLATOR FREQUENCY
COSC = 390pF
MAX7401
MAX7405
-400
-300
-350
-250
-100
-50
-150
-200
0
0 400 800 1200 1600 2000
PHASE RESPONSE
MAX7401 toc03
INPUT FREQUENCY (Hz)
PHASE SHIFT (DEGREES)
fC = 1kHz
1.5
1.8
1.7
1.6
1.9
2.0
2.1
2.2
2.3
2.4
2.5
2.5 3.53.0 4.0 4.5 5.0 5.5
SUPPLY CURRENT
vs. SUPPLY VOLTAGE
MAX7401 toc04
SUPPLY VOLTAGE (V)
SUPPLY CURRENT (mA)
NO LOAD
MAX7405 MAX7401
-1.5
-1.0
0
-0.5
0.5
1.0
-40 0-20 20 40 60 80 100
OFFSET VOLTAGE vs. TEMPERATURE
MAX7401 toc07
TEMPERATURE (°C)
OFFSET VOLTAGE (mV)
VIN = VCOM = VDD / 2
Typical Operating Characteristics
(VDD = +5V for MAX7401, VDD = +3V for MAX7405; fCLK = 100kHz; SHDN = VDD; VCOM = VOS = VDD / 2; TA= +25°C; unless otherwise
noted.)
MAX7401/MAX7405
8th-Order, Lowpass, Bessel,
Switched-Capacitor Filters
6 _______________________________________________________________________________________
Typical Operating Characteristics (continued)
(VDD = +5V for MAX7401, VDD = +3V for MAX7405; fCLK = 100kHz; SHDN = VDD; VCOM = VOS = VDD / 2; TA= +25°C; unless otherwise
noted.)
-90
-70
-80
-50
-60
-40
-30
-10
-20
0
012
A
B
345
MAX7401
THD PLUS NOISE vs.
INPUT SIGNAL AMPLITUDE
MAX7401 toc11
AMPLITUDE (Vp-p)
THD + NOISE (dB)
NO LOAD
(SEE TABLE A)
-90
-70
-80
-50
-60
-40
-30
-10
-20
0
012345
MAX7401
THD PLUS NOISE vs. INPUT SIGNAL
AMPLITUDE AND RESISTIVE LOAD
MAX7401 toc12
AMPLITUDE (Vp-p)
THD + NOISE (dB)
RL = 500
RL = 1k
RL = 10k
fIN = 200Hz
fC = 1kHz
MEASUREMENT BW = 22kHz
TRACE fIN
(Hz) fC
(kHz)
A 1000 5
B 200 1
fCLK
(kHz)
500
100
MEASUREMENT
BANDWIDTH (kHz)
80
22
Table A. THD Plus Noise vs. Input
Signal Amplitude Test Conditions
-90
-70
-80
-40
-50
-60
-10
-20
-30
0
0 1.00.5 1.5 2.0 2.5 3.0
MAX7405
THD PLUS NOISE vs.
INPUT SIGNAL AMPLITUDE
MAX7401 toc13
AMPLITUDE (Vp-p)
THD + NOISE (dB)
B
NO LOAD
(SEE TABLE A)
A
-90
-70
-80
-40
-50
-60
-10
-20
-30
0
0 1.00.5 1.5 2.0 2.5 3.0
MAX7405
THD PLUS NOISE vs. INPUT SIGNAL
AMPLITUDE AND RESISTIVE LOAD
MAX7401 toc14
AMPLITUDE (Vp-p)
THD + NOISE (dB)
fIN = 200Hz
fC = 1kHz
MEASUREMENT BW = 22kHz
RL = 500
RL = 1k
RL = 10k
MAX7401/MAX7405
8th-Order, Lowpass, Bessel,
Switched-Capacitor Filters
_______________________________________________________________________________________ 7
NAME FUNCTION
1 COM Common Input. Biased internally at mid-supply. Bypass externally to GND with a 0.1µF capacitor. To over-
ride internal biasing, drive with an external supply.
2 IN Filter Input
PIN
3 GND Ground
4 VDD Positive Supply Input: +5V for MAX7401, +3V for MAX7405
8 CLK Clock Input. To override the internal oscillator, connect to an external clock; otherwise, connect an external
capacitor (COSC) from CLK to GND to set the internal oscillator frequency.
7SHDN Shutdown Input. Drive low to enable shutdown mode; drive high or connect to VDD for normal operation.
6 OS Offset Adjust Input. To adjust output offset, bias OS externally. Connect OS to COM if no offset adjustment is
needed. Refer to
Offset and Common-Mode Input Adjustment
section.
5 OUT Filter Output
Pin Description
_______________Detailed Description
The MAX7401/MAX7405 Bessel filters provide low over-
shoot and fast settling responses. Both parts operate
with a 100:1 clock-to-corner frequency ratio and a 5kHz
maximum corner frequency.
Lowpass Bessel filters such as the MAX7401/MAX7405
delay all frequency components equally, preserving the
shape of step inputs (subject to the attenuation of the
higher frequencies). Bessel filters settle quickly—an
important characteristic in applications that use a multi-
plexer (mux) to select an input signal for an analog-to-
digital converter (ADC). An anti-aliasing filter placed
between the mux and the ADC must settle quickly after
a new channel is selected.
Figure 1 shows the difference between Bessel and
Butterworth filters when a 1kHz square wave is applied
to the filter input. With the filter cutoff frequencies set at
5kHz, trace B shows the Bessel filter response and
trace C shows the Butterworth filter response.
Background Information
Most switched-capacitor filters (SCFs) are designed with
biquadratic sections. Each section implements two filter-
ing poles, and the sections are cascaded to produce
higher order filters. The advantage to this approach is
ease of design. However, this type of design is highly
sensitive to component variations if any section’s Q is
high. An alternative approach is to emulate a passive net-
work using switched-capacitor integrators with summing
and scaling. Figure 2 shows a basic 8th-order ladder filter
structure.
A2V/div
2V/div
2V/div
C
A: 1kHz INPUT SIGNAL
B: BESSEL FILTER RESPONSE; fC = 5kHz
C: BUTTERWORTH FILTER RESPONSE; fC = 5kHz
B
200µs/div
Figure 1. Bessel vs. Butterworth Filter Response
L3 L5 L7
C8 R2
C4C2
VIN
+
-V0
L1
R1
C6
Figure 2. 8th-Order Ladder Filter Network
MAX7401/MAX7405
8th-Order, Lowpass, Bessel,
Switched-Capacitor Filters
8 _______________________________________________________________________________________
A switched-capacitor filter such as the MAX7401/
MAX7405 emulates a passive ladder filter. The filter’s
component sensitivity is low when compared to a cas-
caded biquad design because each component affects
the entire filter shape, not just one pole-zero pair. In other
words, a mismatched component in a biquad design will
have a concentrated error on its respective poles, while
the same mismatch in a ladder filter design results in an
error distributed over all poles.
Clock Signal
External Clock
The MAX7401/MAX7405 family of SCFs is designed for
use with external clocks that have a 40% to 60% duty
cycle. When using an external clock with these devices,
drive CLK with a CMOS gate powered from 0 to VDD.
Varying the rate of the external clock adjusts the corner
frequency of the filter as follows:
fC= fCLK / 100
Internal Clock
When using the internal oscillator, connect a capacitor
(COSC) between CLK and ground. The value of the
capacitor determines the oscillator frequency as follows:
where K = 38 for MAX7401 and K = 34 for MAX7405.
Minimize the stray capacitance at CLK so that it does
not affect the internal oscillator frequency. Vary the rate
of the internal oscillator to adjust the filter’s corner fre-
quency by a 100:1 clock-to-corner frequency ratio. For
example, an internal oscillator frequency of 100kHz
produces a nominal corner frequency of 1kHz.
Input Impedance vs. Clock Frequencies
The MAX7401/MAX7405’s input impedance is effectively
that of a switched-capacitor resistor and is inversely pro-
portional to frequency. The input impedance values
determined below represent the average input imped-
ance since the input current is not continuous. As a rule,
use a driver with an output impedance less than 10% of
the filter’s input impedance. Estimate the input imped-
ance of the filter using the following formula:
where fCLK = clock frequency and CIN = 3.37pF.
Low-Power Shutdown Mode
These devices feature a shutdown mode that is activat-
ed by driving SHDN low. In shutdown mode, the filter’s
supply current reduces to 0.2µA (typ) and its output
becomes high impedance. For normal operation, drive
SHDN high or connect to VDD.
___________Applications Information
Offset and Common-Mode
Input Adjustment
The voltage at COM sets the common-mode input volt-
age and is biased at mid-supply with an internal resistor-
divider. Bypass COM with a 0.1µF capacitor and
connect OS to COM. For applications requiring offset
adjustment or DC level shifting, apply an external bias
voltage through a resistor-divider network to OS, as
shown in Figure 3. (Note: Do not leave OS unconnect-
ed.) The output voltage is represented by this equation:
VOUT = (VIN - VCOM) + VOS
with VCOM = VDD / 2 (typical), and where (VIN - VCOM) is
lowpass filtered by the SCF, and VOS is added at the
output stage. See the
Electrical Characteristics
for the
voltage range of COM and OS. Changing the voltage on
COM or OS significantly from mid-supply reduces the fil-
ter’s dynamic range.
Power Supplies
The MAX7401 operates from a single +5V supply, and
the MAX7405 operates from a single +3V supply.
Bypass VDD to GND with a 0.1µF capacitor. If dual sup-
plies are required (±2.5V for MAX7401, ±1.5V for
MAX7405), connect COM to system ground and connect
Z1
f C
IN CLK IN
=
()
f (kHz)
K10
C ; C in pF
OSC 3
OSC OSC
=
VDD
VSUPPLY
IN
CLK
GND
INPUT OUTPUT
50k
50k
50k
OUT
0.1µF
0.1µF
0.1µF
CLOCK
SHDN
COM
OS
MAX7401
MAX7405
Figure 3. Offset Adjustment Circuit
MAX7401/MAX7405
8th-Order, Lowpass, Bessel,
Switched-Capacitor Filters
_______________________________________________________________________________________ 9
GND to the negative supply. Figure 4 shows an example
of dual-supply operation. Single- and dual-supply perfor-
mance are equivalent. For either single- or dual-supply
operation, drive CLK and SHDN from GND (V- in dual-
supply operation) to VDD. For ±5V dual-supply applica-
tions, use the MAX291–MAX297.
Input Signal Amplitude Range
The optimal input signal range is determined by observ-
ing the voltage level at which the total harmonic distor-
tion plus noise (THD+N) is minimized for a given corner
frequency. The
Typical Operating Characteristics
show
graphs of the devices’ THD+N response as the input
signal’s peak-to-peak amplitude is varied. These mea-
surements are made with OS and COM biased at mid-
supply.
Anti-Aliasing and Post-DAC Filtering
When using the MAX7401/MAX7405 for anti-aliasing or
post-DAC filtering, synchronize the DAC and the filter
clocks. If the clocks are not synchronized, beat frequen-
cies may alias into the passband.
The high clock-to-corner frequency ratio (100:1) also
eases the requirements of pre- and post-SCF filtering. At
the input, a lowpass filter prevents the aliasing of fre-
quencies around the clock frequency into the passband.
At the output, a lowpass filter attenuates the clock
feedthrough.
A high clock-to-corner frequency ratio allows a simple
RC lowpass filter, with the cutoff frequency set above
the SCF corner frequency, to provide input anti-aliasing
and reasonable output clock attenuation.
Harmonic Distortion
Harmonic distortion arises from nonlinearities within the
filter. These nonlinearities generate harmonics when a
pure sine wave is applied to the filter input. Table 1 lists
the MAX7401/MAX7405’s typical harmonic-distortion
values with a 10kload at TA= +25°C.
VDD
V+
V-
IN
CLK
GND
INPUT OUTPUTOUT
0.1µF
CLOCK
*DRIVE SHDN TO V- FOR LOW-POWER SHUTDOWN MODE.
SHDN
COM
OS
0.1µF
MAX7401
MAX7405
*
V+
V-
Figure 4. Dual-Supply Operation
5th
3rd
-92-79
-93-83
500
100
fCLK
(kHz) 4th
2nd
-92
-90
TYPICAL HARMONIC DISTORTION (dB)
-89
-91
4
5
1
MAX7401
VIN
(Vp-p)
fC
(kHz)
FILTER
1000
200
fIN
(Hz)
Table 1. Typical Harmonic Distortion
TRANSISTOR COUNT: 1116
Chip Information
-88-82
-88-83
500
100
-88
-87
-83
-87
2
5
1
MAX7405 1000
200
MAX7401/MAX7405
8th-Order, Lowpass, Bessel,
Switched-Capacitor Filters
10 ______________________________________________________________________________________
________________________________________________________Package Information
SOICN.EPS
MAX7401/MAX7405
8th-Order, Lowpass, Bessel,
Switched-Capacitor Filters
______________________________________________________________________________________ 11
Package Information (continued)
PDIPN.EPS
MAX7401/MAX7405
8th-Order, Lowpass, Bessel,
Switched-Capacitor Filters
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
12
____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600
© 1999 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.
NOTES