EVALUATION KIT AVAILABLE MAX9611/MAX9612 High-Side, Current-Sense Amplifiers with 12-Bit ADC and Op Amp/Comparator General Description The MAX9611/MAX9612 are high-side current-sense amplifiers with an integrated 12-bit ADC and a gain block that can be configured either as an op amp or comparator, making these devices ideal for a number of industrial and automotive applications. The high-side, current-sense amplifiers operate over a wide 0V to 60V input common-mode voltage range. The programmable full-scale voltage (440mV, 110mV, and 55mV) of these amplifiers offers wide dynamic range, accurate current measurement, and application flexibility in choosing sense resistor values. A choice of either an internal op amp or a comparator is provided to the user. The internal amplifier can be used to limit the inrush current or to create a current source in a closed-loop system. The comparator can be used to monitor fault events for fast response. An I2C-controlled 12-bit, 500sps analog-to-digital converter (ADC) can be used to read the voltage across the sense resistor (VSENSE), the input common-mode voltage (VRSCM), op-amp/comparator output (VOUT), op-amp/ comparator reference voltage (VSET), and internal die temperature. The I2C bus is compatible with 1.8V and 3.3V logic, allowing modern microcontrollers to interface to it. The MAX9611 features a noninverting input-to-output configuration while the MAX9612 features an inverting input-to-output configuration. The MAX9611/MAX9612 operate with a 2.7V to 5.5V supply voltage range, are fully specified over the -40C to +125C automotive temperature range, and are available in a 3mm x 5mm, 10-pin MAX(R) package. Applications Hybrid Automotive Power Supplies Server Backplanes Base-Station PA Control Base-Station Feeder Cable Bias-T Telecom Cards Battery-Operated Equipment Features 0V to +60V Input Common-Mode Voltage Range 2.7V to 5.5V Power-Supply Range, Compatible with 1.8V and 3.3V Logic 5A Software Shutdown Current Integrated 12-Bit ADC 13V Current-Sense ADC Resolution 500V (max) Current-Sense ADC Input Offset Voltage 0.5% (max) Current-Sense ADC Gain Error I2C Bus with 16 Addresses Small, 3mm x 5mm 10-Pin MAX Package -40C to +125C Operating Temperature Range Ordering Information/Selector Guide PART OUTPUT MAX9611AUB+ Noninverting 10 MAX MAX9612AUB+ Inverting 10 MAX Note: All devices operate over the -40C to +125C temperature range. +Denotes a lead(Pb)-free/RoHS-compliant package. Typical Application Circuit RSENSE 0V TO 60V VIN 0.1F RS+ RS- 19-5543; Rev 4; 6/14 LOAD A0 VCC MAX9611 A1 MAX9612 OUT C SET SCL SCL SDA SDA 1.8V LOGIC GND MAX is a registered trademark of Maxim Integrated Products, Inc. PIN-PACKAGE Functional Diagrams appear at end of data sheet. MAX9611/MAX9612 High-Side, Current-Sense Amplifiers with 12-Bit ADC and Op Amp/Comparator Absolute Maximum Ratings VCC to GND.............................................................-0.3V to +6V RS+, RS-, OUT to GND.........................................-0.3V to +65V Differential Input Voltage, RS+ - RS-...................................65V All Other Pins to GND..............................................-0.3V to +6V OUT Short-Circuit to GND..........................................Continuous Continuous Current into Any Pin.......................................20mA Continuous Power Dissipation (TA = +70C) 10-Pin MAX (derate 8.8mW/C above +70C)...........707mW MAX Package Junction-to-Ambient Thermal Resistance (JA) (Note 1)..............................13C/W Operating Temperature Range.......................... -40C to +125C Junction Temperature.......................................................+150C Storage Temperature Range............................. -65C to +150C Lead Temperature (soldering, 10s).................................. +300C Soldering Temperature (reflow)........................................+260C Note 1: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer board. For detailed information on package thermal considerations, refer to www.maximintegrated.com/thermal-tutorial. Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Electrical Characteristics (VCC = 3.3V, VRS+ = VRS- = +12V, VSENSE = (VRS+ - VRS-) = 0V, TA = -40C to +125C, unless otherwise noted. Typical values are at TA = +25C.) (Note 2) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS 60 V TA = +25C, gain = 8x 0.045 0.5 TA = +25C, gain = 4x 0.045 0.5 TA = +25C, gain = 1x 0.1 TA = +25C, gain = 8x 0.1 CURRENT-SENSE AMPLIFIER DC CHARACTERISTICS Input Common-Mode Range Guaranteed by CMRR TA = -40C to +125C, gain = 8x Input Offset Voltage ADC Path (Note 3) VOS TA = -40C to +125C, gain = 4x TA = -40C to +125C, gain = 1x 0 2 2 Gain Error (Note 3) GE Differential Input Resistance Common-Mode Input Resistance Input Bias Current Input Offset Current (Note 4) www.maximintegrated.com RINDM RINCM IRS+, IRS(IRS+) - (IRS-) 2.5 0.4 TA = +25C, gain = 1x 1 TA = -40C to +125C, gain = 1x % 4 4.7 300 k 12 M 1 TA = +25C 3 TA = -40C to +125C 1.7 3.1 TA = +25C TA = -40C to +125C 0.5 1.8 TA = +25C, gain = 4x TA = -40C to +125C, gain = 4x 0.8 2.6 TA = -40C to + 85C, gain = 8x TA = -40C to +125C, gain = 8x mV 2 5 6 6 A nA Maxim Integrated 2 MAX9611/MAX9612 High-Side, Current-Sense Amplifiers with 12-Bit ADC and Op Amp/Comparator Electrical Characteristics (continued) (VCC = 3.3V, VRS+ = VRS- = +12V, VSENSE = (VRS+ - VRS-) = 0V, TA = -40C to +125C, unless otherwise noted. Typical values are at TA = +25C.) (Note 2) PARAMETER SYMBOL CONDITIONS VRS- = 0V to 60V, TA = +25C Common-Mode Rejection Ratio CMRR VRS- = 0V to 60V, TA = -40C to +125C Power-Supply Rejection Ratio Full-Scale Sense Voltage PSRR FS VCC = 2.7V to 5.5V Used in gain error measurement MIN TYP Gain = 8x, VSENSE = 50mV 106 120 Gain = 4x, VSENSE = 100mV 106 120 Gain = 1x, VSENSE =400mV 100 120 Gain 8x, VSENSE = 50mV 94 Gain 4x, VSENSE = 100mV 94 Gain 1x, VSENSE = 400mV 84 Gain = 8x, VSENSE = 50mV 57 72 Gain = 4x, VSENSE = 100mV 56 67 Gain = 1x, VSENSE = 400mV 48 57 LSB UNITS dB Gain = 8x 55 Gain = 4x 110 Gain = 1x 440 Gain = 8x LSB Step Size MAX dB mV 13.44 Gain = 4x 26.88 Gain = 1x 107.50 V ANALOG PATH, CSA + AMPLIFIER/COMPARATOR Input Offset Voltage SET Input Bias Current VOS IB TA = +25C TA = -40C to +125C Maximum SET Input Voltage Range Signal Bandwidth Gain Bandwidth Propagation Delay Internal Hysteresis Output Sink Current BW GBW tPD VHYS Output Leakage Current Output Voltage Low www.maximintegrated.com VOL Gain = 1x, RS- = 11.6V In comparator mode, 10mV overdrive 0.350 4 10 1 50 mV nA 1.126 V 4 MHz 2.5 MHz 1.5 s In comparator mode, nonlatching 8 mV VOUT = 4V 15 mA VOUT = 36V 1.7 ISINK = 8mA, TA = -40C to +125C 0.5 ISINK = 8mA, TA = -40C to +85C 3 1 1.5 A V Maxim Integrated 3 MAX9611/MAX9612 High-Side, Current-Sense Amplifiers with 12-Bit ADC and Op Amp/Comparator Electrical Characteristics (continued) (VCC = 3.3V, VRS+ = VRS- = +12V, VSENSE = (VRS+ - VRS-) = 0V, TA = -40C to +125C, unless otherwise noted. Typical values are at TA = +25C.) (Note 2) PARAMETER SYMBOL CONDITIONS MIN OUT VOLTAGE MEASUREMENT (VOUT) Full-Scale Input Voltage LSB Step Size LSB Gain Error GE Input Offset Voltage VOSOUT VRSCM = (VRS+ - VRS-)/2 TA = +25C TA = +25C TA = -40C to +125C Gain Error GE Input Offset Voltage VOSOUT SET VOLTAGE MEASUREMENT (VSET) 6 14 110 TA = -40C to +125C VRSCM = (VRS+ - VRS-)/2 160 TA = +25C TA = +25C % mV 57.3 V 14 mV 0.3 TA = -40C to +125C UNITS V mV 7 Full-Scale Input Voltage LSB MAX 57.3 14 0.8 COMMON-MODE VOLTAGE MEASUREMENT (VRSCM) LSB Step Size TYP 6 7 14 80 TA = -40C to +125C 160 % mV Full-Scale Input Voltage 1.10 V LSB Step Size 268 V Gain Error Input Offset Voltage GE VOSOUT Integral Nonlinearity INL Differential Nonlinearity DNL VRSCM = (VRS+ - VRS-)/2 TA = +25C TA = +25C 0.2 TA = -40C to +125C 5 6 0.3 TA = -40C to +125C 10 14 % mV 1 LSB 0.2 LSB TEMPERATURE MEASUREMENT Accuracy 0.48 Typical Measurement Range LSB Step Size C -40 LSB +125 0.48 C C ANALOG-TO-DIGITAL CONVERTER Resolution 12 Bit Conversion Time 2 ms SCL/SDA LOGIC LEVELS Input Voltage Low Input Voltage High Input Hysteresis Input Leakage Current VIL VIH VHYS VCC = 2.7V to 5.5V VCC = 2.7V to 5.5V 0.4 1.45 V V 0.05 x VCC 1 V 200 nA A1/A0 LOGIC LEVELS Logic State 00-01 Threshold Logic State 01-10 Threshold Logic State 10-11 Threshold Input Leakage Current www.maximintegrated.com 1/4 x VCC V 1/2 x VCC 3/4 x VCC 1 V V 200 nA Maxim Integrated 4 MAX9611/MAX9612 High-Side, Current-Sense Amplifiers with 12-Bit ADC and Op Amp/Comparator Electrical Characteristics (continued) (VCC = 3.3V, VRS+ = VRS- = +12V, VSENSE = (VRS+ - VRS-) = 0V, TA = -40C to +125C, unless otherwise noted. Typical values are at TA = +25C.) (Note 2) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS POWER-SUPPLY CHARACTERISTICS Power-Supply Input Range VCC Quiescent Current Guaranteed by PSRR 2.7 ICC Shutdown Current ISHDN No activity on SCL 2 I C TIMING CHARACTERISTICS (COMPATIBLE WITH SMBus) Serial-Clock Frequency Bus Free Time Between a STOP and a START Condition Hold Time, (Repeated) START Condition SCL Clock Low Period 5.5 V 1.6 2.6 mA 5 10 A 400 kHz fSCL 0 tBUF 1.3 s tDH,STA 0.6 s tLOW 1.3 s tHIGH 0.6 s Setup Time for a Repeated START Condition tSU,STA 0.6 s Data Hold Time tDH,DAT SCL Clock High Period Data Setup Time tSU,DAT SDA/SCL Receiving Rise Time SDA/SCL Receiving Fall Time tR (Note 5) tF (Note 5) tF SDA Transmitting Fall Time STOP Condition Setup Time 0 (Note 5) 300 20 + 0.1CB 250 Pulse Width of Spike Suppressed 300 0.6 CB ns s 400 tSP s ns 20 + 0.1CB 20 + 0.1CB tSU,STO Bus Capacitance 900 100 50 pF ns Note 2: All devices are 100% production tested at TA = +25C. Temperature limits are guaranteed by design. Note 3: VOS and gain error of current-sense amplifier extrapolated from a two-point measurement made at VSENSE = (VRS+ - VRS-) = 5mV to 50mV in gain of 8x, 5mV to 100mV in gain of 4x, and 10mV to 400mV in gain of 1x. Note 4: Guaranteed by design. Note 5: CB is in pF. I2C Timing Diagram SDA tSU,STA tSU,DAT tLOW tHD,DAT tHD,STA tBUF tSU,STO tHIGH SCL tHD,STA START CONDITION www.maximintegrated.com tR tF REPEATED START CONDITION STOP CONDITION START CONDITION Maxim Integrated 5 MAX9611/MAX9612 High-Side, Current-Sense Amplifiers with 12-Bit ADC and Op Amp/Comparator Typical Operating Characteristics (VCC = 3.3V, VCM = 12V, TA = +25C, unless otherwise noted.) 500 TA = +85C 300 VOS (V) 200 100 10 TA = -40C -100 5 300 240 180 10 20 30 40 ADC PATH GAIN = 8x 10 20 30 40 50 60 TOTAL OFFSET VOLTAGE vs. SUPPLY VOLTAGE 800 OP-AMP PATH 700 600 VOS (V) 0 -50 -100 500 400 -150 300 -200 5 3.0 3.5 4.0 4.5 5.0 200 5.5 2.5 3.0 3.5 4.0 4.5 5.0 VCC (V) VCC (V) RS- BIAS CURRENT vs. COMMON-MODE VOLTAGE RS+, RS- OFFSET CURRENT vs. COMMON-MODE VOLTAGE TA = +85C 4 TA = -40C TA = +125C 2 2.0 IOFFSET (nA) TA = +25C 3 2.5 MAX9611 toc06 2.5 1 5.5 MAX9611 toc07 VOS (V) 0 TA = +125C VCM (V) 50 IBIAS (mA) -4 60 50 CSA OFFSET VOLTAGE vs. SUPPLY VOLTAGE 100 0 TA = +85C -3 VCM (V) 150 -250 0 MAX9611 toc05 120 0 60 -60 -120 -180 -240 -300 0 VOFFSET_CSA (V) 200 TA = -40C TA = +25C 1 -2 TA = +25C -200 -300 ANALOG PATH 3 -1 0 MAX9611 toc04 COUNTS 15 4 2 400 20 0 TA = +125C TOTAL OFFSET VOLTAGE vs. COMMON-MODE VOLTAGE MAX9611 toc03 25 8x ADC PATH 600 VOS (mV) GAIN = 8x MAX9611 toc02 700 MAX9611 toc01 30 MAX9611 CSA OFFSET VOLTAGE vs. COMMON-MODE VOLTAGE CSA HISTOGRAM 1.5 1.0 0.5 0 10 20 30 VCM (V) www.maximintegrated.com 40 50 60 0 0 10 20 30 40 50 60 VCM (V) Maxim Integrated 6 MAX9611/MAX9612 High-Side, Current-Sense Amplifiers with 12-Bit ADC and Op Amp/Comparator Typical Operating Characteristics (continued) (VCC = 3.3V, VCM = 12V, TA = +25C, unless otherwise noted.) 0.40 0.2 GAIN ERROR (%) GAIN ERROR (%) TA = +25C 0.20 0 -0.20 TA = +85C -0.40 TA = +125C -0.60 0 10 20 30 40 -0.2 -0.4 50 -1.0 60 0.02 0.01 0 10 20 30 40 0 60 50 0 0.5 VCM (V) MAX9611 toc11 2.0 ICC (mA) 2.0 1.5 2.0 2.5 3.0 SUPPLY CURRENT vs. SUPPLY VOLTAGE 1.7 3.0 2.5 1.0 SDA SINKING CURRENT (mA) OUTPUT LOW VOLTAGE vs. OUTPUT SINK CURRENT 3.5 OUTPUT LOW VOLTAGE (V) 0.03 -0.6 VCM (V) 4.0 0.04 0 -0.8 -0.80 -1.00 0.05 MAX9611 toc10 TA = -40C 0.60 ANALOG PATH SDA/SCL VOL vs. SINKING CURRENT MAX9611 toc12 0.80 0.4 SDA VOL (V) 8x ADC PATH MAX9611 toc08 1.00 TOTAL GAIN ERROR vs. COMMON-MODE VOLTAGE MAX9611 toc09 MAX9611 CSA GAIN ERROR vs. COMMON-MODE VOLTAGE 1.5 1.0 1.4 1.1 0.8 0.5 0 0 5 10 15 0.5 20 2.5 3.0 3.5 CSA GAIN vs. FREQUENCY (RS+/RS- TO OUT PATH) 5 10 5 5.5 0 GAIN (dB) 0 GAIN (dB) 5.0 MAX9611 toc14 15 MAX9611 toc13 10 -5 -10 -5 -10 -15 -15 -20 -20 -30 4.5 OP-AMP GAIN vs. FREQUENCY (SET TO OUT) 15 -25 4.0 VCC (V) OUTPUT SINK CURRENT (mA) RS+ - RS- = VSENSE + VDC = 200mVP-P + 300mV 1 10 100 1,000 FREQUENCY (kHz) www.maximintegrated.com 10,000 RS+ - RS- = 220mV VIN = 100mVP-P -25 -30 1 10 100 1,000 10,000 FREQUENCY (kHz) Maxim Integrated 7 MAX9611/MAX9612 High-Side, Current-Sense Amplifiers with 12-Bit ADC and Op Amp/Comparator Typical Operating Characteristics (continued) (VCC = 3.3V, VCM = 12V, TA = +25C, unless otherwise noted.) CMRR vs. FREQUENCY CSA ADC PATH -20 -80 -60 -80 NOISE (5V/div) -85 CMRR (dB) -90 -95 -100 -105 -100 -110 -120 -115 100 1000 -120 0.01 0.1 1 10 100 INTEGRAL NONLINEARITY vs. DIGITAL OUTPUT CODE (SET INPUT) 0.3 0.1 1.0 0.8 0.6 0.4 -0.3 0.2 DNL (LSB) -0.1 -0.5 -0.7 0 -0.2 -0.4 -0.9 -0.6 -1.1 -0.8 -1.3 -1.5 -1.0 0 512 1024 1536 2048 2560 3072 3584 4096 ADC NOISE HISTOGRAM ON VSET = 0.5V 800 600 500 500 N 700 400 400 300 300 200 200 100 100 0 0 www.maximintegrated.com ADC NOISE HISTOGRAM ON VSENSE = 20mV (GAIN = 8x) 800 600 DIGITAL CODE 512 1024 1536 2048 2560 3072 3584 4096 900 700 1876 1877 1878 1879 1880 1881 1882 1883 1884 1885 1886 1887 1888 1889 1890 N 1000 MAX9611 toc20 900 0 DIGITAL CODE DIGITAL CODE 1000 TIME (10s/div) DIFFERENTIAL NONLINEARITY vs. DIGITAL OUTPUT CODE (SET INPUT) MAX9611 toc18 0.5 INL (LSB) 1000 FREQUENCY (kHz) FREQUENCY (kHz) MAX9611 toc19 10 MAX9611 toc21 1 1515 1516 1517 1518 1519 1520 1521 1522 1523 1524 1525 1526 1527 1528 CMRR (dB) MAX9611 toc17 -75 -40 -140 P-P NOISE (RS+/RS- TO OUT) MAX9611 toc16 VCM = 12V VAC = 10VP-P -70 MAX9611 toc15 0 CMRR vs. FREQUENCY ANALOG OP-AMP PATH DIGITAL CODE Maxim Integrated 8 MAX9611/MAX9612 High-Side, Current-Sense Amplifiers with 12-Bit ADC and Op Amp/Comparator Typical Operating Characteristics (continued) (VCC = 3.3V, VCM = 12V, TA = +25C, unless otherwise noted.) HOT-SWAP OPERATION WITH p-CHANNEL FET MODE 000 WATCHDOG LATCH RETRY MODE 111 MAX9611 toc22 MAX9611 toc24 DTIM = 0, RTIM = 1 VSET = 600mV PULSE WIDTH > 1ms DTIM = 0, RTIM = 0 VSET = 600mV PULSE WIDTH < 1ms VOLTAGE (5V/div) VPULLUP VOLTAGE (5V/div) WATCHDOG LATCH RETRY MODE 111 MAX9611 toc23 VOUT (UNREGULATED) VOUT (REGULATED) VCSAIN 200mV/div VOUT 5V/div VCSAIN 200mV/div VOUT 5V/div ROUT = 8 TIME (100s/div) TIME (400s/div) WATCHDOG LATCH MODE 111 MAX9611 toc25 TIME (4ms/div) WATCHDOG LATCH MODE 111 MAX9611 toc26 200mV/div VCSAIN VCSAIN VOUT 200mV/div 10V/div 5V/div DTIM = 1, RTIM = 1 VSET = 600mV PULSE WIDTH > 1ms VOUT TIME (100s/div) DTIM = 0, RTIM = 1 VSET = 600mV PULSE WIDTH > 1ms TIME (1ms/div) WATCHDOG LATCH RETRY MODE 111 MAX9611 toc27 DTIM = 0, RTIM = 0 VSET = 600mV PULSE WIDTH > 1ms WATCHDOG LATCH RETRY MODE 111 MAX9611 toc28 VCSAIN DTIM = 0, RTIM = 1 VSET = 600mV PULSE WIDTH > 1ms 200mV/div VCSAIN 200mV/div VOUT 5V/div VOUT TIME (10ms/div) www.maximintegrated.com 5V/div TIME (10ms/div) Maxim Integrated 9 MAX9611/MAX9612 High-Side, Current-Sense Amplifiers with 12-Bit ADC and Op Amp/Comparator Pin Configuration TOP VIEW OUT 1 + 10 VCC 9 A0 8 A1 4 7 SDA 5 6 SCL RS+ 2 RS- 3 SET GND MAX9611 MAX9612 MAX Pin Description PIN NAME 1 OUT Internal Amplifier/Comparator Output 2 RS+ Positive Current-Sensing Input. Power side connects to external sense resistor. 3 RS- Negative Current-Sensing Input. Load side connects to external sense resistor. 4 SET External Set-Point Voltage 5 GND Ground 6 SCL I2C Interface Clock Input 7 SDA I2C Interface Data Input/Output 8 A1 Address Input 1 9 A0 Address Input 0 10 VCC www.maximintegrated.com FUNCTION Supply Voltage Input. Bypass VCC to GND with a 0.1F and a 4.7F capacitor in parallel. Maxim Integrated 10 MAX9611/MAX9612 High-Side, Current-Sense Amplifiers with 12-Bit ADC and Op Amp/Comparator Functional Diagrams RS+ VCC RS- CSA MAX9611 2.5x OUT OP AMP/ COMP 1x, 4x, 8x A0 DECODER MUX TEMP RS+ SET GND RS- VCC 12-BIT ADC I 2C REGISTERS A1 SCL SDA CSA MAX9612 2.5x OUT OP AMP/ COMP 1x, 4x, 8x A0 DECODER MUX TEMP SET 12-BIT ADC I 2C REGISTERS A1 SCL SDA GND NOTE: ANALOG PATH IN BOLD. www.maximintegrated.com Maxim Integrated 11 MAX9611/MAX9612 High-Side, Current-Sense Amplifiers with 12-Bit ADC and Op Amp/Comparator Detailed Description nates input stage crossover distortion, typical in most rail-to-rail input current-sense amplifiers. Low input bias currents and low input offset currents allow a wide selection of input filters to be designed without degrading the accuracy of the current-sense amplifier. The MAX9611/MAX9612's high-side, current-sense amplifiers operate over a wide 0V to 60V input commonmode voltage range. The programmable full-scale voltage (440mV, 110mV, and 55mV) allows for a wide dynamic range current measurement and application flexibility in choosing sense resistor values. The current-sense amplifier inputs feature both a -0.3V/+65V common-mode absolute maximum rating as well as a 65V differential absolute maximum rating, allowing a wide variety of fault conditions to be withstood easily by the device without damage. The MAX9611/MAX9612 are high-side, current-sense amplifiers with an integrated 12-bit ADC and an internal selectable op amp/comparator. These devices are ideal for a variety of industrial and automotive applications. The I2C bus is 1.8V and 3.3V logic compatible and can interface with modern microcontrollers. An internal 12-bit, 500sps integrating analog-to-digital converter (ADC) allows the user to read analog signals such as die temperature, VOUT, VSET, VRSCM, and VSENSE. At power-up, the selectable op-amp/comparator block is configured in the op-amp mode. The op amp has an effective 60V Class A-type output stage and can be used to limit inrush currents and create a current source when used in a closed-loop system. When the internal comparator is selected, the MAX9611/MAX9612 can be configured to have a latched and retry functionality, allowing a 60V open-drain transistor output, ideal to operate high-side relay-disconnect FETs. The MAX9611 has a noninverting input-to-output configuration while the MAX9612 has an inverting input-to-output configuration. Current-Sense Amplifier The MAX9611/MAX9612 feature a precision currentsense amplifier with a 0V to 60V input common-mode voltage range. An internal negative charge pump elimi- The current-sense amplifier has a gain of 2.5V/V and connects directly to the output op-amp/comparator inputs. The ADC path features a 1x, 4x, and 8x programmable gain providing for 440mV, 110mV, and 55mV full-scale sense voltage. Analog-to-Digital Converter (ADC) The MAX9611/MAX9612 feature an internal dual-slope integrating 12-bit ADC that has a 2ms conversion time and a 1.8V and 3.3V logic-compatible I2C bus. An internal mux allows the following on-chip variables to be read: input sense voltage, input common-mode voltage, SET voltage, OUT voltage, and die temperature. Temperature Measurement Die temperature can be read by the ADC over the entire operating range (-40C to +125C) with 0.5C resolution. Die temperature can be used for application calibration and thermal monitoring and is available in a 9-bit, two's complement format. Readings outside of normal operating temperature range (-40C to +125C) are inaccurate and should be considered invalid. See Table 1 for binary and hex values. Table 1. Binary and Hex Digital Output Values for Temperature Measurements TEMPERATURE (C) DIGITAL OUTPUT BINARY HEX +122.4 0111 1111 1xxx xxxx 7F8x +24 0001 1001 0xxx xxxx 190x +0.48 0000 0000 1xxx xxxx 008x 0 0000 0000 0xxx xxxx 000x -0.48 1111 1111 1xxx xxxx FF8x -24 1110 0111 0xxx xxxx E70x -40 1101 1001 1xxx xxxx D98x www.maximintegrated.com Maxim Integrated 12 MAX9611/MAX9612 High-Side, Current-Sense Amplifiers with 12-Bit ADC and Op Amp/Comparator SET Voltage Measurement Watchdog/Latch/Retry Functionality The SET voltage serves as a reference voltage for the internal op amp or comparator around which a control loop can be designed. The low bias current for SET allows high-impedance resistor-dividers and current output DACs to be used, making it easy to interface without introducing additional errors. Internal digital circuitry is used to implement a watchdog feature that can be useful to handle normal application transients that are not true fault conditions. This feature applies both to the op amp and comparator modes of part operation. A watchdog delay time is internally set to 1ms by default but can be changed to 100s. The retry delay time is internally set to 50ms by default, but can be changed to 10ms (see Tables 6 and 7). The SET input can also serve as an auxiliary input port to the ADC if the op amp or comparator is not utilized in the application. Its full-scale input range extends from 0V to 1.10V. OUT Voltage Measurement The internal amplifier/comparator output voltage can be monitored over the entire 0V to 57.3V range by the ADC. An internal high-value resistor-divider on OUT reduces leakage current effects. Common-Mode Voltage Measurement The input common-mode voltage is defined as the average of the voltage at RS+ and RS-. A high-value resistordivider allows measurement of the input common-mode voltage over the 0V to 57.3V range. Sense Voltage Measurement Three programmable gains allow for a wide range of currents to be read by the ADC. The current-sense amplifier gain can be set to 1x, 4x, or 8x. The full-scale sense voltages are then 440mV, 110mV, and 55mV, respectively. Output Amplifier/Comparator The MAX9611/MAX9612 feature an internally selectable op amp and comparator where one of the inputs is connected to the 2.5x current-sense amplifier, and the other input is connected to the SET input. The op amp or the comparator output can be selected and connected to OUT. The output stage is an open-drain 60V nFET, that requires a suitable pullup resistor for proper operation. The op amp then behaves like a Class-A output stage. Select op amp or comparator function in Control Register 1 (0x0A) bit 7 (see Tables 4 and 5). www.maximintegrated.com In normal operation mode, (Control Register 1 (0x0A) 000x xxxx), the amplifier output responds to the difference between its inputs, i.e., the CSA output voltage and the SET voltage. In open-loop configuration, the op amp can be used as a comparator. In a watchdog-latch-retry mode (Control Register 1 (0x0A) 111x xxxx), the output of the comparator waits for a watchdog delay time (to ensure the CSA output continues to stay above the SET voltage for this duration) before responding, and then latches onto this state. After a retry delay time, it resets the comparator state and the cycle repeats. Similar functionality is implemented for the op-amp mode as well (Control Register 1 (0x0A) 000x xxxx to 011x xxxx). A RESET bit is defined in Control Register 1 (0x0A) to reset a latched state when commanded by the user. I2C Interface The MAX9611/MAX9612 I2C interface consists of a serial-data line (SDA) and serial-clock line (SCL). SDA and SCL facilitate bidirectional communication between the MAX9611/MAX9612 and the master at rates up to 400kHz. The MAX9611/MAX9612 are slave devices that transfer and receive data. The master (typically a microcontroller) initiates data transfer on the bus and generates the SCL signal to permit that transfer. Maxim Integrated 13 MAX9611/MAX9612 High-Side, Current-Sense Amplifiers with 12-Bit ADC and Op Amp/Comparator I2C Read Operation Slave Address A bus master initiates communication with a slave device by issuing a START (S) condition followed by a slave address. When idle, the MAX9611/MAX9612 continuously wait for a START condition followed by their slave address. When the MAX9611/MAX9612 recognize a slave address, it is ready to accept or send data. The MAX9611/MAX9612 offer 16 different slave addresses using two address inputs, A1 and A0. See Table 2 for different slave address options. The least significant bit (LSB) of the address byte (R/W) determines whether the master is writing to or reading from the MAX9611/ MAX9612 (R/W = 0 selects a write condition, R/W = 1 selects a read condition). After receiving the address, the MAX9611/MAX9612 (slave) issue an acknowledge by pulling SDA low for one clock cycle. I2C Write Operation A write operation (Figure 1) begins with the bus master issuing a START condition followed by seven address bits and a write bit (R/W = 0). If the address byte is successfully received, the MAX9611/MAX9612 (slave) issue an acknowledge (A). The master then writes to the slave and the sequence is terminated by a STOP (P) condition for a single write operation. For a burst write operation, more data bytes are sent after the register address before the transaction is terminated. Table 2. MAX9611/MAX9612 Address Description A0 DEVICE WRITE ADDRESS (hex) DEVICE READ ADDRESS (hex) 0 0 0xE0 0xE1 0 1/3 x VCC 0xE2 0xE3 2/3 x VCC 0xE4 0xE5 VCC 0xE6 0xE7 0 0xE8 0xE9 1/3 x VCC 1/3 x VCC 0xEA 0xEB 0xEC 0xED 1/3 x VCC 2/3 x VCC VCC 0xEE 0xEF 0 0xF0 0xF1 2/3 x VCC 1/3 x VCC 0xF2 0xF3 0xF4 0xF5 2/3 x VCC 2/3 x VCC VCC 0xF6 0xF7 0 0xF8 0xF9 A1 0 0 1/3 x VCC 1/3 x VCC 2/3 x VCC 2/3 x VCC VCC VCC 1/3 x VCC VCC VCC VCC 2/3 x VCC www.maximintegrated.com 0xFA 0xFB 0xFC 0xFD 0xFE 0xFF In an I2C read operation (Figure 2), the bus master issues a write command first by initiating a START condition followed by seven address bits, a write bit (R/W = 0) and the 8-bit register address. The master then issues a Repeated START (Sr) condition, followed by seven address bits, a read bit (R/W = 1). If the address byte is successfully received, the MAX9611/MAX9612 (slave) issue an acknowledge (A). The master then reads from the slave. For continuous read, the master issues an acknowledge bit (AM) after each received byte. The master terminates the read operation by sending a not acknowledge (NA) bit. The MAX9611/MAX9612 then release the data line SDA allowing the master to generate a STOP condition. SINGLE WRITE ACKNOWLEDGE FROM MAX9611/MAX9612 S SLAVE ADDRESS A DATA 0 A REGISTER ADDRESS R/W BURST WRITE A P STOP ACKNOWLEDGE FROM MAX9611/MAX9612 A REGISTER ADDRESS DATA 1 A DATA 2 DATA 3 A DATA N S SLAVE ADDRESS A A 0 R/W A P STOP Figure 1. I2C Write Operation SINGLE READACKNOWLEDGE FROM MAX9611/MAX9612 S SLAVE ADDRESS A Sr REGISTER ADDRESS 0 A R/W SLAVE ADDRESS 1 A R/W BURST READ ACKNOWLEDGE FROM MAX9611/MAX9612 S SLAVE ADDRESS A Sr REPEAT START AM AM P ACKNOWLEDGE FROM FROM MASTER 0 A R/W SLAVE ADDRESS DATA REGISTER ADDRESS 1 A DATA R/W DATA AM DATA N NA P NO READ-ACKNOWLEDGE FROM MASTER Figure 2. I2C Read Operation Maxim Integrated 14 MAX9611/MAX9612 High-Side, Current-Sense Amplifiers with 12-Bit ADC and Op Amp/Comparator Registers The two control registers are read/write registers used to configure the ADC for different modes of operation. The MAX9611/MAX9612 include five 12-bit data register banks and two 8-bit control registers. Table 3 lists all the registers, their corresponding POR values and their addresses. Table 3. Internal Register/Addresses REGISTERS POR VALUES (hex) REGISTER ADDRESS (hex) CSA DATA BYTE 1 (MSBs) 0x000 0x00 CSA DATA BYTE 1 (LSBs) 0x000 0x01 RS+ DATA BYTE 1 (MSBs) 0x000 0x02 RS+ DATA BYTE 1 (LSBs) 0x000 0x03 OUT DATA BYTE 1 ( MSBs) 0x000 0x04 OUT DATA BYTE 1 (LSBs) 0x000 0x05 SET DATA BYTE 1 (MSBs) 0x000 0x06 SET DATA BYTE 1 (LSBs) 0x000 0x07 TEMP DATA BYTE 1 (MSBs) 0x800 0x08 TEMP DATA BYTE 1 (LSBs) 0x000 0x09 CONTROL REGISTER 1 0x000 0x0A CONTROL REGISTER 2 0x000 0x0B Data Registers The five 12-bit data registers banks comprise two 8-bit registers for 8 MSBs and 4 LSBs. The 12-bit data is split between the two 8-bit data bytes as seen in Figure 1. They are read-only registers that hold the converted data. Do not issue a STOP command until both bytes are read. Instead use a Repeated START command to read the second byte. Byte 1 BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0 MSB12 MSB11 MSB10 MSB09 MSB08 MSB07 MSB06 MSB05 BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0 LSB05 LSB03 LSB02 LSB01 0 0 0 0 Byte 2 Control Register 1 Control Register 1 is an 8-bit write/read register that configures the MAX9611/MAX9612 for different modes of operation. Tables 4 and 5 show the bit location and function for Control Register 1. Table 4. Control Register 1 Bit Location BIT NUMBER 7 6 5 4 3 2 1 0 BIT NAME MODE2 MODE1 MODE0 LR SHDN MUX2 MUX1 MUX0 POR VALUE 0 0 0 0 0 0 0 0 www.maximintegrated.com Maxim Integrated 15 MAX9611/MAX9612 High-Side, Current-Sense Amplifiers with 12-Bit ADC and Op Amp/Comparator Table 5. Control Register 1 Bit Description BIT BIT NAME 2, 1, 0 MUX2, MUX1, MUX0 3 SHDN 4 LR 7, 6, 5 MODE2, MODE1, MODE0 FUNCTION 000 Channel A: Read current-sense amplifier output from ADC, gain = 1x 001 Channel A: Read current-sense amplifier output from ADC, gain = 4x 010 Channel A: Read current-sense amplifier output from ADC, gain = 8x 011 Channel B: Read average voltage of RS+ (input common-mode voltage) from ADC 100 Channel C: Read voltage of OUT from ADC 101 Channel D: Read voltage of SET from ADC 110 Channel E: Read internal die temperature from ADC 111 Read all channels in fast-read mode, sequentially every 2ms. Uses last gain setting. Power-on state = 0 0 = Normal operation 1 = Shutdown mode 0 = Normal operation 1 = Reset if comparator is latched due to MODE = 111. This bit is automatically reset after a 1 is written. 000 = Normal operation for op amp/comparator 111 = Comparator mode. OUT remains low until CSA output > VSET for 1ms, OUT latches high for 50ms, then OUT autoretries by going low. The comparator has an internal 10mV hysteresis voltage to help with noise immunity. For MAX9612, the polarity is reversed. 011 = Op-amp mode. OUT regulates pFET for 1ms at VSET, OUT latches high for 50ms, then OUT autoretries by going low. For MAX9612, the polarity is reversed. Control Register 2 Control Register 2 is an 8-bit write/read register that provides the different time delay options for asserting the comparator output when monitoring fault events. Tables 6 and 7 show the bit location and function for Control Register 2. Table 6. Control Register 2 BIT NUMBER 7 6 5 4 3 2 1 0 BIT NAME X X X X DTIM RTIM X X POR VALUE 0 0 0 0 0 0 0 0 Table 7. Control Register 2 Bit Descriptions BIT BIT NAME 7, 6, 5, 4 X 3 DTIM Watchdog delay time 0 = 1ms 1 = 100s 2 RTIM Watchdog retry delay time 0 = 50ms 1 = 10ms 1, 0 X www.maximintegrated.com FUNCTION Set to 0 Set to 0 Maxim Integrated 16 MAX9611/MAX9612 High-Side, Current-Sense Amplifiers with 12-Bit ADC and Op Amp/Comparator Power-On Reset The MAX9611/MAX9612 include power-on reset circuitry that ensures all registers reset to a known state on powerup. Once VCC goes above 2.4V, the POR circuit releases the registers for normal operation. Applications Information Inrush Current Limiter The MAX9611 can be used as an inrush current limiter for a number of applications as shown in Figure 3. Note that the sense resistor can be placed on either side of the pFET. Since the input common-mode voltage of the MAX9611 extends to ground, the sense resistor can be placed at the load side as well, allowing current to be sensed even when there is a dead-short on the load. The inrush current limiting circuit reads and measures the load current during normal operation and can limit the load current to a user-set value. In normal operation, the load current is below the set threshold. The pFET is fully turned on because the op-amp output is at 0V. In the event of an overcurrent situation at the load, the op-amp controls the pFET's gate-voltage so it transitions to a linear region, thus limiting the load current. In this case, the op-amp output voltage is between 0V and VBAT, as required for current-limiting. Choose a suitable sense resistor and a low RDS-ON pFET to ensure the best efficiency during normal operation. Choose a pFET with large power dissipation to ensure compliance with safe operating area of the pFET. The MAX9611 comes equipped with a variety of watchdog options to help with this design (see Control Register 2, Table 7). Choose resistor values R1 and R2 to ensure that the pFET is fully on in normal operating conditions and to ensure that the VGS maximum rating is not exceeded. Also, R1 and R2 help limit the current in the open-drain output stage of the internal op amp. RCOMP and CCOMP help rolloff high-frequency gain of the feedback control system. R2 and CCOMP set a pole, for which 10kHz is a good choice. RCOMP and CCOMP set a zero, for which 100kHz is a good choice. With the internal gain of the current-sense amplifier (2.5V/V), the inrush current-limit threshold can be set using resistor-divider R3 and R4 as follows: VCC x R3 =I R4 + R3 ( )(2.5 x R SENSE ) LIMIT Note: The inrush current limiter can be changed to a highside relay-disconnect circuit by using the MAX9611 set to comparator mode (MODE 111). INRUSH CURRENT LIMITER RSENSE VBAT CCOMP R2 P RS+ 2.7V TO 5.5V RCOMP LOAD 0.1F R1 RSA0 VCC A1 R4 MAX9611 OUT 0.1F R3 1F SET GND SCL I2C CLOCK INPUT SDA I2C DATA INPUT/OUTPUT (OUTPUT SET TO OP-AMP MODE) Figure 3. Inrush Current Limiter www.maximintegrated.com Maxim Integrated 17 MAX9611/MAX9612 High-Side, Current-Sense Amplifiers with 12-Bit ADC and Op Amp/Comparator Base-Station PA Gain Control When the OUT open-dran transistor is off, the gate voltage of the PA FET is: While the MAX9611 is designed to control high-side pFETs, the MAX9612 can be similarly used to control low-side nFETs. For example, the MAX9612 can be used to control the DC bias point of power amplifier LDMOS or GaN nFETs in base-station applications. The circuit shown in Figure 4 also allows the option to apply negative bias voltages to the PA FET, which is required for certain types of transistors for proper operation. = VGATE VCLAMPR1 VNEG (R2 + R3) + R1 + R2 + R3 R1 + R2 + R3 RCOMP and CCOMP connected to the OUT pin compensate the internal amplifier. Choose a corner frequency of 100kHz. Choose suitable RSENSE as required for the application. The inductor isolates the DC measuring point of current from the high-frequency AC signals through the PA FET, as well as helping with the high-frequency gain. In the circuit shown, the nFET is in a linear mode of operation to allow it to amplify high-frequency RF signals, while the MAX9612 sets the DC operating point. The gain of the FET can be varied by changing its drain current. This operating point can be varied by an external DAC voltage that feeds the SET pin. Power-Supply Bypassing and Grounding The MAX9611/MAX9612 share a common ground pin for both the analog and digital on-chip circuitry. It is therefore very important to properly bypass the VCC to GND, and to have a solid low-noise ground plane on the circuit board so as to minimize ground bounce. Bypass VCC to GND with low ESR 0.1F in parallel with a 4.7F ceramic capacitor to GND placed as close as possible to the device. VNEG and VCLAMP together with R1, R2, and R3 set the DC bias point limits for the PA transistor. VCLAMP is a suitable positive voltage and VNEG is a suitable negative voltage. When VOUT = 0V, the gate voltage of the PA FET is: VNEG x R2 = VOUT (R1 + R2) BASE-STATION PA GAIN CONTROL 2.7V TO 5.5V RS- RFOUT RS+ A0 VCC CIN VCLAMP A1 MAX9612 R3 R2 N R1 VNEG OUT RCOMP CCOMP GND SCL I2C CLOCK INPUT SDA I2C DATA INPUT/OUTPUT SET 10-BIT DAC RFIN (OUTPUT SET TO OP-AMP MODE) Figure 4. Base-Station PA Gain Control www.maximintegrated.com Maxim Integrated 18 MAX9611/MAX9612 Chip Information PROCESS: BiCMOS www.maximintegrated.com High-Side, Current-Sense Amplifiers with 12-Bit ADC and Op Amp/Comparator Package Information For the latest package outline information and land patterns (footprints), go to www.maximintegrated.com/packages. Note that a "+", "#", or "-" in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing pertains to the package regardless of RoHS status. PACKAGE TYPE PACKAGE CODE OUTLINE NO. 10 MAX U10+2 21-0061 LAND PATTERN NO. 90-0330 Maxim Integrated 19 MAX9611/MAX9612 High-Side, Current-Sense Amplifiers with 12-Bit ADC and Op Amp/Comparator Revision History REVISION NUMBER REVISION DATE PAGES CHANGED DESCRIPTION 0 9/10 Initial release -- 1 11/10 Updated text in Table 5 to add "comparator" to mode 000 for bits 7, 6, 5 16 2 1/11 Relaxed room temperature limits for 4x and 8x gains from 0.3mV to 0.5mv 1, 2 3 6/11 Updated TYP spec for output current sink in the Electrical Characteristics and TOC 11 3, 7 4 6/14 Update equation in Inrush Current Limiter section 17 For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim Integrated's website at www.maximintegrated.com. Maxim Integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim Integrated product. No circuit patent licenses are implied. Maxim Integrated reserves the right to change the circuitry and specifications without notice at any time. The parametric values (min and max limits) shown in the Electrical Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance. Maxim Integrated and the Maxim Integrated logo are trademarks of Maxim Integrated Products, Inc. (c) 2014 Maxim Integrated Products, Inc. 20