ADVANCED LINEAR DEVICES, INC. TM e (R) EPAD D LE AB EN ALD1721/ALD1721G PRECISION MICROPOWER CMOS OPERATIONAL AMPLIFIER GENERAL DESCRIPTION FEATURES & BENEFITS The ALD1721/ALD1721G is a monolithic CMOS micropower high slew rate operational amplifier intended for a broad range of precision applications requiring exremely low input signal power. Input signal power is the product of input offset voltage and input bias current, which represents the minimum required power draw from the signal source in order to drive the input of the operational amplifier. Input signal power is also a figure of merit in source loading and its associated error, and is a measure of the basic signal resolution possible through the operational amplifier for a given signal source. For certain types of signal sources, signal loading directly translates into a significant distortion or "interface noise equivalent" term. * Lead Free - RoHS compatible * Robust high-temperature operation * Guaranteed extremely low input signal power of 1.5 fW * Input offset voltage of 0.05 mV typical (0.15 mV max.) * Low input bias currents of 0.01pA typical (10pA max.) * Rail to rail input and output voltage ranges * All parameters specified for +5V single supply or 2.5V dual supplies * Unity gain stable, no compensation needed * High voltage gain -- typically 100V/mV @ 2.5V(100dB) * Drive as low as 10K load * Output short circuit protected * Unity gain bandwidth of 0.7MHz * Slew rate of 0.7V/s * Micro power dissipation * Suitable for rugged, temperature-extreme environments The ALD1721/ALD1721G is designed to set a new standard in low input signal power requirements. The typical input loading at its input is 0.05 mV offset voltage and 0.01 pA input bias current at 25C, resulting in 0.0005 fW input signal power draw. This input characteristic virtually eliminates any loading effects on most types of signal sources, offering unparalled accuracy and signal integrity and fidelity. Obviously, for capacitive and high sensitivity, high impedance signal sources, the ALD1721/ ALD1721G is ideally suited. It is readily suited for +5V single supply (or 1V to 5V) systems, with low operating power dissipation, a traditional strength of CMOS technology. It is offered with industry standard pin configuration of A741 and ICL7611 types. The ALD1721/ALD1721G can operate with rail to rail large signal input and output voltages with relatively high slew rate. The input voltage can be equal to or exceed the positive and negative supply voltages while the output voltage can swing close to these supply voltage rails. This feature significantly reduces the supply overhead voltage required to operate the operational amplifier and allows numerous analog serial stages to operate in a low power supply environment. In addition, the device can accommodate mixed applications where digital and analog circuits may operate off the same power supply or battery. Finally, the output stage can typically drive up to 50pF capacitive and 10K resistive loads. These features make the ALD1721/ALD1721G a versatile, micropower high precision operational amplifier that is user friendly and easy to use with virtually no source loading and zero input-loading induced source errors. Additionally, robust design and rigorous screening make this device especially suitable for operation in temperature-extreme environments and rugged conditions. ORDERING INFORMATION ("L" suffix denotes lead-free (RoHS)) 0C to +70C Operating Temperature Range 0C to +70C -55C to +125C 8-Pin Small Outline Package (SOIC) 8-Pin Plastic Dip Package 8-Pin CERDIP Package ALD1721SAL ALD1721GSAL ALD1721PAL ALD1721GPAL ALD1721DA ALD1721GDA * Contact factory for leaded (non-RoHS) or high temperature versions. APPLICATIONS * * * * * * * * * * * * * Voltage amplifier Voltage follower/buffer Charge integrator Photodiode amplifier Data acquisition systems High performance portable instruments Signal conditioning circuits Sensor and transducer amplifiers Low leakage amplifiers Active filters Sample/Hold amplifier Picoammeter Current to voltage converter PIN CONFIGURATION 8 N/C 7 V+ 3 6 OUT 4 5 N/C N/C 1 -IN 2 +IN V- 2 TOP VIEW TOP VIEW SAL, PAL, DA PACKAGES * N/C pins are internally connected. Do not connect externally. Rev 2.1 (c)2011 Advanced Linear Devices, Inc. 415 Tasman Drive, Sunnyvale, CA 94089-1706 Tel: (408) 747-1155 Fax: (408) 747-1286 www.aldinc.com ABSOLUTE MAXIMUM RATINGS 10.6V -0.3V to V+ +0.3V 600 mW 0C to +70C -55C to +125C -65C to +150C +260C Supply voltage, V+ Differential input voltage range Power dissipation Operating temperature range SAL, PAL packages DA package Storage temperature range Lead temperature, 10 seconds CAUTION: ESD Sensitive Device. Use static control procedures in ESD controlled environment. OPERATING ELECTRICAL CHARACTERISTICS TA = 25C VS = 2.5V unless otherwise specified Parameter Symbol Min 1721 Typ 1.0 2.0 Max 5.0 10.0 Min 1721G Typ 1.0 2.0 Unit Test Conditions 5.0 10.0 V Dual Supply Single Supply Max Supply Voltage VS V+ Input Offset Voltage VOS 0.05 0.15 0.6 0.15 0.35 1.0 mV mV RS 100K 0C TA +70C Input Offset Current IOS 0.01 10 240 0.01 10 240 pA pA TA = 25C 0C TA +70C Input Bias Current IB 0.01 10 240 0.01 10 240 pA pA TA = 25C 0C TA +70C Input Voltage Range VIR 5.3 2.8 V V V+ = +5V VS = 2.5V Input Resistance RIN Input Offset Voltage Drift TCVOS Power Supply Rejection Ratio PSRR 65 65 80 80 65 65 Common Mode Rejection Ratio CMRR 65 65 83 83 Large Signal Voltage Gain AV 32 100 1000 -0.3 -2.8 5.3 2.8 1014 1014 5 7 20 Output Voltage VO low VO high Range VO low VO high V/C RS 100K 80 80 dB dB RS 100K 0C TA +70C 65 65 83 83 dB dB RS 100K 0C TA +70C 32 100 1000 V/ mV V/ mV V/ mV RL = 100K RL 1M RL = 100K 0C TA +70C V RL =1M V+ = +5V V 0C TA +70C RL =100K 0C TA +70C 0.01 4.999 -2.48 2.40 20 0.001 4.99 -0.3 -2.8 0.001 4.99 -2.40 2.48 -2.48 2.40 0.01 4.999 -2.40 2.48 V V Output Short Circuit Current ISC Supply Current IS 110 200 110 200 A VIN = 0V No Load Power Dissipation PD 0.6 1.0 0.6 1.0 mW VS = 2.5V ALD1721/ALD1721G 1 1 Advanced Linear Devices mA 2 of 9 OPERATING ELECTRICAL CHARACTERISTICS (cont'd) TA = 25C VS = 2.5V unless otherwise specified (cont'd) Parameter Symbol Min 1721 Typ Max Min 1721G Typ 1 Max Test Conditions Input Capacitance CIN Bandwidth BW 400 700 400 700 KHz Slew Rate SR 0.33 0.7 0.33 0.7 V/s AV = +1 RL = 100K Rise time tr 0.2 0.2 s RL = 100K 20 20 % RL =100K CL = 50pF 10.0 10.0 s Overshoot 1 Unit pF Factor Settling Time ts 0.1% AV = -1RL=100K CL = 50pF TA = 25C VS = 5.0V unless otherwise specified Parameter Power Supply Symbol Min 1721 Typ Max Min 1721G Typ Max Unit Test Conditions PSRR 83 83 dB RS 100K CMRR 83 83 dB RS 100K 250 250 V/mV RL =100K V V RL =100K Rejection Ratio Common Mode Rejection Ratio Large Signal Voltage Gain AV Output Voltage VO low Range VO high Bandwidth BW 1.0 1.0 MHz Slew Rate SR 1.0 1.0 V/s 4.90 -4.98 4.98 -4.90 4.90 -4.98 4.98 -4.90 AV = +1 CL = 50pF VS = 2.5V -55C TA +125C unless otherwise specified 1721 Typ Max Min Unit Input Offset Voltage VOS 1.0 Conditions 2.0 mV RS 100K Input Offset Current IOS 2.0 2.0 nA Input Bias Current IB 2.0 2.0 nA Power Supply Rejection Ratio PSRR 60 75 60 75 dB RS 100K Common Mode Rejection Ratio CMRR 60 83 60 83 dB RS 100K Large Signal Voltage Gain AV 15 50 15 50 V/ mV RL = 100K Output Voltage Range VO low VO high 2.35 -2.47 2.45 2.35 -2.47 2.45 V V RL = 100K -2.40 Advanced Linear Devices Typ Test Symbol ALD1721/ALD1721G Min 1721G Parameter Max -2.40 3 of 9 Design & Operating Notes: 1. The ALD1721/ALD1721G CMOS operational amplifier uses a 3 gain stage architecture and an improved frequency compensation scheme to achieve large voltage gain, high output driving capability, and better frequency stability. The ALD1721/ALD1721G is internally compensated for unity gain stability. This compensation produces a clean single pole roll off in the gain characteristics while providing for more than 70 degrees of phase margin at the unity gain frequency, reducing or eliminating low levels of oscillation or ringing with many types of loading conditions. 2. The ALD1721/ALD1721G has complementary p-channel and nchannel input differential stages connected in parallel to accomplish rail to rail input common mode voltage range. With different ranges of common mode input voltage, one or both of the two differential stages is active. The transition between the two input stages takes place at about 1.5V below the positive supply voltage. Input offset voltage trimming on the ALD1721/ALD1721G is made when the input voltage is symmetrical to the supply voltages, this internal transition switching does not affect a variety of applications such as an inverting amplifier or non-inverting amplifier with a gain larger than 2.5 (5V operation), where the common mode voltage does not make excursions above this switching point. If the operational amplifier is connected as a unity gain buffer, and full input and/or output rail to rail range is used, then provision should be made to allow for slight input offset voltage variations. Likewise the output has push-pull(source-sink) output stages working in tandem to provide full (see note 4) rail to rail output. In addition, the source and sink currents are designed to provide symmetrical drives to the load. 3. The input bias and offset currents are essentially input protection diode reverse bias leakage currents, and are typically less than 0.01pA at room temperature. This low input bias current assures that the analog signal from the source will not be distorted by input bias currents. Normally, this extremely high input impedance of greater than 1014 would be limited by the source impedance which would limit the node impedance. However, for applications where source impedance is also very high, it may be necessary to limit noise and hum pickup through proper ground shielding. 4. The output stage consists of class AB complementary output drivers, capable of driving a low resistance load to either supply rail. The output voltage swing is limited by the drain to source on-resistance of the output transistors as determined by the bias circuitry, and the value of the load resistor. When connected in the voltage follower configuration, the oscillation resistant feature, combined with the rail to rail input and output feature, makes an effective analog signal buffer for medium to high source impedance sensors, transducers, and other circuit networks. 5. The ALD1721/ALD1721G operational amplifier has been designed to provide static discharge protection. Internally, the design has been carefully implemented to minimize latch up. However, care must be exercised when handling the device to avoid strong static fields that may degrade a diode junction, causing increased input leakage currents. The user is advised to power up the circuit before, or simultaneously with any input voltages applied, and to limit input voltages not to exceed 0.3V of the power supply voltage levels at all times, including during power up and power down cycles. 6. The ALD1721/ALD1721G, with its micropower operation, offers benefits in reduced power supply requirements, less noise coupling and current spikes, less thermally induced drift, better overall reliability due to lower self heating, and lower input bias current. It requires practically no warm up time as the chip junction heats up to 0.1C or less above ambient temperature under most operating conditions. 7. The ALD1721/ALD1721G has an internal design architecture that provides robust high temperature operation. Contact factory for custom screening versions. TYPICAL PERFORMANCE CHARACTERISTICS SUPPLY CURRENT AS A FUNCTION OF SUPPLY VOLTAGE COMMON MODE INPUT VOLTAGE RANGE AS A FUNCTION OF SUPPLY VOLTAGE 7 INPUTS GROUNDED OUTPUT UNLOADED 400 +25C 6 COMMON MODE INPUT VOLTAGE RANGE (V) SUPPLY CURRENT (A) 500 -25C 300 TA = -55C 200 +125C 100 +70C 0 0 1 2 3 4 SUPPLY VOLTAGE (V) 5 TA = 25C 5 4 3 2 1 0 6 4 5 6 7 1000 INPUT BIAS CURRENT (pA) OPEN LOOP VOLTAGE GAIN (V/mV) 3 INPUT BIAS CURRENT AS A FUNCTION OF AMBIENT TEMPERATURE 1000 100 10 VS = 2.5V TA = 25C VS = 2.5V 100 10 1.0 0.1 0.01 100K 1M 10M LOAD RESISTANCE () ALD1721/ALD1721G 2 SUPPLY VOLTAGE (V) OPEN LOOP VOLTAGE GAIN AS A FUNCTION OF LOAD RESISTANCE 1 10K 1 0 -50 -25 0 25 50 75 100 125 AMBIENT TEMPERATURE (C) Advanced Linear Devices 4 of 9 TYPICAL PERFORMANCE CHARACTERISTICS (cont'd) OPEN LOOP VOLTAGE GAIN AS A FUNCTION OF SUPPLY VOLTAGE AND TEMPERATURE OUTPUT VOLTAGE SWING (V) OPEN LOOP VOLTAGE GAIN (V/mV) 1000 OUTPUT VOLTAGE SWING AS A FUNCTION OF SUPPLY VOLTAGE 100 10 -55C TA +125C RL = 100K 6 -55C TA +125C RL = 100K 5 4 3 2 1 1 2 0 4 6 8 0 1 2 3 4 5 6 7 SUPPLY VOLTAGE (V) SUPPLY VOLTAGE (V) LARGE - SIGNAL TRANSIENT RESPONSE OPEN LOOP VOLTAGE GAIN AS A FUNCTION OF FREQUENCY 5s/div VS = 2.5V TA = 25C 100 80 60 0 40 45 20 90 0 135 180 -20 1 10 100 1K 10K 100K FREQUENCY (Hz) 1M 10M SMALL - SIGNAL TRANSIENT RESPONSE LARGE - SIGNAL TRANSIENT RESPONSE 2V/div VS = 1.0V TA = 25C RL = 100K CL = 50pF 100mV/div VS = 2.5V TA = 25C RL = 100K CL = 50pF 500mV/div 5s/div 20mV/div 2s/div ALD1721/ALD1721G PHASE SHIFT IN DEGREES 2V/div VS = 2.5V TA = 25C RL = 100K CL = 50pF OPEN LOOP VOLTAGE GAIN (dB) 120 5V/div Advanced Linear Devices 5 of 9 TYPICAL APPLICATIONS RAIL-TO-RAIL VOLTAGE COMPARATOR RAIL-TO-RAIL VOLTAGE FOLLOWER/BUFFER +5V 5V ~ 1012 ZIN = VIN 0.1F - 0.1F - +5V OUTPUT + VIN 0 VIN 5V 10M * See Rail to Rail Waveform HIGH INPUT IMPEDANCE RAIL-TO-RAIL PRECISION DC SUMMING AMPLIFIER + V2 RAIL-TO-RAIL WAVEFORM +2.5V 10M V1 10M INPUT - V- VIN V+ - 2.5V V- VOUT V+ 10M VOUT = V1 + V2 - V3 - V4 0V +5V OUTPUT 0V 0.1F V3 V4 +5V 0.1F VOUT 10M 10M Performance waveforms. Upper trace is the output of a Wien Bridge Oscillator. Lower trace is the output of Rail-to-rail voltage follower. 10M RIN = 10M Accuracy limited by resistor tolerances and input offset voltage PHOTO DETECTOR CURRENT TO VOLTAGE CONVERTER WIEN BRIDGE OSCILLATOR (RAIL-TO-RAIL) SINE WAVE GENERATOR RF = 5M +2.5V - I OUTPUT + 10K -2.5V + 10K R = 10K f =~ - PHOTODIODE 10K .01F C = .01F 1 2RC OUTPUT + 50K +2.5V VOUT = 1 X RF RL = 100K -2.5V ~ 1.6KHz * See Rail to Rail Waveform LOW VOLTAGE INSTRUMENTATION AMPLIFIER V+ 0.1F 1M + 100K - 500K V+ 100K V- 0.1F 0.1F - f max = 20KHz -40mV VIN 40mV VOUT 50K + V+ 0.1F 1M V- 0.1F V- 100K + V- ALD1721/ALD1721G V+ 1M 100K 0.1F 1M GAIN = 25 V- VOUT V+. All resistors are 1%. V+ = +1.0V, V- = -1.0V. Short circuit input current 1A. Advanced Linear Devices 6 of 9 SOIC-8 PACKAGE DRAWING 8 Pin Plastic SOIC Package E Millimeters Dim S (45) D A Min 1.35 Max 1.75 Min 0.053 Max 0.069 A1 0.10 0.25 0.004 0.010 b 0.35 0.45 0.014 0.018 C 0.18 0.25 0.007 0.010 D-8 4.69 5.00 0.185 0.196 E 3.50 4.05 0.140 0.160 1.27 BSC e A A1 e Inches 0.050 BSC H 5.70 6.30 0.224 0.248 L 0.60 0.937 0.024 0.037 o 0 8 0 8 S 0.25 0.50 0.010 0.020 b S (45) H L ALD1721/ALD1721G C o Advanced Linear Devices 7 of 9 PDIP-8 PACKAGE DRAWING 8 Pin Plastic DIP Package E E1 Millimeters D S A2 A1 e b b1 A L Inches Dim Min Max Min Max A 3.81 5.08 0.105 0.200 A1 0.38 1.27 0.015 0.050 A2 1.27 2.03 0.050 0.080 b 0.89 1.65 0.035 0.065 b1 0.38 0.51 0.015 0.020 c 0.20 0.30 0.008 0.012 D-8 9.40 11.68 0.370 0.460 E 5.59 7.11 0.220 0.280 E1 7.62 8.26 0.300 0.325 e 2.29 2.79 0.090 0.110 e1 L 7.37 7.87 0.290 0.310 2.79 3.81 0.110 0.150 S-8 1.02 2.03 0.040 0.080 0 15 0 15 o c e1 ALD1721/ALD1721G o Advanced Linear Devices 8 of 9 CERDIP-8 PACKAGE DRAWING 8 Pin CERDIP Package E E1 Millimeters D A1 s A L L2 b b1 e L1 Dim A A1 Min Inches 3.55 Max 5.08 Min 0.140 Max 0.200 1.27 2.16 0.050 0.085 b 0.97 1.65 0.038 0.065 b1 0.36 0.58 0.014 0.023 C 0.20 0.38 0.008 0.015 D-8 -- 10.29 -- 0.405 E 5.59 7.87 0.220 0.310 E1 7.73 8.26 0.290 0.325 e 2.54 BSC 0.100 BSC e1 7.62 BSC 0.300 BSC L 3.81 5.08 0.150 0.200 L1 3.18 -- 0.125 -- L2 0.38 1.78 0.015 0.070 S -- 2.49 -- 0.098 0 15 0 15 O C e1 ALD1721/ALD1721G o Advanced Linear Devices 9 of 9