LM3671 LM3671Q www.ti.com SNVS294Q - NOVEMBER 2004 - REVISED NOVEMBER 2013 LM3671, LM3671Q 2MHz, 600mA Step-Down DC-DC Converter Check for Samples: LM3671, LM3671Q FEATURES APPLICATIONS * * * * * * * * * * * * * 1 2 * * * * * * * * 16 A Typical Quiescent Current 600 mA Maximum Load Capability 2 MHz PWM Fixed Switching Frequency (typ.) Automatic PFM/PWM Mode Switching Internal Synchronous Rectification for High Efficiency Internal Soft Start 0.01 A Typical Shutdown Current Operates from a Single Li-Ion Cell Battery Only Three Tiny Surface-Mount External Components Required (One Inductor, Two Ceramic Capacitors) Current Overload and Thermal Shutdown Protection Available in Fixed Output Voltages and Adjustable Version LM3671Q is an Automotive Grade Product that is AEC-Q100 Grade 1 Qualified SOT-23, 5-Bump DSBGA and 6-Pin USON Packages Mobile Phones PDAs MP3 Players W-LAN Portable Instruments Digital Still Cameras Portable Hard Disk Drives Automotive DESCRIPTION The LM3671 step-down DC-DC converter is optimized for powering low voltage circuits from a single Li-Ion cell battery and input voltage rails from 2.7V to 5.5V. It provides up to 600 mA load current, over the entire input voltage range. There are several different fixed voltage output options available as well as an adjustable output voltage version range from 1.1V to 3.3V. The device offers superior features and performance for mobile phones and similar portable systems. Automatic intelligent switching between PWM lownoise and PFM low-current mode offers improved system control. During PWM mode, the device operates at a fixed-frequency of 2 MHz (typ.). Hysteretic PFM mode extends the battery life by reducing the quiescent current to 16 A (typ.) during light load and standby operation. Internal synchronous rectification provides high efficiency during PWM mode operation. In shutdown mode, the device turns off and reduces battery consumption to 0.01 A (typ.). TYPICAL APPLICATION CIRCUITS VIN 2.7V to 5.5V L1: 2.2 PH VIN SW 1 CIN 4.7 PF VOUT 5 COUT 10 PF LM3671 GND 2 EN FB 3 4 Figure 1. Typical Application Circuit 1 2 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. All trademarks are the property of their respective owners. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright (c) 2004-2013, Texas Instruments Incorporated LM3671 LM3671Q SNVS294Q - NOVEMBER 2004 - REVISED NOVEMBER 2013 www.ti.com DESCRIPTION (CONTINUED) The LM3671 is available in SOT-23, tiny 5-bump DSBGA, and a 6-pin USON packages in leaded (PB) and leadfree (NO PB) versions. A high-switching frequency of 2 MHz (typ.) allows use of tiny surface-mount components. Only three external surface-mount components, an inductor and two ceramic capacitors, are required. VIN L1: 2.2 PH VIN 2.7V to 5.5V CIN 4.7 PF VOUT SW 1 5 COUT LM3671ADJ GND C1 R1 C2 R2 10 PF 2 EN FB 3 4 Figure 2. Typical Application Circuit for ADJ version Connection Diagrams SW 5 VIN 1 FB 4 GND 2 EN 3 Figure 3. Top View SOT-23 Package See Package Number DBV (2.92 mm x 2.84 mm x 1.2 mm) VIN A1 A3 SW EN GND GND B2 B2 C3 C1 A1 A3 FB FB Top View C3 VIN SW C1 EN Bottom View Figure 4. 5-Bump DSBGA Package See Package Number YZR0005 (1.05 mm x 1.38 mm x 0.6 mm) 2 Submit Documentation Feedback Copyright (c) 2004-2013, Texas Instruments Incorporated Product Folder Links: LM3671 LM3671Q LM3671 LM3671Q www.ti.com SNVS294Q - NOVEMBER 2004 - REVISED NOVEMBER 2013 6 Fb En 1 Pgnd 2 5 Sgnd Vin 3 4 Sw TOP VIEW Figure 5. 6-Pin USON Package See Package Number NKH0006B (2 mm x 2 mm x 0.6 mm) PIN DESCRIPTIONS (SOT-23) Pin # Name 1 VIN Description 2 GND 3 EN Enable pin. The device is in shutdown mode when voltage to this pin is <0.4V and enabled when >1.0V. Do not leave this pin floating. 4 FB Feedback analog input. Connect directly to the output filter capacitor for fixed voltage versions. For adjustable version external resistor dividers are required (Figure 2). The internal resistor dividers are disabled for the adjustable version. 5 SW Switching node connection to the internal PFET switch and NFET synchronous rectifier. Power supply input. Connect to the input filter capacitor (Figure 1). Ground pin. PIN DESCRIPTIONS (5-Bump DSBGA) Pin # Name A1 VIN Description A3 GND C1 EN Enable pin. The device is in shutdown mode when voltage to this pin is <0.4V and enabled when >1.0V. Do not leave this pin floating. C3 FB Feedback analog input. Connect directly to the output filter capacitor for fixed voltage versions. For adjustable version external resistor dividers are required (Figure 2). The internal resistor dividers are disabled for the adjustable version. B2 SW Switching node connection to the internal PFET switch and NFET synchronous rectifier. Pin # Name 1 EN 2 Pgnd Power supply input. Connect to the input filter capacitor (Figure 1). Ground pin. PIN DESCRIPTIONS (6-Pin USON) Description Enable pin. The device is in shutdown mode when voltage to this pin is <0.4V and enabled when >1.0V. Do not leave this pin floating. Ground pin. 3 VIN Power supply input. Connect to the input filter capacitor (Figure 1). 4 SW Switching node connection to the internal PFET switch and NFET synchronous rectifier. 5 Sgnd 6 FB Singnal ground (feedback ground). Feedback analog input. Connect directly to the output filter capacitor for fixed voltage versions. For adjustable version external resistor dividers are required (Figure 2). The internal resistor dividers are disabled for the adjustable version. These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. Submit Documentation Feedback Copyright (c) 2004-2013, Texas Instruments Incorporated Product Folder Links: LM3671 LM3671Q 3 LM3671 LM3671Q SNVS294Q - NOVEMBER 2004 - REVISED NOVEMBER 2013 www.ti.com ORDERING INFORMATION (1) (2) Orderable Voltage Option (V) SOT-23 Package LM3671MF-1.2 LM3671MFX-1.2 LM3671MF-1.2/NOPB LM3671MFX-1.2/NOPB LM3671QMF-1.2 1.2 LM3671QMFX-1.2 LM3671QMF-1.2/NOPB LM3671QMFX-1.2/NOPB LM3671MF-1.25/NOPB LM3671MFX-1.25/NOPB LM3671MF-1.375/NOPB LM3671MFX-1.375/NOPB LM3671MF-1.5/NOPB LM3671MFX-1.5/NOPB LM3671MF-1.6/NOPB LM3671MFX-1.6/NOPB LM3671MF-1.8/NOPB LM3671MFX-1.8/NOPB LM3671MF-1.875/NOPB LM3671MFX-1.875/NOPB LM3671MF-2.5/NOPB LM3671MFX-2.5/NOPB LM3671MF-2.8/NOPB LM3671MFX-2.8/NOPB LM3671MF-3.3/NOPB LM3671MFX-3.3/NOPB LM3671MF-ADJ/NOPB LM3671MFX-ADJ/NOPB (1) (2) 4 1.25 1.375 1.5 1.6 1.8 1.875 2.5 2.8 3.3 Adjustable For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI web site at www.ti.com. Package drawings, thermal data, and symbolization are available at www.ti.com/packaging. Submit Documentation Feedback Copyright (c) 2004-2013, Texas Instruments Incorporated Product Folder Links: LM3671 LM3671Q LM3671 LM3671Q www.ti.com SNVS294Q - NOVEMBER 2004 - REVISED NOVEMBER 2013 ORDERING INFORMATION(1)(2) (continued) Orderable Voltage Option (V) DSBGA Package LM3671TL-1.2/NOPB LM3671TLX-1.2/NOPB LM3671TL-1.25/NOPB LM3671TLX-1.25/NOPB LM3671TL-1.5/NOPB LM3671TLX-1.5/NOPB 1.2 1.25 1.5 LM3671TL-1.8/NOPB LM3671TLX-1.8/NOPB LM3671QTL-1.8/NOPB 1.8 LM3671QTLX-1.8/NOPB LM3671TL-1.875/NOPB LM3671TLX-1.875/NOPB LM3671TL-2.5/NOPB LM3671TLX-2.5/NOPB LM3671TL-2.8/NOPB LM3671TLX-2.8/NOPB LM3671TL-3.3/NOPB LM3671TLX-3.3/NOPB LM3671TL-ADJ/NOPB LM3671TLX-ADJ/NOPB 1.875 2.5 2.8 3.3 Adjustable USON Package LM3671LC-1.2/NOPB LM3671LCX-1.2/NOPB LM3671LC-1.3/NOPB LM3671LCX-1.3/NOPB LM3671LC-1.6/NOPB LM3671LCX-1.6/NOPB LM3671LC-1.8/NOPB LM3671LCX-1.8/NOPB 1.2 1.3 1.6 1.8 Submit Documentation Feedback Copyright (c) 2004-2013, Texas Instruments Incorporated Product Folder Links: LM3671 LM3671Q 5 LM3671 LM3671Q SNVS294Q - NOVEMBER 2004 - REVISED NOVEMBER 2013 www.ti.com ABSOLUTE MAXIMUM RATINGS (1) (2) -0.2V to 6.0V VIN Pin: Voltage to GND FB, SW, EN Pin: (GND-0.2V) to (VIN + 0.2V) Continuous Power Dissipation (3) Internally Limited Junction Temperature (TJ-MAX) +125C Storage Temperature Range -65C to +150C Maximum Lead Temperature (Soldering, 10 sec.) 260C ESD Rating (4) Human Body Model 2 kV Machine Model (1) (2) (3) (4) 200V Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings are conditions under which operation of the device is specified. Operating Ratings do not imply specified performance limits. For specified performance limits and associated test conditions, see the Electrical Characteristics tables. If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office / Distributors for availability and specifications. Internal thermal shutdown circuitry protects the device from permanent damage. Thermal shutdown engages at TJ= 150C (typ.) and disengages at TJ= 130C (typ.). The Human body model is a 100 pF capacitor discharged through a 1.5 k resistor into each pin. The machine model is a 200 pF capacitor discharged directly into each pin. MIL-STD-883 3015.7 OPERATING RATINGS (1) Input Voltage Range (2) (3) 2.7V to 5.5V Recommended Load Current 0mA to 600 mA -40C to +125C Junction Temperature (TJ) Range Ambient Temperature (TA) Range (1) (2) (3) (4) (4) -40C to +85C Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings are conditions under which operation of the device is specified. Operating Ratings do not imply specified performance limits. For specified performance limits and associated test conditions, see the Electrical Characteristics tables. All voltages are with respect to the potential at the GND pin. The input voltage range recommended for ideal applications performance for the specified output voltages are given below:VIN = 2.7V to 4.5V for 1.1V VOUT < 1.5VVIN = 2.7V to 5.5V for 1.5V VOUT < 1.8VVIN = (VOUT+ VDROPOUT) to 5.5V for 1.8V VOUT 3.3Vwhere VDROPOUT = ILOAD *( RDSON, PFET + RINDUCTOR) In Applications where high power dissipation and/or poor package resistance is present, the maximum ambient temperature may have to be derated. Maximum ambient temperature (TA-MAX) is dependent on the maximum operating junction temperature (TJ-MAX), the maximum power dissipation of the device in the application (PD-MAX) and the junction to ambient thermal resistance of the package (JA) in the application, as given by the following equation:TA-MAX= TJ-MAX- (JAx PD-MAX). Refer to Dissipation rating table for PD-MAX values at different ambient temperatures. THERMAL PROPERTIES Junction-to-Ambient Thermal Resistance (JA) (SOT-23) for 4-layer board (1) Junction-to-Ambient Thermal Resistance (JA) (DSBGA) for 4-layer board (1) Junction-to-Ambient Thermal Resistance (JA) (USON) for 4-layer board (1) 6 (1) 130C/W 85C/W 165C/W Junction to ambient thermal resistance is highly application and board layout dependent. In applications where high power dissipation exists, special care must be given to thermal dissipation issues in board design. Specified value of 130 C/W for SOT-23 is based on a 4 layer, 4" x 3", 2/1/1/2 oz. Cu board as per JEDEC standards is used. Submit Documentation Feedback Copyright (c) 2004-2013, Texas Instruments Incorporated Product Folder Links: LM3671 LM3671Q LM3671 LM3671Q www.ti.com SNVS294Q - NOVEMBER 2004 - REVISED NOVEMBER 2013 ELECTRICAL CHARACTERISTICS (1) (2) (3) Limits in standard typeface are for TJ = 25C. Limits in boldface type apply over the entire junction temperature range for operation, -40C to +125C. Unless otherwise noted, specifications apply to the LM3671MF/TL/LC with VIN = EN = 3.6V Symbol VIN Parameter Condition Min (4) Input Voltage Feedback Voltage (Fixed) MF Feedback Voltage (Fixed) TL PWM mode (5) Feedback Voltage (Fixed) LC Feedback Voltage (ADJ) MF (6) PWM mode VFB Typ 2.7 (5) Feedback Voltage (ADJ) TL Max Units 5.5 V -4 +4 -2.5 +2.5 -4 +4 -4 +4 -2.5 +2.5 % % Line Regulation 2.7V VIN 5.5V IO = 10 mA 0.031 %/V Load Regulation 100 mA IO 600 mA VIN= 3.6V 0.0013 %/mA 0.5 V VREF Internal Reference Voltage ISHDN Shutdown Supply Current EN = 0V 0.01 1 A IQ DC Bias Current into VIN No load, device is not switching (FB forced higher than programmed output voltage) 16 35 A RDSON (P) Pin-Pin Resistance for PFET VIN= VGS= 3.6V 380 500 m RDSON (N) Pin-Pin Resistance for NFET VIN= VGS= 3.6V 250 400 m ILIM Switch Peak Current Limit Open Loop 1020 1150 mA VIH Logic High Input VIL Logic Low Input IEN Enable (EN) Input Current FOSC Internal Oscillator Frequency (1) (2) (3) (4) (5) (6) (7) (7) 830 1.0 PWM Mode (5) 1.6 V 0.4 V 0.01 1 A 2 2.6 MHz All voltages are with respect to the potential at the GND pin. Min and Max limits are specified by design, test or statistical analysis. Typical numbers are not specified, but do represent the most likely norm. The parameters in the electrical characteristic table are tested at VIN= 3.6V unless otherwise specified. For performance over the input voltage range refer to datasheet curves. The input voltage range recommended for ideal applications performance for the specified output voltages are given below:VIN = 2.7V to 4.5V for 1.1V VOUT < 1.5VVIN = 2.7V to 5.5V for 1.5V VOUT < 1.8VVIN = (VOUT+ VDROPOUT) to 5.5V for 1.8V VOUT 3.3Vwhere VDROPOUT = ILOAD *( RDSON, PFET + RINDUCTOR) Test condition: for VOUT less than 2.5V, VIN = 3.6V; for VOUT greater than or equal to 2.5V, VIN = VOUT+ 1V. ADJ version is configured to 1.5V output. For ADJ output version: VIN = 2.7V to 4.5V for 0.90V VOUT < 1.1VVIN = 2.7V to 5.5V for 1.1V VOUT < 3.3V Refer to datasheet curves for closed loop data and its variation with regards to supply voltage and temperature. Electrical Characteristic table reflects open loop data (FB=0V and current drawn from SW pin ramped up until cycle by cycle current limit is activated). Closed loop current limit is the peak inductor current measured in the application circuit by increasing output current until output voltage drops by 10%. DISSIPATION RATING TABLE JA TA 25C Power Rating TA= 60C Power Rating TA= 85C Power Rating 130C/W (4 layer board) SOT-23 770 mW 500 mW 310 mW 85C/W (4 layer board) 5-bump DSBGA 1179 mW 765 mW 470 mW 165C/W (4 layer board) 6-pin USON 606 mW 394 mW 242 mW Submit Documentation Feedback Copyright (c) 2004-2013, Texas Instruments Incorporated Product Folder Links: LM3671 LM3671Q 7 LM3671 LM3671Q SNVS294Q - NOVEMBER 2004 - REVISED NOVEMBER 2013 www.ti.com BLOCK DIAGRAM VIN EN SW Current Limit Comparator Undervoltage Lockout Ramp Generator Soft Start + - Ref1 PFM Current Comparator Thermal Shutdown + - 2 MHz Oscillator Bandgap Ref2 PWM Comparator Error Amp + Control Logic Driver - pfm_low VREF 0.5V + - pfm_hi Vcomp 1.0V + - + Zero Crossing Comparator Frequency Compensation Adj Ver Fixed Ver FB GND Figure 6. Simplified Functional Diagram 8 Submit Documentation Feedback Copyright (c) 2004-2013, Texas Instruments Incorporated Product Folder Links: LM3671 LM3671Q LM3671 LM3671Q www.ti.com SNVS294Q - NOVEMBER 2004 - REVISED NOVEMBER 2013 TYPICAL PERFORMANCE CHARACTERISTICS LM3671MF/TL/LC, Circuit of Figure 1, VIN= 3.6V, VOUT= 1.5V, TA= 25C, unless otherwise noted. Quiescent Supply Current vs. Supply Voltage Shutdown Current vs. Temp 0.40 EN = VIN EN = GND IOUT = 0 mA TA = 85C 0.35 SHUTDOWN CURRENT (PA) QUIESCENT CURRENT (PA) 20 18 TA = 25C 16 TA = -30C 14 12 0.30 0.25 0.20 VIN = 5.5V 0.15 VIN = 3.6V 0.10 VIN = 2.7V 0.05 10 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 0.00 -30 10 30 50 70 90 TEMPERATURE (C) SUPPLY VOLTAGE (V) 600 -10 Figure 7. Figure 8. Feedback Bias Current vs. Temp Switching Frequency vs. Temperature Figure 9. Figure 10. RDS(ON) vs. Temperature Open/Closed Loop Current Limit vs. Temperature VIN = 2.7V 550 VIN = 4.5V 500 VIN = 3.6V RDS(ON) (m:) 450 PFET 400 VIN = 2.7V 350 300 VIN = 4.5V 250 NFET 200 150 100 -30 VIN = 3.6V -10 10 30 50 70 90 110 o TEMPERATURE ( C) Figure 11. Figure 12. Submit Documentation Feedback Copyright (c) 2004-2013, Texas Instruments Incorporated Product Folder Links: LM3671 LM3671Q 9 LM3671 LM3671Q SNVS294Q - NOVEMBER 2004 - REVISED NOVEMBER 2013 www.ti.com TYPICAL PERFORMANCE CHARACTERISTICS (continued) LM3671MF/TL/LC, Circuit of Figure 1, VIN= 3.6V, VOUT= 1.5V, TA= 25C, unless otherwise noted. Output Voltage vs. Supply Voltage (VOUT = 1.5V) 1.5300 Output Voltage vs. Supply Voltage (VOUT = 2.5V) V OUT = 1.5 V OUTPUT VOLTAGE (V) I OUT = 10 mA 1.5200 1.5100 I OUT = 300 mA 1.5000 I OUT = 500 mA 1.4900 I OUT = 600 mA 1.4800 2.5 3 3.5 4 4.5 5 5.5 SUPPLY VOLTAGE(V) 1.5300 Figure 13. Figure 14. Output Voltage vs. Temperature (VOUT = 1.5V) Output Voltage vs. Temperature (VOUT = 2.5V) 1.5250 OUTPUT VOLTAGE (V) PFM Mode 1.5200 IOUT = 10 mA 1.5150 1.5100 1.5050 IOUT = 300 mA 1.5000 1.4950 PWM Mode 1.4900 VIN = 3.6V 1.4850 VOUT = 1.5V IOUT = 600 mA 1.4800 -30 -10 10 30 50 70 90 o TEMPERATURE ( C) 1.54 Figure 15. Figure 16. Output Voltage vs. Output Current (VOUT = 1.5V) Output Voltage vs. Output Current (VOUT = 2.5V) VIN = 3.6V OUTPUT VOLTAGE (V) VOUT = 1.5V PFM Mode 1.52 PWM Mode 1.5 1.48 0 100 200 300 400 500 600 OUTPUT CURRENT (mA) Figure 17. 10 Figure 18. Submit Documentation Feedback Copyright (c) 2004-2013, Texas Instruments Incorporated Product Folder Links: LM3671 LM3671Q LM3671 LM3671Q www.ti.com SNVS294Q - NOVEMBER 2004 - REVISED NOVEMBER 2013 TYPICAL PERFORMANCE CHARACTERISTICS (continued) LM3671MF/TL/LC, Circuit of Figure 1, VIN= 3.6V, VOUT= 1.5V, TA= 25C, unless otherwise noted. Efficiency vs. Output Current (VOUT = 1.5V, L= 2.2 H) 100 Efficiency vs. Output Current (VOUT = 1.8V, L= 2.2 H) 100 VOUT = 1.5V VIN = 2.7V 90 80 VIN = 2.7V 70 VIN = 4.5V 60 VIN = 3.6V 50 EFFICIENCY (%) EFFICIENCY (%) 80 30 10.00 100.00 1000.00 VIN = 3.6V 50 30 1.00 VIN = 4.5V 60 40 0.10 VIN = 3.0V 70 40 20 0.01 VOUT = 1.8V VIN = 3.0V 90 20 0.01 0.10 1.00 10.00 100.00 1000.00 OUTPUT CURRENT (mA) OUTPUT CURRENT (mA) Figure 19. Figure 20. Efficiency vs. Output Current (VOUT = 2.5V, L= 2.2 H) Efficiency vs. Output Current (VOUT = 3.3V, L= 2.2 H) Figure 21. Figure 22. Line Transient Response VOUT = 1.5V (PWM Mode) Line Transient Response VOUT = 2.5V (PWM Mode) 20 mV/DIV AC Coupled VOUT 3.6V VIN 3.0V VOUT = 1.5V IOUT = 400 mA 40 Ps/DIV Figure 23. Figure 24. Submit Documentation Feedback Copyright (c) 2004-2013, Texas Instruments Incorporated Product Folder Links: LM3671 LM3671Q 11 LM3671 LM3671Q SNVS294Q - NOVEMBER 2004 - REVISED NOVEMBER 2013 www.ti.com TYPICAL PERFORMANCE CHARACTERISTICS (continued) LM3671MF/TL/LC, Circuit of Figure 1, VIN= 3.6V, VOUT= 1.5V, TA= 25C, unless otherwise noted. 12 Load Transient Response VOUT = 1.5V (PWM Mode) Load Transient Response VOUT = 2.5V (PWM Mode) Figure 25. Figure 26. Load Transient Response (VOUT = 1.5V) (PFM Mode 0.5 mA to 50 mA) Load Transient Response (VOUT = 1.5V) (PFM Mode 50 mA to 0.5 mA) Figure 27. Figure 28. Load Transient Response (VOUT = 2.5V) (PFM Mode 0.5 mA to 50 mA) Load Transient Response (VOUT = 2.5V) (PFM Mode 50 mA to 0.5 mA) Figure 29. Figure 30. Submit Documentation Feedback Copyright (c) 2004-2013, Texas Instruments Incorporated Product Folder Links: LM3671 LM3671Q LM3671 LM3671Q www.ti.com SNVS294Q - NOVEMBER 2004 - REVISED NOVEMBER 2013 TYPICAL PERFORMANCE CHARACTERISTICS (continued) LM3671MF/TL/LC, Circuit of Figure 1, VIN= 3.6V, VOUT= 1.5V, TA= 25C, unless otherwise noted. Mode Change by Load Transients VOUT = 1.5V (PFM to PWM) Mode Change by Load Transients VOUT = 1.5V (PWM to PFM) Figure 31. Figure 32. Mode Change by Load Transients VOUT = 2.5V (PFM to PWM) Mode Change by Load Transients VOUT = 2.5V (PWM to PFM) Figure 33. Figure 34. Start Up into PWM Mode VOUT = 1.5V (Output Current= 300 mA) Start Up into PWM Mode VOUT = 2.5V (Output Current= 300 mA) 2V/DIV VSW IOUT = 300 mA 500 mA/DIV IL VOUT VIN = 3.6V 1V/DIV VOUT = 1.5V 2V/DIV EN TIME (100 Ps/DIV) Figure 35. Figure 36. Submit Documentation Feedback Copyright (c) 2004-2013, Texas Instruments Incorporated Product Folder Links: LM3671 LM3671Q 13 LM3671 LM3671Q SNVS294Q - NOVEMBER 2004 - REVISED NOVEMBER 2013 www.ti.com TYPICAL PERFORMANCE CHARACTERISTICS (continued) LM3671MF/TL/LC, Circuit of Figure 1, VIN= 3.6V, VOUT= 1.5V, TA= 25C, unless otherwise noted. Start Up into PFM Mode VOUT = 1.5V (Output Current= 1mA) 2V/DIV VSW VOUT Start Up into PFM Mode VOUT = 2.5V (Output Current= 1mA) 500 mV/DIV VIN = 3.6V VOUT = 1.5V IOUT = 1 mA 2V/DIV EN TIME (100 Ps/DIV) Figure 37. 14 Figure 38. Submit Documentation Feedback Copyright (c) 2004-2013, Texas Instruments Incorporated Product Folder Links: LM3671 LM3671Q LM3671 LM3671Q www.ti.com SNVS294Q - NOVEMBER 2004 - REVISED NOVEMBER 2013 OPERATION DESCRIPTION Device Information The LM3671, a high-efficiency step-down DC-DC switching buck converter, delivers a constant voltage from a single Li-Ion battery and input voltage rails from 2.7V to 5.5V to portable devices such as cell phones and PDAs. Using a voltage mode architecture with synchronous rectification, the LM3671 has the ability to deliver up to 600 mA depending on the input voltage, output voltage, ambient temperature and the inductor chosen. There are three modes of operation depending on the current required (Pulse Frequency Modulation), and shutdown. The device operates approximately 80 mA or higher. Lighter load current cause the device reduced current consumption (IQ = 16 A typ) and a longer battery life. offering the lowest current consumption (ISHUTDOWN = 0.01 A typ). PWM (Pulse Width Modulation), PFM in PWM mode at load current of to automatically switch into PFM for Shutdown mode turns off the device, Additional features include soft-start, under-voltage protection, current overload protection, and thermal shutdown protection. As shown in Figure 1, only three external power components are required for implementation. The part uses an internal reference voltage of 0.5V. It is recommended to keep the part in shutdown until the input voltage is 2.7V or higher. Circuit Operation During the first portion of each switching cycle, the control block in the LM3671 turns on the internal PFET switch. This allows current to flow from the input through the inductor to the output filter capacitor and load. The inductor limits the current to a ramp with a slope of (VIN-VOUT)/L, by storing energy in a magnetic field. During the second portion of each cycle, the controller turns the PFET switch off, blocking current flow from the input, and then turns the NFET synchronous rectifier on. The inductor draws current from ground through the NFET to the output filter capacitor and load, which ramps the inductor current down with a slope of - VOUT/L. The output filter stores charge when the inductor current is high, and releases it when inductor current is low, smoothing the voltage across the load. The output voltage is regulated by modulating the PFET switch on time to control the average current sent to the load. The effect is identical to sending a duty-cycle modulated rectangular wave formed by the switch and synchronous rectifier at the SW pin to a low-pass filter formed by the inductor and output filter capacitor. The output voltage is equal to the average voltage at the SW pin. PWM Operation During PWM operation the converter operates as a voltage-mode controller with input voltage feed forward. This allows the converter to achieve good load and line regulation. The DC gain of the power stage is proportional to the input voltage. To eliminate this dependence, feed forward inversely proportional to the input voltage is introduced. While in PWM mode, the output voltage is regulated by switching at a constant frequency and then modulating the energy per cycle to control power to the load. At the beginning of each clock cycle the PFET switch is turned on and the inductor current ramps up until the comparator trips and the control logic turns off the switch. The current limit comparator can also turn off the switch in case the current limit of the PFET is exceeded. Then the NFET switch is turned on and the inductor current ramps down. The next cycle is initiated by the clock turning off the NFET and turning on the PFET. Submit Documentation Feedback Copyright (c) 2004-2013, Texas Instruments Incorporated Product Folder Links: LM3671 LM3671Q 15 LM3671 LM3671Q SNVS294Q - NOVEMBER 2004 - REVISED NOVEMBER 2013 www.ti.com VSW 2V/DIV IL 200 mA/DIV VIN = 3.6V VOUT = 1.5V IOUT = 400 mA VOUT 10 mV/DIV AC Coupled TIME (200 ns/DIV) Figure 39. Typical PWM Operation Internal Synchronous Rectification While in PWM mode, the LM3671 uses an internal NFET as a synchronous rectifier to reduce rectifier forward voltage drop and associated power loss. Synchronous rectification provides a significant improvement in efficiency whenever the output voltage is relatively low compared to the voltage drop across an ordinary rectifier diode. Current Limiting A current limit feature allows the LM3671 to protect itself and external components during overload conditions. PWM mode implements current limiting using an internal comparator that trips at 1020 mA (typ.). If the output is shorted to ground the device enters a timed current limit mode where the NFET is turned on for a longer duration until the inductor current falls below a low threshold. This allows the inductor current more time to decay, thereby preventing runaway. PFM Operation At very light load, the converter enters PFM mode and operates with reduced switching frequency and supply current to maintain high efficiency. The part automatically transitions into PFM mode when either of two conditions occurs for a duration of 32 or more clock cycles: A. The NFET current reaches zero. B. The peak PMOS switch current drops below the IMODE level, (Typically IMODE < 30 mA + VIN/42 ). 2V/DIV VSW IL 200 mA/DIV VIN = 3.6V VOUT = 1.5V IOUT = 20 mA VOUT 20 mV/DIV AC Coupled TIME (4 Ps/DIV) Figure 40. Typical PFM Operation 16 Submit Documentation Feedback Copyright (c) 2004-2013, Texas Instruments Incorporated Product Folder Links: LM3671 LM3671Q LM3671 LM3671Q www.ti.com SNVS294Q - NOVEMBER 2004 - REVISED NOVEMBER 2013 During PFM operation, the converter positions the output voltage slightly higher than the nominal output voltage during PWM operation, allowing additional headroom for voltage drop during a load transient from light to heavy load. The PFM comparators sense the output voltage via the feedback pin and control the switching of the output FETs such that the output voltage ramps between ~0.6% and ~1.7% above the nominal PWM output voltage. If the output voltage is below the `high' PFM comparator threshold, the PMOS power switch is turned on. It remains on until the output voltage reaches the `high' PFM threshold or the peak current exceeds the IPFM level set for PFM mode. The typical peak current in PFM mode is: IPFM = 112 mA + VIN/27 . Once the PMOS power switch is turned off, the NMOS power switch is turned on until the inductor current ramps to zero. When the NMOS zero-current condition is detected, the NMOS power switch is turned off. If the output voltage is below the `high' PFM comparator threshold (see Figure 41), the PMOS switch is again turned on and the cycle is repeated until the output reaches the desired level. Once the output reaches the `high' PFM threshold, the NMOS switch is turned on briefly to ramp the inductor current to zero and then both output switches are turned off and the part enters an extremely low power mode. Quiescent supply current during this `sleep' mode is 16 A (typ.), which allows the part to achieve high efficiency under extremely light load conditions. If the load current should increase during PFM mode (see Figure 41) causing the output voltage to fall below the `low2' PFM threshold, the part will automatically transition into fixed-frequency PWM mode. When VIN =2.7V the part transitions from PWM to PFM mode at ~35 mA output current and from PFM to PWM mode at ~85 mA , when VIN=3.6V, PWM to PFM transition happens at ~50 mA and PFM to PWM transition happens at ~100 mA, when VIN =4.5V, PWM to PFM transition happens at ~65 mA and PFM to PWM transition happens at ~115 mA. High PFM Threshold ~1.017*Vout PFM Mode at Light Load Load current increases Low1 PFM Threshold ~1.006*Vout ZA xi s High PFM Voltage Threshold reached, go into sleep mode Low PFM Threshold, turn on PFET Low2 PFM Threshold, switch back to PWMmode Zs Axi Pfet on until Ipfm limit reached Nfet on drains inductor current until I inductor = 0 Current load increases, draws Vout towards Low2 PFM Threshold Low2 PFM Threshold Vout PWM Mode at Moderate to Heavy Loads Figure 41. Operation in PFM Mode and Transfer to PWM Mode Shutdown Mode Setting the EN input pin low (<0.4V) places the LM3671 in shutdown mode. During shutdown the PFET switch, NFET switch, reference, control and bias circuitry of the LM3671 are turned off. Setting EN high (>1.0V) enables normal operation. It is recommended to set EN pin low to turn off the LM3671 during system power up and undervoltage conditions when the supply is less than 2.7V. Do not leave the EN pin floating. Soft Start The LM3671 has a soft-start circuit that limits in-rush current during startup. During startup the switch current limit is increased in steps. Soft start is activated only if EN goes from logic low to logic high after Vin reaches 2.7V. Soft start is implemented by increasing switch current limit in steps of 70 mA, 140 mA, 280 mA and 1020 mA (typical switch current limit). The startup time thereby depends on the output capacitor and load current demanded at startup. Typical startup times with a 10 F output capacitor and 300 mA load is 400 s and with 1mA load is 275 s. Submit Documentation Feedback Copyright (c) 2004-2013, Texas Instruments Incorporated Product Folder Links: LM3671 LM3671Q 17 LM3671 LM3671Q SNVS294Q - NOVEMBER 2004 - REVISED NOVEMBER 2013 www.ti.com LDO - Low Dropout Operation The LM3671-ADJ can operate at 100% duty cycle (no switching; PMOS switch completely on) for low dropout support of the output voltage. In this way the output voltage will be controlled down to the lowest possible input voltage. When the device operates near 100% duty cycle, output voltage ripple is approximately 25 mV. The minimum input voltage needed to support the output voltage is VIN, MIN = ILOAD * (RDSON, PFET + RINDUCTOR) + VOUT where * * * 18 ILOAD: Load current RDSON, PFET: Drain to source resistance of PFET switch in the triode region RINDUCTOR: Inductor resistance Submit Documentation Feedback (1) Copyright (c) 2004-2013, Texas Instruments Incorporated Product Folder Links: LM3671 LM3671Q LM3671 LM3671Q www.ti.com SNVS294Q - NOVEMBER 2004 - REVISED NOVEMBER 2013 APPLICATION INFORMATION Output Voltage Selection for LM3671-ADJ The output voltage of the adjustable parts can be programmed through the resistor network connected from VOUT to FB, then to GND. VOUT is adjusted to make the voltage at FB equal to 0.5V. The resistor from FB to GND (R2) should be 200 k to keep the current drawn through this network well below the 16 A quiescent current level (PFM mode) but large enough that it is not susceptible to noise. If R2 is 200 k, and VFB is 0.5V, the current through the resistor feedback network will be 2.5 A. The output voltage of the adjustable parts ranges from 1.1V to 3.3V. The formula for output voltage selection is: VOUT = VFB 1 + R1 * (c) R2 where * * * * VOUT: output voltage (volts) VFB : feedback voltage = 0.5V R1: feedback resistor from VOUT to FB R2: feedback resistor from FB to GND (2) For any output voltage greater than or equal to 1.1V, a zero must be added around 45 kHz for stability. The formula for calculation of C1 is: 1 (2 * S * R1 * 45 kHz) C1 = (3) For output voltages higher than 2.5V, a pole must be placed at 45 kHz as well. If the pole and zero are at the same frequency the formula for calculation of C2 is: 1 (2 * S * R2 * 45 kHz) C2 = (4) The formula for location of zero and pole frequency created by adding C1 and C2 is given below. By adding C1, a zero as well as a higher frequency pole is introduced. Fz = 1 (2 * S * R1 * C1) (5) Fp = 1 2 * S * (R1 R2) * (C1+C2) (6) See the "LM3671-ADJ configurations for various VOUT" table. Table 1. LM3671-ADJ Configurations For Various VOUT (Circuit of Figure 2) (Refer to Note 11 for VIN requirements) VOUT(V) R1(k) R2 (k) C1 (pF) C2 (pF) L (H) CIN (F) COUT(F) 0.90 160 200 22 none 2.2 4.7 10 1.1 240 200 15 none 2.2 4.7 10 1.2 280 200 12 none 2.2 4.7 10 1.3 320 200 12 none 2.2 4.7 10 1.5 357 178 10 none 2.2 4.7 10 1.6 442 200 8.2 none 2.2 4.7 10 1.7 432 178 8.2 none 2.2 4.7 10 1.8 464 178 8.2 none 2.2 4.7 10 1.875 523 191 6.8 none 2.2 4.7 10 2.5 402 100 8.2 none 2.2 4.7 10 2.8 464 100 8.2 33 2.2 4.7 10 3.3 562 100 6.8 33 2.2 4.7 10 Submit Documentation Feedback Copyright (c) 2004-2013, Texas Instruments Incorporated Product Folder Links: LM3671 LM3671Q 19 LM3671 LM3671Q SNVS294Q - NOVEMBER 2004 - REVISED NOVEMBER 2013 www.ti.com Inductor Selection There are two main considerations when choosing an inductor; the inductor should not saturate, and the inductor current ripple should be small enough to achieve the desired output voltage ripple. Different saturation current rating specifications are followed by different manufacturers so attention must be given to details. Saturation current ratings are typically specified at 25C. However, ratings at the maximum ambient temperature of application should be requested from the manufacturer. The minimum value of inductance to specify good performance is 1.76 H at ILIM (typ.) dc current over the ambient temperature range. Shielded inductors radiate less noise and should be preferred. There are two methods to choose the inductor saturation current rating. Method 1: The saturation current should be greater than the sum of the maximum load current and the worst case average to peak inductor current. This can be written as ISAT ! IOUTMAX + IRIPPLE where IRIPPLE = VIN - VOUT * VOUT * 1 * 2 L VIN f (c) (c) (c) where * * * * * * IRIPPLE: average to peak inductor current IOUTMAX: maximum load current (600 mA) VIN: maximum input voltage in application L : min inductor value including worst case tolerances (30% drop can be considered for method 1) f : minimum switching frequency (1.6 Mhz) VOUT: output voltage (7) Method 2: A more conservative and recommended approach is to choose an inductor that has a saturation current rating greater than the maximum current limit of 1150mA. A 2.2 H inductor with a saturation current rating of at least 1150 mA is recommended for most applications. The inductor's resistance should be less than 0.3 for good efficiency. Table 2 lists suggested inductors and suppliers. For low-cost applications, an unshielded bobbin inductor could be considered. For noise critical applications, a toroidal or shielded-bobbin inductor should be used. A good practice is to lay out the board with overlapping footprints of both types for design flexibility. This allows substitution of a low-noise shielded inductor, in the event that noise from low-cost bobbin models is unacceptable. Input Capacitor Selection A ceramic input capacitor of 4.7 F, 6.3V is sufficient for most applications. Place the input capacitor as close as possible to the VIN pin of the device. A larger value may be used for improved input voltage filtering. Use X7R or X5R types; do not use Y5V. DC bias characteristics of ceramic capacitors must be considered when selecting case sizes like 0805 and 0603. The minimum input capacitance to specify good performance is 2.2 F at 3V dc bias; 1.5 F at 5V dc bias including tolerances and over ambient temperature range. The input filter capacitor supplies current to the PFET switch of the LM3671 in the first half of each cycle and reduces voltage ripple imposed on the input power source. A ceramic capacitor's low ESR provides the best noise filtering of the input voltage spikes due to this rapidly changing current. Select a capacitor with sufficient ripple current rating. The input current ripple can be calculated as: VOUT IRMS = IOUTMAX VIN 1 (c) VOUT VIN + r 2 12 * (VIN - VOUT) VOUT r= L f IOUTMAX VIN The worst case is when VIN = 2 VOUT 20 (8) Submit Documentation Feedback Copyright (c) 2004-2013, Texas Instruments Incorporated Product Folder Links: LM3671 LM3671Q LM3671 LM3671Q www.ti.com SNVS294Q - NOVEMBER 2004 - REVISED NOVEMBER 2013 Table 2. Suggested Inductors and Their Suppliers Model Vendor Dimensions LxWxH(mm) D.C.R (max) DO3314-222MX Coilcraft 3.3 x 3.3 x 1.4 200 m LPO3310-222MX Coilcraft 3.3 x 3.3 x 1.0 150 m ELL5GM2R2N Panasonic 5.2 x 5.2 x 1.5 53 m CDRH2D14NP-2R2NC Sumida 3.2 x 3.2 x 1.55 94 m Output Capacitor Selection A ceramic output capacitor of 10 F, 6.3V is sufficient for most applications. Use X7R or X5R types; do not use Y5V. DC bias characteristics of ceramic capacitors must be considered when selecting case sizes like 0805 and 0603. DC bias characteristics vary from manufacturer to manufacturer and dc bias curves should be requested from them as part of the capacitor selection process. The minimum output capacitance to specify good performance is 5.75 F at 1.8V dc bias including tolerances and over ambient temperature range. The output filter capacitor smoothes out current flow from the inductor to the load, helps maintain a steady output voltage during transient load changes and reduces output voltage ripple. These capacitors must be selected with sufficient capacitance and sufficiently low ESR to perform these functions. The output voltage ripple is caused by the charging and discharging of the output capacitor and by the RESR and can be calculated as: Voltage peak-to-peak ripple due to capacitance can be expressed as follow: VPP-C = IRIPPLE 4*f*C (9) Voltage peak-to-peak ripple due to ESR can be expressed as follow: VPP-ESR = (2 * IRIPPLE) * RESR Because these two components are out of phase the rms (root mean squared) value can be used to get an approximate value of peak-to-peak ripple. The peak-to-peak ripple voltage, rms value can be expressed as follow: VPP-RMS = VPP-C2 + VPP-ESR2 (10) Note that the output voltage ripple is dependent on the inductor current ripple and the equivalent series resistance of the output capacitor (RESR). The RESR is frequency dependent (as well as temperature dependent); make sure the value used for calculations is at the switching frequency of the part. Table 3. Suggested Capacitors and Their Suppliers Model Type Vendor Voltage Rating Case Size Inch (mm) 4.7 F for CIN C2012X5R0J475K Ceramic, X5R TDK 6.3V 0805 (2012) JMK212BJ475K Ceramic, X5R Taiyo-Yuden 6.3V 0805 (2012) GRM21BR60J475K Ceramic, X5R Murata 6.3V 0805 (2012) C1608X5R0J475K Ceramic, X5R TDK 6.3V 0603 (1608) GRM21BR60J106K Ceramic, X5R Murata 6.3V 0805 (2012) 10 F for COUT JMK212BJ106K Ceramic, X5R Taiyo-Yuden 6.3V 0805 (2012) C2012X5R0J106K Ceramic, X5R TDK 6.3V 0805 (2012) C1608X5R0J106K Ceramic, X5R TDK 6.3V 0603 (1608) Submit Documentation Feedback Copyright (c) 2004-2013, Texas Instruments Incorporated Product Folder Links: LM3671 LM3671Q 21 LM3671 LM3671Q SNVS294Q - NOVEMBER 2004 - REVISED NOVEMBER 2013 www.ti.com DSBGA Package Assembly and Use Use of the DSBGA package requires specialized board layout, precision mounting and careful re-flow techniques, as detailed in Texas Instruments Application Note AN-1112 (Literature Number SNVA009). Refer to the section "Surface Mount Technology (DSBGA) Assembly Considerations". For best results in assembly, alignment ordinals on the PC board should be used to facilitate placement of the device. The pad style used with DSBGA package must be the NSMD (non-solder mask defined) type. This means that the solder-mask opening is larger than the pad size. This prevents a lip that otherwise forms if the solder-mask and pad overlap, from holding the device off the surface of the board and interfering with mounting. See Application Note AN-1112 (Literature Number SNVA009) for specific instructions how to do this. The 5-bump package used for LM3671 has 300 micron solder balls and requires 10.82 mils pads for mounting on the circuit board. The trace to each pad should enter the pad with a 90 entry angle to prevent debris from being caught in deep corners. Initially, the trace to each pad should be 7 mil wide, for a section approximately 7 mil long or longer, as a thermal relief. Then each trace should neck up or down to its optimal width. The important criteria is symmetry. This ensures the solder bumps on the LM3671 re-flow evenly and that the device solders level to the board. In particular, special attention must be paid to the pads for bumps A1 and A3, because VIN and GND are typically connected to large copper planes, inadequate thermal relief can result in late or inadequate re-flow of these bumps. The DSBGA package is optimized for the smallest possible size in applications with red or infrared opaque cases. Because the DSBGA package lacks the plastic encapsulation characteristic of larger devices, it is vulnerable to light. Backside metallization and/or epoxy coating, along with front-side shading by the printed circuit board, reduce this sensitivity. However, the package has exposed die edges. In particular, DSBGA devices are sensitive to light, in the red and infrared range, shining on the package's exposed die edges. BOARD LAYOUT CONSIDERATIONS PC board layout is an important part of DC-DC converter design. Poor board layout can disrupt the performance of a DC-DC converter and surrounding circuitry by contributing to EMI, ground bounce, and resistive voltage loss in the traces. These can send erroneous signals to the DC-DC converter IC, resulting in poor regulation or instability. Good layout for the LM3671 can be implemented by following a few simple design rules below. Refer to Figure 42 for top layer board layout. 1. Place the LM3671, inductor and filter capacitors close together and make the traces short. The traces between these components carry relatively high switching currents and act as antennas. Following this rule reduces radiated noise. Special care must be given to place the input filter capacitor very close to the VIN and GND pin. 2. Arrange the components so that the switching current loops curl in the same direction. During the first half of each cycle, current flows from the input filter capacitor through the LM3671 and inductor to the output filter capacitor and back through ground, forming a current loop. In the second half of each cycle, current is pulled up from ground through the LM3671 by the inductor to the output filter capacitor and then back through ground forming a second current loop. Routing these loops so the current curls in the same direction prevents magnetic field reversal between the two half-cycles and reduces radiated noise. 3. Connect the ground pins of the LM3671 and filter capacitors together using generous component-side copper fill as a pseudo-ground plane. Then, connect this to the ground-plane (if one is used) with several vias. This reduces ground-plane noise by preventing the switching currents from circulating through the ground plane. It also reduces ground bounce at the LM3671 by giving it a low-impedance ground connection. 4. Use wide traces between the power components and for power connections to the DC-DC converter circuit. This reduces voltage errors caused by resistive losses across the traces. 5. Route noise sensitive traces, such as the voltage feedback path, away from noisy traces between the power components. The voltage feedback trace must remain close to the LM3671 circuit and should be direct but should be routed opposite to noisy components. This reduces EMI radiated onto the DC-DC converter's own voltage feedback trace. A good approach is to route the feedback trace on another layer and to have a ground plane between the top layer and layer on which the feedback trace is routed. In the same manner for the adjustable part it is desired to have the feedback dividers on the bottom layer. 6. Place noise sensitive circuitry, such as radio IF blocks, away from the DC-DC converter, CMOS digital blocks and other noisy circuitry. Interference with noise-sensitive circuitry in the system can be reduced through distance. 22 Submit Documentation Feedback Copyright (c) 2004-2013, Texas Instruments Incorporated Product Folder Links: LM3671 LM3671Q LM3671 LM3671Q www.ti.com SNVS294Q - NOVEMBER 2004 - REVISED NOVEMBER 2013 In mobile phones, for example, a common practice is to place the DC-DC converter on one corner of the board, arrange the CMOS digital circuitry around it (since this also generates noise), and then place sensitive preamplifiers and IF stages on the diagonally opposing corner. Often, the sensitive circuitry is shielded with a metal pan and power to it is post-regulated to reduce conducted noise, using low-dropout linear regulators. Figure 42. Top Layer Board Layout For SOT-23 Submit Documentation Feedback Copyright (c) 2004-2013, Texas Instruments Incorporated Product Folder Links: LM3671 LM3671Q 23 LM3671 LM3671Q SNVS294Q - NOVEMBER 2004 - REVISED NOVEMBER 2013 www.ti.com REVISION HISTORY Changes from Revision P (May 2013) to Revision Q * Added LM3671QTL/X-1.8/NOPB to Ordering Table ............................................................................................................. 4 Changes from Revision O (April 2013) to Revision P * 24 Page Page Changed layout of National Data Sheet to TI format .......................................................................................................... 23 Submit Documentation Feedback Copyright (c) 2004-2013, Texas Instruments Incorporated Product Folder Links: LM3671 LM3671Q PACKAGE OPTION ADDENDUM www.ti.com 26-Nov-2013 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (C) Device Marking (4/5) LM3671LC-1.2/NOPB ACTIVE USON NKH 6 1000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM S39 LM3671LC-1.3/NOPB ACTIVE USON NKH 6 1000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM S40 LM3671LC-1.6/NOPB ACTIVE USON NKH 6 1000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM S41 LM3671LC-1.8/NOPB ACTIVE USON NKH 6 1000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM S42 LM3671LCX-1.2/NOPB ACTIVE USON NKH 6 4500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM S39 LM3671LCX-1.3/NOPB ACTIVE USON NKH 6 4500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM S40 LM3671LCX-1.6/NOPB ACTIVE USON NKH 6 4500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM S41 LM3671LCX-1.8/NOPB ACTIVE USON NKH 6 4500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM S42 LM3671MF-1.2 NRND SOT-23 DBV 5 1000 TBD Call TI Call TI -30 to 85 SBPB LM3671MF-1.2/NOPB ACTIVE SOT-23 DBV 5 1000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -30 to 85 SBPB LM3671MF-1.25/NOPB ACTIVE SOT-23 DBV 5 1000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -30 to 85 SDRB LM3671MF-1.375/NOPB ACTIVE SOT-23 DBV 5 1000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -30 to 85 SEDB LM3671MF-1.5/NOPB ACTIVE SOT-23 DBV 5 1000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -30 to 85 SBRB LM3671MF-1.6 NRND SOT-23 DBV 5 1000 TBD Call TI Call TI -30 to 85 SDUB LM3671MF-1.6/NOPB ACTIVE SOT-23 DBV 5 1000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -30 to 85 SDUB LM3671MF-1.8/NOPB ACTIVE SOT-23 DBV 5 1000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -30 to 85 SBSB LM3671MF-1.875/NOPB ACTIVE SOT-23 DBV 5 1000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -30 to 85 SDVB LM3671MF-2.5/NOPB ACTIVE SOT-23 DBV 5 1000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -30 to 85 SJRB Addendum-Page 1 Samples PACKAGE OPTION ADDENDUM www.ti.com Orderable Device 26-Nov-2013 Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (C) Device Marking (4/5) LM3671MF-2.8 NRND SOT-23 DBV 5 1000 TBD Call TI Call TI -30 to 85 SJSB LM3671MF-2.8/NOPB ACTIVE SOT-23 DBV 5 1000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -30 to 85 SJSB LM3671MF-3.3/NOPB ACTIVE SOT-23 DBV 5 1000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -30 to 85 SJEB LM3671MF-ADJ/NOPB ACTIVE SOT-23 DBV 5 1000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -30 to 85 SBTB LM3671MFX-1.2/NOPB ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -30 to 85 SBPB LM3671MFX-1.25/NOPB ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -30 to 85 SDRB LM3671MFX-1.375/NOPB ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -30 to 85 SEDB LM3671MFX-1.5/NOPB ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -30 to 85 SBRB LM3671MFX-1.6/NOPB ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -30 to 85 SDUB LM3671MFX-1.8/NOPB ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -30 to 85 SBSB LM3671MFX-1.875/NOPB ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -30 to 85 SDVB LM3671MFX-2.5/NOPB ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -30 to 85 SJRB LM3671MFX-2.8/NOPB ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -30 to 85 SJSB LM3671MFX-3.3/NOPB ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -30 to 85 SJEB LM3671MFX-ADJ/NOPB ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -30 to 85 SBTB LM3671QMF-1.2/NOPB ACTIVE SOT-23 DBV 5 1000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 SH4B LM3671QMFX-1.2/NOPB ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 SH4B LM3671QTL-1.8/NOPB PREVIEW DSBGA YZR 5 250 TBD Call TI Call TI -40 to 125 LM3671QTLX-1.8/NOPB PREVIEW DSBGA YZR 5 3000 TBD Call TI Call TI -40 to 125 Addendum-Page 2 Samples PACKAGE OPTION ADDENDUM www.ti.com Orderable Device 26-Nov-2013 Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (C) Device Marking (4/5) LM3671TL-1.2/NOPB ACTIVE DSBGA YZR 5 250 Green (RoHS & no Sb/Br) SNAGCU Level-1-260C-UNLIM -30 to 85 C LM3671TL-1.5/NOPB ACTIVE DSBGA YZR 5 250 Green (RoHS & no Sb/Br) SNAGCU Level-1-260C-UNLIM -30 to 85 D LM3671TL-1.8/NOPB ACTIVE DSBGA YZR 5 250 Green (RoHS & no Sb/Br) SNAGCU Level-1-260C-UNLIM -30 to 85 B LM3671TL-1.875/NOPB ACTIVE DSBGA YZR 5 250 Green (RoHS & no Sb/Br) SNAGCU Level-1-260C-UNLIM -30 to 85 S LM3671TL-2.5/NOPB ACTIVE DSBGA YZR 5 250 Green (RoHS & no Sb/Br) SNAGCU Level-1-260C-UNLIM -30 to 85 L LM3671TL-2.8/NOPB ACTIVE DSBGA YZR 5 250 Green (RoHS & no Sb/Br) SNAGCU Level-1-260C-UNLIM -30 to 85 K LM3671TL-3.3/NOPB ACTIVE DSBGA YZR 5 250 Green (RoHS & no Sb/Br) SNAGCU Level-1-260C-UNLIM -30 to 85 J LM3671TL-ADJ/NOPB ACTIVE DSBGA YZR 5 250 Green (RoHS & no Sb/Br) SNAGCU Level-1-260C-UNLIM -30 to 85 E LM3671TLX-1.2/NOPB ACTIVE DSBGA YZR 5 3000 Green (RoHS & no Sb/Br) SNAGCU Level-1-260C-UNLIM -30 to 85 C LM3671TLX-1.5/NOPB ACTIVE DSBGA YZR 5 3000 Green (RoHS & no Sb/Br) SNAGCU Level-1-260C-UNLIM -30 to 85 D LM3671TLX-1.8/NOPB ACTIVE DSBGA YZR 5 3000 Green (RoHS & no Sb/Br) SNAGCU Level-1-260C-UNLIM -30 to 85 B LM3671TLX-1.875/NOPB ACTIVE DSBGA YZR 5 3000 Green (RoHS & no Sb/Br) SNAGCU Level-1-260C-UNLIM -30 to 85 S LM3671TLX-2.5/NOPB ACTIVE DSBGA YZR 5 3000 Green (RoHS & no Sb/Br) SNAGCU Level-1-260C-UNLIM -30 to 85 L LM3671TLX-2.8/NOPB ACTIVE DSBGA YZR 5 3000 Green (RoHS & no Sb/Br) SNAGCU Level-1-260C-UNLIM -30 to 85 K LM3671TLX-3.3/NOPB ACTIVE DSBGA YZR 5 3000 Green (RoHS & no Sb/Br) SNAGCU Level-1-260C-UNLIM -30 to 85 J LM3671TLX-ADJ/NOPB ACTIVE DSBGA YZR 5 3000 Green (RoHS & no Sb/Br) SNAGCU Level-1-260C-UNLIM -30 to 85 E (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. Addendum-Page 3 Samples PACKAGE OPTION ADDENDUM www.ti.com 26-Nov-2013 PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. OTHER QUALIFIED VERSIONS OF LM3671, LM3671-Q1 : * Catalog: LM3671 * Automotive: LM3671-Q1 NOTE: Qualified Version Definitions: * Catalog - TI's standard catalog product Addendum-Page 4 PACKAGE OPTION ADDENDUM www.ti.com 26-Nov-2013 * Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects Addendum-Page 5 PACKAGE MATERIALS INFORMATION www.ti.com 19-Nov-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant LM3671LC-1.2/NOPB USON NKH 6 1000 178.0 12.4 2.2 2.2 1.0 8.0 12.0 Q1 LM3671LC-1.3/NOPB USON NKH 6 1000 178.0 12.4 2.2 2.2 1.0 8.0 12.0 Q1 LM3671LC-1.6/NOPB USON NKH 6 1000 178.0 12.4 2.2 2.2 1.0 8.0 12.0 Q1 LM3671LC-1.8/NOPB USON NKH 6 1000 178.0 12.4 2.2 2.2 1.0 8.0 12.0 Q1 LM3671LCX-1.2/NOPB USON NKH 6 4500 330.0 12.4 2.2 2.2 1.0 8.0 12.0 Q1 LM3671LCX-1.3/NOPB USON NKH 6 4500 330.0 12.4 2.2 2.2 1.0 8.0 12.0 Q1 LM3671LCX-1.6/NOPB USON NKH 6 4500 330.0 12.4 2.2 2.2 1.0 8.0 12.0 Q1 LM3671LCX-1.8/NOPB USON NKH 6 4500 330.0 12.4 2.2 2.2 1.0 8.0 12.0 Q1 LM3671MF-1.2 SOT-23 DBV 5 1000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LM3671MF-1.2/NOPB SOT-23 DBV 5 1000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LM3671MF-1.25/NOPB SOT-23 DBV 5 1000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LM3671MF-1.375/NOPB SOT-23 DBV 5 1000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LM3671MF-1.5/NOPB SOT-23 DBV 5 1000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LM3671MF-1.6 SOT-23 DBV 5 1000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LM3671MF-1.6/NOPB SOT-23 DBV 5 1000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LM3671MF-1.8/NOPB SOT-23 DBV 5 1000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LM3671MF-1.875/NOPB SOT-23 DBV 5 1000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LM3671MF-2.5/NOPB SOT-23 DBV 5 1000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 19-Nov-2013 Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant LM3671MF-2.8 SOT-23 DBV 5 1000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LM3671MF-2.8/NOPB SOT-23 DBV 5 1000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LM3671MF-3.3/NOPB SOT-23 DBV 5 1000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LM3671MF-ADJ/NOPB SOT-23 DBV 5 1000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LM3671MFX-1.2/NOPB SOT-23 DBV 5 3000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LM3671MFX-1.25/NOPB SOT-23 DBV 5 3000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LM3671MFX-1.375/NOPB SOT-23 DBV 5 3000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LM3671MFX-1.5/NOPB SOT-23 DBV 5 3000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LM3671MFX-1.6/NOPB SOT-23 DBV 5 3000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LM3671MFX-1.8/NOPB SOT-23 DBV 5 3000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LM3671MFX-1.875/NOPB SOT-23 DBV 5 3000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LM3671MFX-2.5/NOPB SOT-23 DBV 5 3000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LM3671MFX-2.8/NOPB SOT-23 DBV 5 3000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LM3671MFX-3.3/NOPB SOT-23 DBV 5 3000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LM3671MFX-ADJ/NOPB SOT-23 DBV 5 3000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LM3671QMF-1.2/NOPB SOT-23 DBV 5 1000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LM3671QMFX-1.2/NOPB SOT-23 DBV 5 3000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LM3671TL-1.2/NOPB DSBGA YZR 5 250 178.0 8.4 1.14 1.47 0.76 4.0 8.0 Q1 LM3671TL-1.5/NOPB DSBGA YZR 5 250 178.0 8.4 1.14 1.47 0.76 4.0 8.0 Q1 LM3671TL-1.8/NOPB DSBGA YZR 5 250 178.0 8.4 1.14 1.47 0.76 4.0 8.0 Q1 LM3671TL-1.875/NOPB DSBGA YZR 5 250 178.0 8.4 1.14 1.47 0.76 4.0 8.0 Q1 LM3671TL-2.5/NOPB DSBGA YZR 5 250 178.0 8.4 1.14 1.47 0.76 4.0 8.0 Q1 LM3671TL-2.8/NOPB DSBGA YZR 5 250 178.0 8.4 1.14 1.47 0.76 4.0 8.0 Q1 LM3671TL-3.3/NOPB DSBGA YZR 5 250 178.0 8.4 1.14 1.47 0.76 4.0 8.0 Q1 LM3671TL-ADJ/NOPB DSBGA YZR 5 250 178.0 8.4 1.14 1.47 0.76 4.0 8.0 Q1 LM3671TLX-1.2/NOPB DSBGA YZR 5 3000 178.0 8.4 1.14 1.47 0.76 4.0 8.0 Q1 LM3671TLX-1.5/NOPB DSBGA YZR 5 3000 178.0 8.4 1.14 1.47 0.76 4.0 8.0 Q1 LM3671TLX-1.8/NOPB DSBGA YZR 5 3000 178.0 8.4 1.14 1.47 0.76 4.0 8.0 Q1 LM3671TLX-1.875/NOPB DSBGA YZR 5 3000 178.0 8.4 1.14 1.47 0.76 4.0 8.0 Q1 LM3671TLX-2.5/NOPB DSBGA YZR 5 3000 178.0 8.4 1.14 1.47 0.76 4.0 8.0 Q1 LM3671TLX-2.8/NOPB DSBGA YZR 5 3000 178.0 8.4 1.14 1.47 0.76 4.0 8.0 Q1 LM3671TLX-3.3/NOPB DSBGA YZR 5 3000 178.0 8.4 1.14 1.47 0.76 4.0 8.0 Q1 LM3671TLX-ADJ/NOPB DSBGA YZR 5 3000 178.0 8.4 1.14 1.47 0.76 4.0 8.0 Q1 Pack Materials-Page 2 PACKAGE MATERIALS INFORMATION www.ti.com 19-Nov-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) LM3671LC-1.2/NOPB USON NKH 6 1000 210.0 185.0 35.0 LM3671LC-1.3/NOPB USON NKH 6 1000 210.0 185.0 35.0 LM3671LC-1.6/NOPB USON NKH 6 1000 210.0 185.0 35.0 LM3671LC-1.8/NOPB USON NKH 6 1000 210.0 185.0 35.0 LM3671LCX-1.2/NOPB USON NKH 6 4500 367.0 367.0 35.0 LM3671LCX-1.3/NOPB USON NKH 6 4500 367.0 367.0 35.0 LM3671LCX-1.6/NOPB USON NKH 6 4500 367.0 367.0 35.0 LM3671LCX-1.8/NOPB USON NKH 6 4500 367.0 367.0 35.0 LM3671MF-1.2 SOT-23 DBV 5 1000 210.0 185.0 35.0 LM3671MF-1.2/NOPB SOT-23 DBV 5 1000 210.0 185.0 35.0 LM3671MF-1.25/NOPB SOT-23 DBV 5 1000 210.0 185.0 35.0 LM3671MF-1.375/NOPB SOT-23 DBV 5 1000 210.0 185.0 35.0 LM3671MF-1.5/NOPB SOT-23 DBV 5 1000 210.0 185.0 35.0 LM3671MF-1.6 SOT-23 DBV 5 1000 210.0 185.0 35.0 LM3671MF-1.6/NOPB SOT-23 DBV 5 1000 210.0 185.0 35.0 LM3671MF-1.8/NOPB SOT-23 DBV 5 1000 210.0 185.0 35.0 LM3671MF-1.875/NOPB SOT-23 DBV 5 1000 210.0 185.0 35.0 LM3671MF-2.5/NOPB SOT-23 DBV 5 1000 210.0 185.0 35.0 LM3671MF-2.8 SOT-23 DBV 5 1000 210.0 185.0 35.0 LM3671MF-2.8/NOPB SOT-23 DBV 5 1000 210.0 185.0 35.0 Pack Materials-Page 3 PACKAGE MATERIALS INFORMATION www.ti.com 19-Nov-2013 Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) LM3671MF-3.3/NOPB SOT-23 DBV 5 1000 210.0 185.0 35.0 LM3671MF-ADJ/NOPB SOT-23 DBV 5 1000 210.0 185.0 35.0 LM3671MFX-1.2/NOPB SOT-23 DBV 5 3000 210.0 185.0 35.0 LM3671MFX-1.25/NOPB SOT-23 DBV 5 3000 210.0 185.0 35.0 LM3671MFX-1.375/NOPB SOT-23 DBV 5 3000 210.0 185.0 35.0 LM3671MFX-1.5/NOPB SOT-23 DBV 5 3000 210.0 185.0 35.0 LM3671MFX-1.6/NOPB SOT-23 DBV 5 3000 210.0 185.0 35.0 LM3671MFX-1.8/NOPB SOT-23 DBV 5 3000 210.0 185.0 35.0 LM3671MFX-1.875/NOPB SOT-23 DBV 5 3000 210.0 185.0 35.0 LM3671MFX-2.5/NOPB SOT-23 DBV 5 3000 210.0 185.0 35.0 LM3671MFX-2.8/NOPB SOT-23 DBV 5 3000 210.0 185.0 35.0 LM3671MFX-3.3/NOPB SOT-23 DBV 5 3000 210.0 185.0 35.0 LM3671MFX-ADJ/NOPB SOT-23 DBV 5 3000 210.0 185.0 35.0 LM3671QMF-1.2/NOPB SOT-23 DBV 5 1000 210.0 185.0 35.0 LM3671QMFX-1.2/NOPB SOT-23 DBV 5 3000 210.0 185.0 35.0 LM3671TL-1.2/NOPB DSBGA YZR 5 250 210.0 185.0 35.0 LM3671TL-1.5/NOPB DSBGA YZR 5 250 210.0 185.0 35.0 LM3671TL-1.8/NOPB DSBGA YZR 5 250 210.0 185.0 35.0 LM3671TL-1.875/NOPB DSBGA YZR 5 250 210.0 185.0 35.0 LM3671TL-2.5/NOPB DSBGA YZR 5 250 210.0 185.0 35.0 LM3671TL-2.8/NOPB DSBGA YZR 5 250 210.0 185.0 35.0 LM3671TL-3.3/NOPB DSBGA YZR 5 250 210.0 185.0 35.0 LM3671TL-ADJ/NOPB DSBGA YZR 5 250 210.0 185.0 35.0 LM3671TLX-1.2/NOPB DSBGA YZR 5 3000 210.0 185.0 35.0 LM3671TLX-1.5/NOPB DSBGA YZR 5 3000 210.0 185.0 35.0 LM3671TLX-1.8/NOPB DSBGA YZR 5 3000 210.0 185.0 35.0 LM3671TLX-1.875/NOPB DSBGA YZR 5 3000 210.0 185.0 35.0 LM3671TLX-2.5/NOPB DSBGA YZR 5 3000 210.0 185.0 35.0 LM3671TLX-2.8/NOPB DSBGA YZR 5 3000 210.0 185.0 35.0 LM3671TLX-3.3/NOPB DSBGA YZR 5 3000 210.0 185.0 35.0 LM3671TLX-ADJ/NOPB DSBGA YZR 5 3000 210.0 185.0 35.0 Pack Materials-Page 4 MECHANICAL DATA NKH0006B LCA06B (Rev A) www.ti.com MECHANICAL DATA YZR0005xxx D 0.6000.075 E TLA05XXX (Rev C) D: Max = 1.413 mm, Min =1.352 mm E: Max = 1.083 mm, Min =1.022 mm 4215043/A NOTES: A. All linear dimensions are in millimeters. Dimensioning and tolerancing per ASME Y14.5M-1994. B. This drawing is subject to change without notice. www.ti.com 12/12 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. All semiconductor products (also referred to herein as "components") are sold subject to TI's terms and conditions of sale supplied at the time of order acknowledgment. TI warrants performance of its components to the specifications applicable at the time of sale, in accordance with the warranty in TI's terms and conditions of sale of semiconductor products. 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