VN808SR Octal channel high side driver Features Type RDS(on) Iout VCC VN808SR 150 m 0.7 A 45 V VCC/2 compatible input Junction overtemperature protection Case overtemperature protection for thermal independence of the channels Current limitation Shorted load protection Undervoltage shut-down Protection against loss of ground Very low stand-by current Compliance to 61000-4-4 IEC test up to 4 kV u d o r P e Active current limitation combined with thermal shutdown and automatic restart, protect the device against overload. In overload condition, the channel turns OFF and back ON automatically so as to maintain the junction temperature between TTSD and TR. If this condition makes the case temperature reach TCSD, the overloaded channel is turned OFF and restarts only when the case temperature has decreased to TCR (see waveform 3 Figure 7 on page 10). Non overloaded channels continue to operate normally. The device automatically turns OFF in the case of a ground pin disconnection. This device is especially suitable for industrial applications and conforms to IEC 61131. t e l o ) (s Description t c u The VN808SR is a monolithic device designed in STMicroelectronics VIPower M0-3 technology, intended for driving any kind of load with one side connected to ground. d o r PowerSO-36 ) s ( ct s b O P e t e l o s b O August 2009 Doc ID 11624 Rev 5 1/17 www.st.com 17 Contents VN808SR Contents 1 Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 3 Pin connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 4 Current, voltage conventions and internal diagram . . . . . . . . . . . . . . . 8 5 Switching time waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 6 Reverse polarity protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 7 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 8 Order codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 9 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 ) s ( ct u d o r P e t e l o ) (s s b O t c u d o r P e t e l o s b O 2/17 Doc ID 11624 Rev 5 VN808SR 1 Maximum ratings Maximum ratings Table 1. Absolute maximum rating Symbol Parameter VCC DC supply voltage -IGND DC ground pin reverse current TRAN ground pin reverse current (pulse duration < 1 ms) IOUT DC output current -IOUT Reverse DC output current IIN DC Input current VIN Input voltage range PTOT Power dissipation at Tc = 25 C LMAX Max inductive load (VCC = 24 V, RLOAD = 48 , TA = 100 C) TJ Junction operating temperature TC Case operating temperature Symbol RthJA s b O t e l o -250 -6 mA A Internally limited A -2 A ) s ( ct u d o Pr mA V V 96 W 2 H Internally limited C Internally limited C -40 to 150 C Value Unit Max 1.3 C/W Max 50 C/W e t e ol bs s ( t c Thermal data r P e RthJC V 2000 O ) Storage temperature u d o 45 -3/+VCC Electrostatic discharge (R = 1.5 k; C = 100 pF) Table 2. Unit 10 VESD TSTG Value Parameter Thermal resistance junction-case Thermal resistance junction-ambient (1) 2 1. When mounted on FR4 printed circuit board with 0.5 cm of copper area (at least 35 m think) connected to all TAB pins. Doc ID 11624 Rev 5 3/17 Electrical characteristics 2 VN808SR Electrical characteristics (10.5 V < VCC < 32 V; -40 C < TJ < 125 C; unless otherwise specified) Table 3. Power section Symbol Parameter VCC Operating supply voltage VUSD Undervoltage shutdown RON On state resistance IOUT = 0.5 A; TJ = 25 C IOUT = 0.5 A; Supply current OFF state; VCC = 24 V; TCASE = 25 C ON state (all channels ON); VCC = 24 V, TCASE = 100 C IS IL(off) OFF state output current VIN = VOUT = 0 V; Unit 10.5 45 V 7 10.5 V m m 150 A 12 mA 1 mA 5 A c u d o s b 0 Test conditions Min O ) Table 7. ) s ( t 185 280 1 ms s ( t c Symbol u d o tON Turn-on time tOFF Turn-off time Switching (VCC = 24 V) Typ Max Unit RL = 48 from 80% VOUT Figure 5. 50 100 s RL = 48 to 10% VOUT Figure 5. 75 150 s dVOUT/dt(on) Turn-on voltage slope RL = 48 from VOUT = 2.4 V to VOUT = 19.2 V Figure 5. 0.7 V/ s dVOUT/dt(off) Turn-off voltage slope RL = 48 from VOUT = 21.6 V to VOUT = 2.4 V Figure 5. 1.5 V/ s r P e t e l o 4/17 Max o r P VCC = VSTAT = VIN = VGND = 24 V VOUT = 0 V Power-on delay time from VCC rising edge Typ 150 Output current at turn-off Table 4. O e t e l Min ILGND td(Vccon) bs Test conditions Parameter Doc ID 11624 Rev 5 VN808SR Electrical characteristics Table 5. Input pin Symbol Parameter VINL Input low level IINL Low level input current VINH Input high level IINH High level input current VI(HYST) Input hysteresis voltage IIN Case shut-down temperature TCR Case reset temperature TCHYST Case thermal hysteresis Ilim V 150 Vdemag 260 Min t e l o 125 bs V ) s ( ct Typ Max Unit 130 135 C u d o r P e Test conditions 110 O ) C 7 15 C 150 175 200 135 Junction thermal hysteresis Turn-off output clamp IOUT = 0.5 A; L = 6mH voltage C C 7 VCC = 24 V; RLOAD = 10 m 300 VIN = VCC = 32 V u d o DC Short circuit current V VCC /2+1 Pr THYST VCC /2-1 Junction reset temperature TR Unit 80 s ( t c Junction shutdown temperature TTSD Max 0.6 Parameter TCSD Typ VIN = VCC / 2 + 1 V Protections Symbol o s b Min VIN = VCC / 2 - 1 V Input current Table 6. e t e l Test conditions 15 C 0.7 1.7 VCC-57 VCC-52 VCC-47 A V O Table 7. Symbol Status pin Parameter Test conditions IHSTAT High level output current VCC = 18...32 V; RSTAT = 1 k (Fault condition) ILSTAT Leakage current Normal operation; VCC = 32 V Clamp voltage ISTAT = 1 mA ISTAT = -1 mA VCLSTAT Doc ID 11624 Rev 5 Min Typ Max Unit 2 3 4 mA 0.1 A 8.0 V V 6.0 6.8 -0.7 5/17 Pin connections 3 VN808SR Pin connections Figure 2. Connection diagram (top view) ) s ( ct u d o r P e t e l o Table 8. Pin functions Pin N t c u TAB 1 2,3,4,5 6/17 Function VCC Positive power supply voltage VCC Positive power supply voltage NC Not connected Input 1 Input of channel 1 7 Input 2 Input of channel 2 8 Input 3 Input of channel 3 9 Input 4 Input of channel 4 10 Input 5 Input of channel 5 11 Input 6 Input of channel 6 12 Input 7 Input of channel 7 13 Input 8 Input of channel 8 14,15,16,17,18 NC 19 GND 20 STATUS Common open source diagnostic for over-temperature 21,22 Output 8 High-side output of channel 8 23,24 Output 7 High-side output of channel 7 25,26 Output 6 High-side output of channel 6 e t e ol s b O od Pr 6 ) (s Symbol s b O Not connected Logic ground Doc ID 11624 Rev 5 VN808SR Pin connections Table 8. Pin functions (continued) Pin N Symbol 27.28 Output 5 High-side output of channel 5 29,30 Output 4 High-side output of channel 4 31,32 Output 3 High-side output of channel 3 33,34 Output 2 High-side output of channel 2 35,36 Output 1 High-side output of channel 1 Function ) s ( ct u d o r P e t e l o ) (s s b O t c u d o r P e t e l o s b O Doc ID 11624 Rev 5 7/17 Current, voltage conventions and internal diagram 4 VN808SR Current, voltage conventions and internal diagram Figure 3. Current and voltage conventions ) s ( ct u d o r P e t e l o Figure 4. Equivalent internal block diagram (same structure for all channel) ) (s s b O t c u d o r P e t e l o s b O Table 9. Truth table Conditions 8/17 INPUTn OUTPUTn STATUS Normal operation L H L H L L Current limitation L H L X L L Overtemperature (see waveforms 3, 4 Figure 7) -> TJ > TTSD L H L L L H Undervoltage L H L L X X Doc ID 11624 Rev 5 VN808SR 5 Switching time waveforms Switching time waveforms Figure 5. Turn-ON and turn-OFF ) s ( ct u d o r P e t e l o Figure 6. VCC turn-ON ) (s s b O t c u d o r P e t e l o s b O Doc ID 11624 Rev 5 9/17 Switching time waveforms Figure 7. VN808SR Waveforms ) s ( ct u d o r P e t e l o ) (s s b O t c u d o r P e t e l o s b O 10/17 Doc ID 11624 Rev 5 VN808SR Switching time waveforms Figure 7. Waveforms (continued) ) s ( ct u d o r P e t e l o ) (s s b O t c u d o r P e t e l o s b O Doc ID 11624 Rev 5 11/17 Reverse polarity protection 6 VN808SR Reverse polarity protection This schematic can be used with any type of load. The following is an indication on how to dimension the RGND resistor. RGND = (-VCC) / (-IGND) where -IGND is the DC reverse ground pin current and can be found in the absolute maximum rating section of the device datasheet. Power dissipation in RGND (when VCC< 0: during reverse polarity situations) is: PD = (-VCC)2/RGND Note: ) s ( ct In normal condition (no reverse polarity) due to the diode there will be a voltage drop between GND of the device and GND of the system. Figure 8. u d o Reverse polarity protection r P e + Vcc t e l o Status s b O Outputi - GND ) (s Inputi t c u d o r P e RGND t e l o s b O 12/17 Doc ID 11624 Rev 5 Load Diode VN808SR 7 Package mechanical data Package mechanical data In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK(R) packages, depending on their level of environmental compliance. ECOPACK(R) specifications, grade definitions and product status are available at: www.st.com. ECOPACK is an ST trademark. Table 10. PowerSO-36 mechanical data mm inch Dim. Min Typ Max A 0.10 a3 0 0.10 0 b 0.22 0.38 0.008 c 0.23 0.32 D (1) 15.80 16.00 D1 9.40 9.80 E 13.90 E1 (1) 10.90 E3 5.8 ) s ( ct u d o e G e t e l H b O 0.003 Pr 0.1299 0.0039 0.0150 0.0126 o s b 0.622 0.6299 0.370 0.3858 14.50 0.547 0.5709 11.10 0.429 0.4370 -O 2.90 6.2 0.1142 0.228 0.2441 0.65 0.025 11.05 0.435 0.10 0.000 0.0039 15.50 15.90 0.610 0.6260 1.10 0.80 N S e t e l 0.009 Pr 0.0118 0 h L ) s ( ct u d o 3.30 E2 Max 0.1417 0.30 a2 e3 Typ 3.60 a1 so Min 1.10 0.0433 0.031 10 0 8 Doc ID 11624 Rev 5 0.0433 10 0 8 13/17 Package mechanical data Figure 9. VN808SR PowerSO-36 drawings ) s ( ct u d o r P e t e l o ) (s s b O t c u d o r P e t e l o s b O 14/17 Doc ID 11624 Rev 5 VN808SR 8 Order codes Order codes Table 11. Order codes Order codes Package Packaging VN808SR PowerSO-36 Tube VN808SR13TR PowerSO-36 Tape and reel ) s ( ct u d o r P e t e l o ) (s s b O t c u d o r P e t e l o s b O Doc ID 11624 Rev 5 15/17 Revision history 9 VN808SR Revision history Table 12. Document revision history Date Revision Changes 13-Sep-2005 1 Initial release 01-Mar-2007 2 Document reformatted 26-Mar-2007 3 Typo in Figure 3. 07-Jul-2008 4 Added Section 4 on page 8 25-Aug-2009 5 Updated Section 6: Reverse polarity protection u d o ) s ( ct r P e t e l o ) (s s b O t c u d o r P e t e l o s b O 16/17 Doc ID 11624 Rev 5 VN808SR ) s ( ct Please Read Carefully: u d o Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries ("ST") reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. r P e All ST products are sold pursuant to ST's terms and conditions of sale. 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