74HC7540; 74HCT7540 Octal Schmitt trigger buffer/line driver; 3-state; inverting Rev. 3 -- 27 August 2012 Product data sheet 1. General description The 74HC7540; 74HCT7540 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard No. 7A. The 74HC7540; 74HCT7540 provides eight inverting buffer/line drivers with 3-state outputs and Schmitt-trigger action. The 3-state outputs are controlled by the output enable inputs OE1 and OE2. A HIGH on OEn causes the outputs to assume a high-impedance OFF-state. Schmitt trigger action on the data inputs transforms slowly changing input signals into sharply defined, jitter-free output signals. The 74HC7540; 74HCT7540 is identical to the 74HC540; 74HCT540 but has hysteresis on the data inputs. 2. Features and benefits Inverting outputs Low-power dissipation ESD protection: HBM JESD22-A114F exceeds 2000 V MM JESD22-A115-A exceeds 200 V Multiple package options Specified from 40 C to +85 C and from 40 C to +125 C 3. Ordering information Table 1. Ordering information Type number 74HC7540N Package Temperature range Name Description Version 40 C to +125 C DIP20 plastic dual in-line package; 20 leads (300 mil) SOT146-1 40 C to +125 C SO20 plastic small outline package; 20 leads; body width 7.5 mm SOT163-1 40 C to +125 C SSOP20 plastic shrink small outline package; 20 leads; body width 5.3 mm SOT339-1 74HCT7540N 74HC7540D 74HCT7540D 74HC7540DB 74HC7540; 74HCT7540 NXP Semiconductors Octal Schmitt trigger buffer/line driver; 3-state; inverting 4. Functional diagram Fig 1. $ < $ < $ < $ < $ < $ < < $ < $ (1 2( 2( DDD Logic symbol DDD Fig 2. IEC logic symbol 5. Pinning information 5.1 Pinning +& +&7 +& +&7 2( $ 9&& 2( $ < $ < $ < $ < $ $ $ 2( 9&& $ 2( $ < $ < $ < $ < < $ < < $ < < $ < *1' < *1' < DDD Fig 3. DDD Pin configuration DIP20, SO20 74HC_HCT7540 Product data sheet Fig 4. Pin configuration SSOP20 All information provided in this document is subject to legal disclaimers. Rev. 3 -- 27 August 2012 (c) NXP B.V. 2012. All rights reserved. 2 of 16 74HC7540; 74HCT7540 NXP Semiconductors Octal Schmitt trigger buffer/line driver; 3-state; inverting 5.2 Pin description Table 2. Pin description Symbol Pin Description OE1 1 output enable input (active LOW) A0 to A7 2, 3, 4, 5, 6, 7, 8, 9 data input GND 10 ground (0 V) Y0 to Y7 18, 17, 16, 15, 14, 13, 12, 11 data output OE2 19 output enable input (active LOW) VCC 20 supply voltage 6. Functional description Table 3. Functional table[1] Control Input Output OE1 OE2 An Yn L L L H L L H L X H X Z H X X Z [1] H = HIGH voltage level; L = LOW voltage level; X = don't care; Z = high-impedance OFF-state. 7. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter VCC supply voltage Conditions Min Max Unit 0.5 +7 V - 20 mA - 20 mA - 25 mA input clamping current VI < 0.5 V or VI > VCC + 0.5 V [1] IOK output clamping current VO < 0.5 V or VO > VCC + 0.5 V [1] IO output current 0.5 V < VO < VCC + 0.5 V ICC supply current - 50 mA IGND ground current 50 - mA Tstg storage temperature 65 +150 C Ptot total power dissipation DIP20 - 750 mW SO20, SSOP20 - 500 mW IIK [1] [2] [2] The input and output voltage ratings may be exceeded if the input and output current ratings are observed. For DIP20 packages: above 70 C the value of Ptot derates linearly with 12 mW/K. For SO20 packages: above 70 C the value of Ptot derates linearly with 8 mW/K. For SSOP20 packages: above 60 C the value of Ptot derates linearly with 5.5 mW/K. 74HC_HCT7540 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 3 -- 27 August 2012 (c) NXP B.V. 2012. All rights reserved. 3 of 16 74HC7540; 74HCT7540 NXP Semiconductors Octal Schmitt trigger buffer/line driver; 3-state; inverting 8. Recommended operating conditions Table 5. Recommended operating conditions Voltages are referenced to GND (ground = 0 V) Symbol Parameter Conditions 74HC7540 Min 74HCT7540 Typ Max Min Unit Typ Max VCC supply voltage 2.0 5.0 6.0 4.5 5.0 5.5 V VI input voltage 0 - VCC 0 - VCC V VO output voltage 0 - VCC 0 - VCC V Tamb ambient temperature 40 +25 +125 40 +25 +125 C 9. Static characteristics Table 6. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter Tamb = 25 C Conditions Min Typ Max Tamb = 40 C to +85 C Tamb = 40 C to +125 C Min Min Max Unit Max 74HC7540 VOH VOL HIGH-level output voltage LOW-level output voltage VI = VT+ or VT IO = 20 A; VCC = 2.0 V 1.9 2.0 - 1.9 - 1.9 - V IO = 20 A; VCC = 4.5 V 4.4 4.5 - 4.4 - 4.4 - V IO = 20 A; VCC = 6.0 V 5.9 6.0 - 5.9 - 5.9 - V IO = 6.0 mA; VCC = 4.5 V 3.98 4.32 - 3.84 - 3.7 - V IO = 7.8 mA; VCC = 6.0 V 5.48 5.81 - 5.34 - 5.2 - V IO = 20 A; VCC = 2.0 V - 0 0.1 - 0.1 - 0.1 V IO = 20 A; VCC = 4.5 V - 0 0.1 - 0.1 - 0.1 V IO = 20 A; VCC = 6.0 V - 0 0.1 - 0.1 - 0.1 V IO = 6.0 mA; VCC = 4.5 V - 0.15 0.26 - 0.33 - 0.4 V IO = 7.8 mA; VCC = 6.0 V - 0.16 0.26 - 0.33 - 0.4 V VI = VT+ or VT II input leakage current VI = VCC or GND; VCC = 6.0 V - - 0.1 - 1.0 - 1.0 A ICC supply current VI = VCC or GND; IO = 0 A; VCC = 6.0 V - - 8.0 - 80 - 160 A CI input capacitance - 3.5 - - - - - pF 74HCT7540 VOH VOL HIGH-level output voltage LOW-level output voltage 74HC_HCT7540 Product data sheet VI = VT+ or VT; VCC = 4.5 V IO = 20 A 4.4 4.5 - 4.4 - 4.4 - V IO = 6.0 mA 3.98 4.32 - 3.84 - 3.7 - V IO = 20 A; - 0 0.1 - 0.1 - 0.1 V IO = 6.0 mA; - 0.15 0.26 - 0.33 - 0.4 V VI = VT+ or VT; VCC = 4.5 V All information provided in this document is subject to legal disclaimers. Rev. 3 -- 27 August 2012 (c) NXP B.V. 2012. All rights reserved. 4 of 16 74HC7540; 74HCT7540 NXP Semiconductors Octal Schmitt trigger buffer/line driver; 3-state; inverting Table 6. Static characteristics ...continued At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter Tamb = 25 C Conditions Tamb = 40 C to +85 C Tamb = 40 C to +125 C Min Typ Max Min Max Min Max Unit II input leakage current VI = VCC or GND; VCC = 5.5 V - - 0.1 - 1.0 - 1.0 A ICC supply current VI = VCC or GND; IO = 0 A; VCC = 5.5 V - - 8.0 - 80 - 160 A ICC additional supply current per input pin; IO = 0 A; VI = VCC 2.1 V; other inputs at VCC or GND; VCC = 4.5 V to 5.5 V CI An input - 20 72 - 90 - 98 A OEn input - 130 468 - 585 - 637 A - 3.5 - - - - - pF input capacitance 10. Dynamic characteristics Table 7. Dynamic characteristics GND = 0 V; CL = 50 pF; for test circuit see Figure 7. Symbol Parameter Tamb = 25 C Conditions Min Tamb = 40 C to +125 C Typ Max Max (85 C) Max (125 C) Unit 74HC7540 tpd propagation delay An to Yn; see Figure 5 [1] VCC = 2.0 V - 39 120 150 180 ns VCC = 4.5 V - 14 24 30 36 ns VCC = 5.0 V; CL = 15 pF - 11 - - - ns - 11 20 26 31 ns VCC = 2.0 V - 41 150 190 225 ns VCC = 4.5 V - 15 30 38 45 ns - 12 26 33 38 ns VCC = 2.0 V - 52 150 190 225 ns VCC = 4.5 V - 19 30 38 45 ns - 15 26 33 38 ns VCC = 2.0 V - 14 60 75 90 ns VCC = 4.5 V - 5 12 15 18 ns - 4 10 13 15 ns - 29 - - - pF VCC = 6.0 V ten enable time OEn to Yn; see Figure 6 [1] VCC = 6.0 V tdis disable time OEn to Yn; see Figure 6 [1] VCC = 6.0 V tt transition time see Figure 5 [2] VCC = 6.0 V CPD power dissipation capacitance 74HC_HCT7540 Product data sheet per package; VI = GND to VCC [3] All information provided in this document is subject to legal disclaimers. Rev. 3 -- 27 August 2012 (c) NXP B.V. 2012. All rights reserved. 5 of 16 74HC7540; 74HCT7540 NXP Semiconductors Octal Schmitt trigger buffer/line driver; 3-state; inverting Table 7. Dynamic characteristics GND = 0 V; CL = 50 pF; for test circuit see Figure 7. Symbol Parameter Tamb = 25 C Conditions Tamb = 40 C to +125 C Unit Min Typ Max Max (85 C) Max (125 C) - 19 32 40 48 ns - 16 - - - ns - 19 32 40 48 ns 74HCT7540 [1] propagation delay An to Yn; see Figure 5 tpd VCC = 4.5 V VCC = 5.0 V; CL = 15 pF ten enable time OEn to Yn; see Figure 6 tdis disable time OEn to Yn; see Figure 6 [1] VCC = 4.5 V [1] VCC = 4.5 V transition time tt power dissipation capacitance CPD [1] - 20 32 40 48 ns VCC = 4.5 V; see Figure 5 [2] - 5 12 15 18 ns per package; VI = GND to VCC 1.5 V [3] - 31 - - - pF tpd is the same as tPLH and tPHL. ten is the same as tPZL and tPZH. tdis is the same as tPLZ and tPHZ. [2] tt is the same as tTHL and tTLH. [3] CPD is used to determine the dynamic power dissipation (PD in W): PD = CPD VCC2 fi N + (CL VCC2 fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in V; N = number of inputs switching; (CL VCC2 fo) = sum of outputs. 11. Waveforms 9, $QLQSXW 90 90 *1' W3+/ W3/+ 92+