1. General description
The 74HC7540; 74HCT754 0 is a hig h-sp eed Si-gate CMOS device and is pin co mpatible
with Low-power Schottky TTL (LSTTL). It is specified in compliance wit h JEDEC st an dard
No. 7A.
The 74HC7540; 74HCT7540 provides eight inverting buffer/line drivers with 3-state
outputs and Schmitt-trigger action. The 3-state outputs are controlled by the output enable
inputs OE1 and OE2. A HIGH on OEn causes the outputs to assume a high-impedance
OFF-state. Schmitt trigger action on the data inputs transforms slowly changing input
signals into sharply defined, jitter-free output signals.
The 74HC7540; 74HCT7540 is identical to the 74HC540; 74HCT540 but has hysteresis
on the data inputs.
2. Features and benefits
Inverting outputs
Low-power dissipation
ESD protection:
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115 -A ex ce eds 20 0 V
Multiple package options
Specified from 40 C to +85 C and from 40 C to +125 C
3. Ordering information
74HC7540; 74HCT7540
Octal Schmitt trigger buffer/line driver; 3-state; inverting
Rev. 3 — 27 August 2012 Product data sheet
Table 1. Ordering information
Type number Package
Temp erature range Name Description Version
74HC7540N 40 Cto+125C DIP20 plastic dual in-line package; 20 leads (300 mil) SOT146-1
74HCT7540N
74HC7540D 40 C to +125 C SO20 plastic small outline package; 20 leads;
body width 7.5 mm SOT163-1
74HCT7540D
74HC7540DB 40 C to +125 C SSOP20 plastic shrink small outlin e package; 20 leads;
body width 5.3 mm SOT339-1
74HC_HCT7540 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 3 — 27 August 2012 2 of 16
NXP Semiconductors 74HC7540; 74HCT7540
Octal Schmitt trigger buffer/line driver; 3-state; inverting
4. Functional diagram
5. Pinning information
5.1 Pinning
Fig 1. Logic symbol Fig 2. IEC logic symbol

<
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







Fig 3. Pin configuration DIP20, SO20 Fig 4. Pin configuration SSOP20
DDD
2(
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$
<
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$
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<
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9&&
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2( 9
&&
$ 2(
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
+&
+&7
74HC_HCT7540 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 3 — 27 August 2012 3 of 16
NXP Semiconductors 74HC7540; 74HCT7540
Octal Schmitt trigger buffer/line driver; 3-state; inverting
5.2 Pin description
6. Functional description
[1] H = HIGH voltage level; L = LOW voltage level; X = don’t care; Z = high-impedance OFF-state.
7. Limiting values
[1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
[2] For DIP20 packages: above 70 C the value of Ptot derates linearly with 12 mW/K.
For SO20 packages: above 70 C the value of Ptot derates linearly with 8 mW/K.
For SSOP20 packages: above 60 C the value of Ptot derates linearly with 5.5 mW/K.
Table 2. Pin description
Symbol Pin Description
OE1 1 output enable input (active LOW )
A0 to A7 2, 3, 4, 5, 6, 7, 8, 9 data input
GND 10 ground (0 V)
Y0 to Y7 18, 17, 16, 15, 14, 13, 12, 11 data output
OE2 19 output enable input (activ e LOW )
VCC 20 supply voltage
Table 3. Functional table[1]
Control Input Output
OE1OE2An Yn
LL L H
LL H L
XH X Z
HX X Z
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions Min Max Unit
VCC supply voltage 0.5 +7 V
IIK input clamping current VI < 0.5 V or VI>V
CC +0.5 V [1] -20 mA
IOK output clamping current VO<0.5 V or VO>V
CC +0.5V [1] -20 mA
IOoutput curren t 0.5 V < VO < VCC +0.5V - 25 mA
ICC supply current - 50 mA
IGND ground current 50 - mA
Tstg storage temperature 65 +150 C
Ptot total power dissipation [2]
DIP20 - 750 mW
SO20, SSOP20 - 500 mW
74HC_HCT7540 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 3 — 27 August 2012 4 of 16
NXP Semiconductors 74HC7540; 74HCT7540
Octal Schmitt trigger buffer/line driver; 3-state; inverting
8. Recommended operating conditions
9. Static characteristics
Table 5. Recommended operating con ditions
Voltages are referenced to GND (ground = 0 V)
Symbol Parameter Conditions 74HC7540 74HCT7540 Unit
Min Typ Max Min Typ Max
VCC supply voltage 2.0 5.0 6.0 4.5 5.0 5.5 V
VIinput voltage 0 - VCC 0- V
CC V
VOoutput voltage 0 - VCC 0- V
CC V
Tamb ambient temperature 40 +25 +125 40 +25 +125 C
Table 6. Static characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions Tamb = 25 C Tamb = 40 C
to +85 CTamb = 40 C
to +125 CUnit
Min Typ Max Min Max Min Max
74HC7540
VOH HIGH-level
output voltage VI= VT+ or VT
IO = 20 A; VCC = 2.0 V 1.9 2.0 - 1.9 - 1.9 - V
IO = 20 A; VCC = 4.5 V 4.4 4.5 - 4.4 - 4.4 - V
IO = 20 A; VCC = 6.0 V 5.9 6.0 - 5.9 - 5.9 - V
IO = 6.0 mA; VCC = 4.5 V 3.98 4.32 - 3.84 - 3.7 - V
IO = 7.8 mA; VCC = 6.0 V 5.48 5.81 - 5.34 - 5.2 - V
VOL LOW-level
output voltage VI= VT+ or VT
IO = 20 A; VCC = 2.0 V - 0 0.1 - 0.1 - 0.1 V
IO = 20 A; VCC = 4.5 V - 0 0.1 - 0.1 - 0.1 V
IO = 20 A; VCC = 6.0 V - 0 0.1 - 0.1 - 0.1 V
IO = 6.0 mA; VCC = 4.5 V - 0.15 0.26 - 0.33 - 0 .4 V
IO = 7.8 mA; VCC = 6.0 V - 0.16 0.26 - 0.33 - 0 .4 V
IIinput leakage
current VI = VCC or GND; VCC =6.0V - - 0.1 - 1.0 - 1.0 A
ICC supply current VI = VCC or GND; IO=0A;
VCC =6.0V - - 8.0 - 80 - 160 A
CIinput
capacitance -3.5- - - - - pF
74HCT7540
VOH HIGH-level
output voltage VI= VT+ or VT; VCC = 4.5 V
IO = 20 A 4.4 4.5 - 4.4 - 4.4 - V
IO = 6.0 mA 3.98 4.32 - 3.84 - 3.7 - V
VOL LOW-level
output voltage VI= VT+ or VT; VCC = 4.5 V
IO = 20 A; - 0 0.1 - 0.1 - 0.1 V
IO = 6.0 mA; - 0.15 0.26 - 0.33 - 0.4 V
74HC_HCT7540 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 3 — 27 August 2012 5 of 16
NXP Semiconductors 74HC7540; 74HCT7540
Octal Schmitt trigger buffer/line driver; 3-state; inverting
10. Dynamic characteristics
IIinput leakage
current VI = VCC or GND; VCC =5.5V - - 0.1 - 1.0 - 1.0 A
ICC supply current VI=V
CC or GND; IO = 0 A;
VCC =5.5V - - 8.0 - 80 - 160 A
ICC additional
supply current per input pin; IO=0A;
VI=V
CC 2.1 V;
other inputs at VCC or GND;
VCC = 4.5 V to 5.5 V
An input - 20 72 - 90 - 98 A
OEn input - 130 468 - 585 - 637 A
CIinput
capacitance -3.5- - - - - pF
Table 6. Static characteristics …continued
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions Tamb = 25 C Tamb = 40 C
to +85 CTamb = 40 C
to +125 CUnit
Min Typ Max Min Max Min Max
Table 7. Dynamic characteristics
GND = 0 V; CL= 50 pF; for test circuit see Figure 7.
Symbol Parameter Conditions Tamb = 25 C Tamb = 40 C to +125 CUnit
Min Typ Max Max (85 C) Max (125 C)
74HC7540
tpd propagation delay An to Yn; see Figure 5 [1]
VCC = 2.0 V - 39 120 150 180 ns
VCC = 4.5 V - 14 24 30 36 ns
VCC = 5.0 V; CL=15pF - 11 - - - ns
VCC = 6.0 V - 11 20 26 31 ns
ten enable time OEntoYn; see Figure 6 [1]
VCC = 2.0 V - 41 150 190 225 ns
VCC = 4.5 V - 15 30 38 45 ns
VCC = 6.0 V - 12 26 33 38 ns
tdis disable time OEntoYn; see Figure 6 [1]
VCC = 2.0 V - 52 150 190 225 ns
VCC = 4.5 V - 19 30 38 45 ns
VCC = 6.0 V - 15 26 33 38 ns
tttransition time see Figure 5 [2]
VCC = 2.0 V - 14 60 75 90 ns
VCC = 4.5 V - 5 12 15 18 n s
VCC = 6.0 V - 4 10 13 15 n s
CPD power dissipation
capacitance per package;
VI=GNDtoV
CC
[3] -29- - - pF
74HC_HCT7540 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 3 — 27 August 2012 6 of 16
NXP Semiconductors 74HC7540; 74HCT7540
Octal Schmitt trigger buffer/line driver; 3-state; inverting
[1] tpd is the same as tPLH and tPHL.
ten is the same as tPZL and tPZH.
tdis is the same as tPLZ and tPHZ.
[2] tt is the same as tTHL and tTLH.
[3] CPD is used to determine the dynamic power dissipation (PD in W):
PD=C
PD VCC2fiN+ (CLVCC2fo) where:
fi= input frequency in MHz;
fo= output frequency in MHz;
CL= output load capacitance in pF;
VCC = supply voltage in V;
N = number of inputs switching;
(CLVCC2fo) = sum of outputs.
11. Waveforms
74HCT7540
tpd propagation delay An to Yn; see Figure 5 [1]
VCC = 4.5 V - 19 32 40 48 ns
VCC = 5.0 V; CL=15pF - 16 - - - ns
ten enable time OEntoYn; see Figure 6 [1]
VCC = 4.5 V - 19 32 40 48 ns
tdis disable time OEntoYn; see Figure 6 [1]
VCC = 4.5 V - 20 32 40 48 ns
tttransition time V CC = 4.5 V; see Figure 5 [2] - 5 12 15 18 ns
CPD power dissipation
capacitance per package;
VI=GNDtoV
CC 1.5 V [3] -31- - - pF
Table 7. Dynamic characteristics
GND = 0 V; CL= 50 pF; for test circuit see Figure 7.
Symbol Parameter Conditions Tamb = 25 C Tamb = 40 C to +125 CUnit
Min Typ Max Max (85 C) Max (125 C)
Measurement points are given in Table 8.
VOL and VOH are typical voltage output levels that occur with the output load.
Fig 5. Input to output propagation delay s
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

<Q
RXWSXW
$Q
LQSXW
9
,
*1'
92+
92/
W7+/ W7/+
W3/+
90
9090
90
W3+/
74HC_HCT7540 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 3 — 27 August 2012 7 of 16
NXP Semiconductors 74HC7540; 74HCT7540
Octal Schmitt trigger buffer/line driver; 3-state; inverting
Measurement points are given in Table 8.
VOL and VOH are typical voltage output levels that occur with the output load.
Fig 6. 3-state enable and disable times
DDD
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92/
RXWSXWV
HQDEOHG
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,
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W3/=
9;
9<
92+
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/2:
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<QRXWSXW
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2
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90
W3=+
90
W3=/
Table 8. Measurement points
Type Input Output
VMVMVXVY
74HC7540 0.5VCC 0.5VCC 0.1VCC 0.9VCC
74HCT75401.3V1.3V0.1V
CC 0.9VCC
74HC_HCT7540 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 3 — 27 August 2012 8 of 16
NXP Semiconductors 74HC7540; 74HCT7540
Octal Schmitt trigger buffer/line driver; 3-state; inverting
Test data is given in Table 9.
Definitions test circuit:
RT = Termination resistance should be equal to output impedance Zo of the pulse generator
CL = Load capacitance including jig and probe capacitance
RL = Load resistance
S1 = Test selection switch
Fig 7. Test circuit for measuring switching times
V
M
V
M
t
W
t
W
10 %
90 %
0 V
V
I
V
I
negative
pulse
positive
pulse
0 V
V
M
V
M
90 %
10 %
t
f
t
r
t
r
t
f
001aad983
DUT
V
CC
V
CC
VIVO
RT
RLS1
CL
open
G
Table 9. Test data
Type Input Load S1 position
VItr, tfCLRLtPHL, tPLH tPZH, tPHZ tPZL, tPLZ
74HC7540 VCC 6ns 15pF, 50 pF 1kopen GND VCC
74HCT7540 3 V 6 ns 15 pF, 50 pF 1 kopen GND VCC
74HC_HCT7540 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 3 — 27 August 2012 9 of 16
NXP Semiconductors 74HC7540; 74HCT7540
Octal Schmitt trigger buffer/line driver; 3-state; inverting
12. Transfer characteristics
13. Transfer characteristics waveforms
Table 10. Transfer characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V); see Figure 8 and Figure 9.
Symbol Parameter Conditions Tamb = 25 C Tamb = 40 C
to +85 CTamb = 40 C
to +125 CUnit
Min Typ Max Min Max Min Max
74HC7540
VT+ positive-going
threshold
voltage
VCC = 2.0 V - - 1.5 - 1.5 - 1.5 V
VCC = 4.5 V - - 3.15 - 3.15 - 3.15 V
VCC = 6.0 V - - 4.2 - 4.2 - 4.2 V
VTnegative-going
threshold
voltage
VCC = 2.0 V 0.3 - - 0.3 - 0.3 - V
VCC = 4.5 V 1.35 - - 1.35 - 1.35 - V
VCC = 6.0 V 1.8 - - 1.8 - 1.8 - V
VHhysteresis
voltage VCC = 2.0 V 0.1 0.20 - 0.1 - 0.1 - V
VCC = 4.5 V 0.25 0.40 - 0.25 - 0.25 - V
VCC = 6.0 V 0.3 0.5 - 0.3 - 0.3 - V
74HCT7540
VT+ positive-going
threshold
voltage
VCC = 4.5 V - - 2.0 - 2.0 - 2.0 V
VCC = 5.5 V - - 2.1 - 2.1 - 2.1 V
VTnegative-going
threshold
voltage
VCC = 4.5 V 0.7 - - 0.64 - 0.6 - V
VCC = 5.5 V 0.8 - - 0.74 - 0.7 - V
VHhysteresis
voltage VCC = 4.5 V 0.17 0.23 - - - - - V
VCC = 5.5 V 0.17 0.23 - - - - - V
Fig 8. Transfer characteristics Fig 9. Transfer characteristics definitions
mna208
V
O
V
I
V
H
V
T+
V
T−
74HC_HCT7540 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 3 — 27 August 2012 10 of 16
NXP Semiconductors 74HC7540; 74HCT7540
Octal Schmitt trigger buffer/line driver; 3-state; inverting
14. Package outline
Fig 10. Package outline SOT146-1 (DIP20)
UNIT A
max. 1 2 b1cD E e M
H
L
REFERENCES
OUTLINE
VERSION EUROPEAN
PROJECTION ISSUE DATE
IEC JEDEC JEITA
mm
inches
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
SOT146-1 99-12-27
03-02-13
A
min. A
max. bZ
max.
w
ME
e1
1.73
1.30 0.53
0.38 0.36
0.23 26.92
26.54 6.40
6.22 3.60
3.05 0.2542.54 7.62 8.25
7.80 10.0
8.3 24.2 0.51 3.2
0.068
0.051 0.021
0.015 0.014
0.009 1.060
1.045 0.25
0.24 0.14
0.12 0.010.1 0.3 0.32
0.31 0.39
0.33 0.0780.17 0.02 0.13
SC-603MS-001
MH
c
(e )
1
ME
A
L
seating plane
A1
wM
b1
e
D
A2
Z
20
1
11
10
b
E
pin 1 index
0 5 10 mm
scale
Note
1. Plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included.
(1)
(1) (1)
DIP20: plastic dual in-line package; 20 leads (300 mil) SOT146-1
74HC_HCT7540 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 3 — 27 August 2012 11 of 16
NXP Semiconductors 74HC7540; 74HCT7540
Octal Schmitt trigger buffer/line driver; 3-state; inverting
Fig 11. Package outline SOT163-1 (SO20)
UNIT A
max. A1A2A3bpcD
(1) E(1) (1)
eH
ELL
pQZ
ywv θ
REFERENCES
OUTLINE
VERSION EUROPEAN
PROJECTION ISSUE DATE
IEC JEDEC JEITA
mm
inches
2.65 0.3
0.1 2.45
2.25 0.49
0.36 0.32
0.23 13.0
12.6 7.6
7.4 1.27 10.65
10.00 1.1
1.0 0.9
0.4 8
0
o
o
0.25 0.1
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
Note
1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.
1.1
0.4
SOT163-1
10
20
wM
bp
detail X
Z
e
11
1
D
y
0.25
075E04 MS-013
pin 1 index
0.1 0.012
0.004 0.096
0.089 0.019
0.014 0.013
0.009 0.51
0.49 0.30
0.29 0.05
1.4
0.055
0.419
0.394 0.043
0.039 0.035
0.016
0.01
0.25
0.01 0.004
0.043
0.016
0.01
0 5 10 mm
scale
X
θ
A
A1
A2
HE
Lp
Q
E
c
L
vMA
(A )
3
A
SO20: plastic small outline package; 20 leads; body width 7.5 mm SOT163-1
99-12-27
03-02-19
74HC_HCT7540 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 3 — 27 August 2012 12 of 16
NXP Semiconductors 74HC7540; 74HCT7540
Octal Schmitt trigger buffer/line driver; 3-state; inverting
Fig 12. Package outline SOT339-1 (SSOP20)
UNIT A1A2A3bpcD
(1) E(1) eH
ELL
pQ(1)
Zywv θ
REFERENCES
OUTLINE
VERSION EUROPEAN
PROJECTION ISSUE DATE
IEC JEDEC JEITA
mm 0.21
0.05 1.80
1.65 0.38
0.25 0.20
0.09 7.4
7.0 5.4
5.2 0.65 7.9
7.6 0.9
0.7 0.9
0.5 8
0
o
o
0.131.25 0.2 0.1
DIMENSIONS (mm are the original dimensions)
Note
1. Plastic or metal protrusions of 0.2 mm maximum per side are not included.
1.03
0.63
SOT339-1 MO-150 99-12-27
03-02-19
X
wM
θ
A
A1
A2
bp
D
HE
Lp
Q
detail X
E
Z
e
c
L
vMA
(A )
3
A
110
20 11
y
0.25
pin 1 index
0 2.5 5 mm
scale
SSOP20: plastic shrink small outline package; 20 leads; body width 5.3 mm SOT339-1
A
max.
2
74HC_HCT7540 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 3 — 27 August 2012 13 of 16
NXP Semiconductors 74HC7540; 74HCT7540
Octal Schmitt trigger buffer/line driver; 3-state; inverting
15. Abbreviations
16. Revision history
Table 11. Abbreviations
Acronym Description
CMOS Complementary Metal-Oxide Semiconductor
DUT Device Under Test
ESD ElectroStatic Discharge
HBM Human Body Model
LSTTL Low-power Schottky Transistor-Transistor Logic
MM Machine Model
Table 12. Revision history
Document ID Release date Data sheet status Change notice Supersedes
74HC_HCT7540 v.3 20120827 Product data sheet - 74HC_HCT7540_CNV v.2
Modifications: •The format of this data sheet has been redesigned to comply with the new identity
guidelines of NXP Semiconductors.
•Legal texts have been adapted to the new company name where appropriate.
74HC_HCT7540_CNV v .2 19970917 Product specification - -
74HC_HCT7540 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 3 — 27 August 2012 14 of 16
NXP Semiconductors 74HC7540; 74HCT7540
Octal Schmitt trigger buffer/line driver; 3-state; inverting
17. Legal information
17.1 Data sheet status
[1] Please consult the most recently issued document before initiating or completing a design.
[2] The term ‘short data sheet’ is explained in section “Definitions”.
[3] The product status of de vice(s) descr ibed in th is docume nt may have cha nged since this docume nt was publis hed and ma y dif fer in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
17.2 Definitions
Draft — The document is a draft version only. The content is still unde r
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liab ility for the consequences of
use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and tit le. A short data sh eet is intended
for quick reference only and shou ld not be rel ied u pon to cont ain det ailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall pre vail.
Product specificat io n — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
NXP Semiconductors and its customer, unless NXP Semiconductors and
customer have explicitly agreed otherwise in writing. In no event however,
shall an agreement be valid in which the NXP Semiconductors product is
deemed to off er functions and qualities beyond those descri bed in the
Product data sheet.
17.3 Disclaimers
Limited warr a nty and liability — Information in this document is believed to
be accurate and reliable. However, NXP Semiconductors does not give any
representations or warranties, expressed or implied, as to the accuracy or
completeness of such information and shall have no liability for the
consequences of use of such information. NXP Se miconductors takes no
responsibility for the content in this document if provided by an inf ormation
source outside of NXP Semiconductors.
In no event shall NXP Semiconductors be liable for any indirect, incidental,
punitive, special or consequ ential damages (including - wit hout limitatio n - lost
profits, lost savings, business interruption, costs related to the removal or
replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.
Notwithstanding any damages that customer might incur for any reason
whatsoever, NXP Semi conductors’ aggreg ate and cumulative liabil ity towards
customer for the products described herein shall be limited in accordance
with the Terms and conditions of commercial sale of NXP Semiconductors.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all informa tion supplied prior
to the publication hereof .
Suitability for use — NXP Semiconductors products are not designed,
authorized or warranted to be suitable for use in life support, life-critical or
safety-critical systems or equipment, nor in applications where failure or
malfunction of an NXP Semiconductors product can reasonably be expected
to result in perso nal injury, death or severe property or environmental
damage. NXP Semiconductors and its suppliers accept no liability for
inclusion and/or use of NXP Semiconducto rs products in such equipment or
applications and ther efore such inclu sion and/or use is at the cu stomer’s own
risk.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty tha t such application s will be suitable for the
specified use without further testing or modification.
Customers are responsible for the design and ope ration of their applications
and products using NXP Semiconductors product s, and NXP Semiconductors
accepts no liability for any assistance with applications or customer product
design. It is customer’s sole responsibility to determine whether the NXP
Semiconductors product is suit able and fit for the custome r’s applications and
products planned, as well as fo r the planned application and use of
customer’s third party customer(s). Customers should provide appropriate
design and operating safeguards to minimize the risks associated with their
applications and products.
NXP Semiconductors does not accept any liability related to any default,
damage, costs or problem which is based on any weakness or default in the
customer’s applications or products, or the application or use by customer’s
third party customer(s). Customer is responsible for doing all necessary
testing for th e customer’s applications and products using NXP
Semiconductors products in order to avoid a default of the applications and
the products or of the application or use by customer’s third party
customer(s). NXP does not accept any liability in this respect.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those given in
the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanent ly and irreversibly affect
the quality and reliability of the device.
Terms and conditions of commercial sale — NXP Semiconductors
products are sold subject to the general terms and conditions of commercial
sale, as published at http://www.nxp.com/profile/terms, unless otherwise
agreed in a valid written individua l agreement. In case an individual
agreement is concluded only the ter ms and conditions of the respective
agreement shall apply. NXP Semiconductors hereby expressly object s to
applying the customer’s general terms and conditions with regard to the
purchase of NXP Semiconductors products by customer.
No offer to sell or license — Nothing i n this document may be interpreted or
construed as an of fer t o sell product s that is open for accept ance or t he grant,
conveyance or implication of any license under any copyrights, patents or
other industrial or intellectual property rights.
Document status[1][2] Product status[3] Definition
Objective [short] data sheet Develop ment This document contains data from the objective specification for product development.
Preliminary [short] dat a sheet Qualification This document contains data from the preliminary specification.
Product [short] dat a sheet Production This document contains the product specifica tion.
74HC_HCT7540 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 3 — 27 August 2012 15 of 16
NXP Semiconductors 74HC7540; 74HCT7540
Octal Schmitt trigger buffer/line driver; 3-state; inverting
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from competent authorities.
Non-automotive qualified products — Unless this data sheet expressly
states that this specific NXP Semiconductors product is automotive qualified,
the product is not suitable for automotive use. It i s neit her qua lified nor tested
in accordance with automotive testing or application requirements. NXP
Semiconductors accepts no liability for inclusion and/or use of
non-automotive qualified products in automotive equipment or applications.
In the event that customer uses the product for design-in and use in
automotive applications to automot ive specifications and standard s, customer
(a) shall use the product without NXP Semiconductors’ warranty of the
product for such automotive applications, use and specifications, and (b)
whenever customer uses the product for automotive applications beyond
NXP Semiconductors’ specifications such use shall be solely at customer’s
own risk, and (c) customer fully indemnifies NXP Semiconductors for any
liability, damages or failed product claims resulting from custome r design and
use of the product for automotive applications beyond NXP Semiconductors’
standard warranty and NXP Semiconductors’ product specifications.
Translations — A non-English (translated) version of a document is for
reference only. The English version shall prevail in case of any discrepancy
between the translated and English versions.
17.4 Trademarks
Notice: All referenced b rands, produc t names, service names and trademarks
are the property of their respect i ve ow ners.
18. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
NXP Semiconductors 74HC7540; 74HCT7540
Octal Schmitt trigger buffer/line driver; 3-state; inverting
© NXP B.V. 2012. All rights reserved.
For more information, please visit: http://www.nxp.co m
For sales office addresses, please send an email to: salesaddresses@nxp.com
Date of release: 27 August 2012
Document identifier: 74HC_HCT7540
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
19. Contents
1 General description. . . . . . . . . . . . . . . . . . . . . . 1
2 Features and benefits . . . . . . . . . . . . . . . . . . . . 1
3 Ordering information. . . . . . . . . . . . . . . . . . . . . 1
4 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2
5 Pinning information. . . . . . . . . . . . . . . . . . . . . . 2
5.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
5.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3
6 Functional description . . . . . . . . . . . . . . . . . . . 3
7 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 3
8 Recommended operating conditions. . . . . . . . 4
9 Static characteristics. . . . . . . . . . . . . . . . . . . . . 4
10 Dynamic characteristics . . . . . . . . . . . . . . . . . . 5
11 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
12 Transfer characteristics . . . . . . . . . . . . . . . . . . 9
13 Transfer characteristics waveforms. . . . . . . . . 9
14 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 10
15 Abbreviations. . . . . . . . . . . . . . . . . . . . . . . . . . 13
16 Revision history. . . . . . . . . . . . . . . . . . . . . . . . 13
17 Legal information. . . . . . . . . . . . . . . . . . . . . . . 14
17.1 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 14
17.2 Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
17.3 Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 14
17.4 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 15
18 Contact information. . . . . . . . . . . . . . . . . . . . . 15
19 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16