MC14007UBD - Motorola / Freescale Semiconductor

MOTOROLA CMOS LOGIC DATA 31

MC14007UB

  

 

The MC14007UB multi–purpose device consists of three N–channel and

three P–channel enhancement mode devices packaged to provide access to

each device. These versatile parts are useful in inverter circuits, pulse–

shapers, linear amplifiers, high input impedance amplifiers, threshold

detectors, transmission gating, and functional gating.

•Diode Protection on All Inputs

•Supply Voltage Range = 3.0 Vdc to 18 Vdc

•Capable of Driving Two Low–power TTL Loads or One Low–power

Schottky TTL Load Over the Rated Temperature Range

•Pin–for–Pin Replacement for CD4007A or CD4007UB

•This device has 2 outputs without ESD Protection. Anti–static

precautions must be taken.

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

MAXIMUM RATINGS* (Voltages Referenced to VSS)

ÎÎÎÎ

Symbol

ÎÎÎÎÎÎÎÎÎÎÎ

Parameter

ÎÎÎÎÎÎ

Value

ÎÎÎ

Unit

ÎÎÎÎ

VDD

ÎÎÎÎÎÎÎÎÎÎÎ

DC Supply Voltage

ÎÎÎÎÎÎ

– 0.5 to + 18.0

ÎÎÎ

ÎÎÎÎ

Vin, Vout

ÎÎÎÎÎÎÎÎÎÎÎ

Input or Output Voltage (DC or Transient)

ÎÎÎÎÎÎ

– 0.5 to VDD + 0.5

ÎÎÎ

ÎÎÎÎ

lin, lout

ÎÎÎÎÎÎÎÎÎÎÎ

Input or Output Current (DC or Transient),

per Pin

ÎÎÎÎÎÎ

± 10

ÎÎÎ

ÎÎÎÎ

ÎÎÎÎÎÎÎÎÎÎÎ

Power Dissipation, per Package†

ÎÎÎÎÎÎ

500

ÎÎÎ

ÎÎÎÎ

Tstg

ÎÎÎÎÎÎÎÎÎÎÎ

Storage Temperature

ÎÎÎÎÎÎ

– 65 to + 150

ÎÎÎ

ÎÎÎÎ

ÎÎÎÎÎÎÎÎÎÎÎ

Lead Temperature (8–Second Soldering)

ÎÎÎÎÎÎ

260

ÎÎÎ

*Maximum Ratings are those values beyond which damage to the device may occur.

†Temperature Derating:

Plastic “P and D/DW” Packages: – 7.0 mW/

C From 65

C To 125

Ceramic “L” Packages: – 12 mW/

C From 100

C To 125

Figure 1. Typical Application: 2–Input Analog Multiplexer

INPUT

VDD

7 VSS

INPUT

OUTPUT CONDITION

A = C, B = OPEN

A = B, C = OPEN

Substrates of P–channel devices internally

connected to VDD; substrates of N–channel

devices internally connected to VSS.



SEMICONDUCTOR TECHNICAL DATA

 Motorola, Inc. 1995

REV 3

1/94



L SUFFIX

CERAMIC

CASE 632

ORDERING INFORMATION

MC14XXXUBCP Plastic

MC14XXXUBCL Ceramic

MC14XXXUBD SOIC

TA = – 55° to 125°C for all packages.

P SUFFIX

PLASTIC

CASE 646

D SUFFIX

SOIC

CASE 751A

105

GATEC

S–PC

OUTC

D–PA

VDD

D–NA

S–NC

S–NB

GATEB

S–PB

D–PB

VSS

GATEA

D–NB

PIN ASSIGNMENT

D = DRAIN

S = SOURCE

SCHEMATIC

14 13 2 1 11

126

7 8 3 4 5 10 9

VDD = PIN 14

VSS = PIN 7

MOTOROLA CMOS LOGIC DATAMC14007UB

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

ELECTRICAL CHARACTERISTICS (Voltages Referenced to VSS)

ÎÎÎÎÎÎÎÎÎÎ

Characteristic

ÎÎÎÎ

Symbol

ÎÎÎ

VDD

Vdc

ÎÎÎÎÎÎ

– 55

ÎÎÎÎÎÎÎÎ

ÎÎÎÎÎÎ

125

ÎÎÎ

Unit

ÎÎÎÎÎÎÎÎÎÎ

Characteristic

ÎÎÎÎ

Symbol

ÎÎÎ

VDD

Vdc

ÎÎÎ

Min

ÎÎÎÎ

Max

ÎÎÎ

Min

ÎÎÎÎ

Typ #

ÎÎÎ

Max

ÎÎÎÎ

Min

ÎÎÎ

Max

ÎÎÎ

Unit

ÎÎÎÎÎÎÎÎÎÎ

Output Voltage

“0” Level

Vin = VDD or 0

Vin = 0 or VDD “1” Level

ÎÎÎÎ

VOL

ÎÎÎ

5.0

ÎÎÎ

—

ÎÎÎÎ

0.05

ÎÎÎ

—

ÎÎÎÎ

ÎÎÎ

0.05

ÎÎÎÎ

—

ÎÎÎ

0.05

ÎÎÎ

Vdc

ÎÎÎÎÎÎÎÎÎÎ

Vin = 0 or VDD

“1” Level

ÎÎÎÎ

VOH

ÎÎÎ

5.0

ÎÎÎ

4.95

9.95

14.95

ÎÎÎÎ

—

ÎÎÎ

4.95

9.95

14.95

ÎÎÎÎ

5.0

ÎÎÎ

—

ÎÎÎÎ

4.95

9.95

14.95

ÎÎÎ

—

ÎÎÎ

Vdc

ÎÎÎÎÎÎÎÎÎÎ

Input Voltage

“0” Level

(VO = 4.5 Vdc)

(VO = 9.0 Vdc)

(VO = 13.5 Vdc)

(VO = 0.5 Vdc) “1” Level

(VO = 1.0 Vdc)

(VO = 1.5 Vdc)

ÎÎÎÎ

VIL

ÎÎÎ

5.0

ÎÎÎ

—

ÎÎÎÎ

1.0

2.0

2.5

ÎÎÎ

—

ÎÎÎÎ

2.25

4.50

6.75

ÎÎÎ

1.0

2.0

2.5

ÎÎÎÎ

—

ÎÎÎ

1.0

2.0

2.5

ÎÎÎ

Vdc

ÎÎÎÎÎÎÎÎÎÎ

(VO = 0.5 Vdc)

“1” Level

(VO = 1.0 Vdc)

(VO = 1.5 Vdc)

ÎÎÎÎ

VIH

ÎÎÎ

5.0

ÎÎÎ

4.0

8.0

12.5

ÎÎÎÎ

—

ÎÎÎ

4.0

8.0

12.5

ÎÎÎÎ

2.75

5.50

8.25

ÎÎÎ

—

ÎÎÎÎ

4.0

8.0

12.5

ÎÎÎ

—

ÎÎÎ

Vdc

ÎÎÎÎÎÎÎÎÎÎ

Output Drive Current

(VOH = 2.5 Vdc) Source

(VOH = 4.6 Vdc)

(VOH = 9.5 Vdc)

(VOH = 13.5 Vdc)

ÎÎÎÎ

IOH

ÎÎÎ

5.0

ÎÎÎ

– 3.0

– 0.64

– 1.6

– 4.2

ÎÎÎÎ

—

ÎÎÎ

– 2.4

– 0.51

– 1.3

– 3.4

ÎÎÎÎ

– 5.0

– 1.0

– 2.5

– 10

ÎÎÎ

—

ÎÎÎÎ

– 1.7

– 0.36

– 0.9

– 2.4

ÎÎÎ

—

ÎÎÎ

mAdc

ÎÎÎÎÎÎÎÎÎÎ

(VOL = 0.4 Vdc) Sink

(VOL = 0.5 Vdc)

(VOL = 1.5 Vdc)

ÎÎÎÎ

IOL

ÎÎÎ

5.0

ÎÎÎ

0.64

1.6

4.2

ÎÎÎÎ

—

ÎÎÎ

0.51

1.3

3.4

ÎÎÎÎ

1.0

2.5

ÎÎÎ

—

ÎÎÎÎ

0.36

0.9

2.4

ÎÎÎ

—

ÎÎÎ

mAdc

ÎÎÎÎÎÎÎÎÎÎ

Input Current

ÎÎÎÎ

Iin

ÎÎÎ

—

ÎÎÎÎ

± 0.1

ÎÎÎ

—

ÎÎÎÎ

±0.00001

ÎÎÎ

± 0.1

ÎÎÎÎ

—

ÎÎÎ

± 1.0

ÎÎÎ

µAdc

ÎÎÎÎÎÎÎÎÎÎ

Input Capacitance

(Vin = 0)

ÎÎÎÎ

Cin

ÎÎÎ

—

ÎÎÎ

—

ÎÎÎÎ

—

ÎÎÎ

—

ÎÎÎÎ

5.0

ÎÎÎ

7.5

ÎÎÎÎ

—

ÎÎÎ

—

ÎÎÎ

ÎÎÎÎÎÎÎÎÎÎ

Quiescent Current

(Per Package)

ÎÎÎÎ

IDD

ÎÎÎ

5.0

ÎÎÎ

—

ÎÎÎÎ

0.25

0.5

1.0

ÎÎÎ

—

ÎÎÎÎ

0.0005

0.0010

0.0015

ÎÎÎ

0.25

0.5

1.0

ÎÎÎÎ

—

ÎÎÎ

7.5

ÎÎÎ

µAdc

ÎÎÎÎÎÎÎÎÎÎ

Total Supply Current**†

(Dynamic plus Quiescent,

Per Gate) (CL = 50 pF)

ÎÎÎÎ

ÎÎÎ

5.0

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

IT = (0.7 µA/kHz) f + IDD/6

IT = (1.4 µA/kHz) f + IDD/6

IT = (2.2 µA/kHz) f + IDD/6

ÎÎÎ

µAdc

#Data labelled “Typ” is not to be used for design purposes but is intended as an indication of the IC’s potential performance.

**The formulas given are for the typical characteristics only at 25

†To calculate total supply current at loads other than 50 pF:

IT(CL) = IT(50 pF) + (CL – 50) Vfk

where: IT is in µA (per package), CL in pF, V = (VDD – VSS) in volts, f in kHz is input frequency, and k = 0.003.

This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However ,

precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high-impedance

circuit. For proper operation, Vin and Vout should be constrained to the range VSS ≤ (Vin or Vout) ≤ VDD.

Unused inputs must always be tied to an appropriate logic voltage level (e.g., either VSS or VDD). Unused outputs must

be left open.

MOTOROLA CMOS LOGIC DATA 33

MC14007UB

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

SWITCHING CHARACTERISTICS* (CL = 50 pF, TA = 25

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

Characteristic

ÎÎÎÎ

Symbol

ÎÎÎÎÎ

VDD

Vdc

ÎÎÎÎ

Min

ÎÎÎÎ

Typ #

ÎÎÎÎ

Max

ÎÎÎ

Unit

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

Output Rise Time

tTLH = (1.2 ns/pF) CL + 30 ns

tTLH = (0.5 ns/pF) CL + 20 ns

tTLH = (0.4 ns/pF) CL + 15 ns

ÎÎÎÎ

tTLH

ÎÎÎÎÎ

5.0

ÎÎÎÎ

—

ÎÎÎÎ

180

ÎÎÎ

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

Output Fall Time

tTHL = (1.2 ns/pF) CL + 15 ns

tTHL = (0.5 ns/pF) CL + 15 ns

tTHL = (0.4 ns/pF) CL + 10 ns

ÎÎÎÎ

tTHL

ÎÎÎÎÎ

5.0

ÎÎÎÎ

—

ÎÎÎÎ

150

ÎÎÎ

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

Turn–Off Delay Time

tPLH = (1.5 ns/pF) CL + 35 ns

tPLH = (0.2 ns/pF) CL + 20 ns

tPLH = (0.15 ns/pF) CL + 17.5 ns

ÎÎÎÎ

tPLH

ÎÎÎÎÎ

5.0

ÎÎÎÎ

—

ÎÎÎÎ

125

ÎÎÎ

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

Turn–On Delay Time

tPHL = (1.0 ns/pF) CL + 10 ns

tPHL = (0.3 ns/pF) CL + 15 ns

tPHL = (0.2 ns/pF) CL + 15 ns

ÎÎÎÎ

tPHL

ÎÎÎÎÎ

5.0

ÎÎÎÎ

—

ÎÎÎÎ

125

ÎÎÎ

*The formulas given are for the typical characteristics only. Switching specifications are for device connected as an inverter.

#Data labelled “Typ” is not to be used for design purposes but is intended as an indication of the IC’s potential performance.

Figure 2. Typical Output Source Characteristics Figure 3. Typical Output Sink Characteristics

VDD = –VGS VDD = VGS

14 14

VDS = VOH – VDD VDS = VOL

VSS VSS

IOH IOL

IOH, DRAIN CURRENT (mAdc)

IOL , DRAIN CURRENT (mAdc)

–4.0

–8.0

–12

–16

–20 –8.0–10 –6.0 –4.0 –2.0 –0

VDS, DRAIN VOLTAGE (Vdc)

8.0

4.0

00 2.0 4.0 6.0 8.0 10

VDS, DRAIN VOLTAGE (Vdc)

TA = –55

TA = +25

TA = +125

VGS = –5.0 Vdc b

–10 Vdc –15 Vdc

abc

c5.0 Vdc

TA = –55

TA = +25

TA = +125

VGS = 15 Vdc

10 Vdc

All unused inputs connected to ground. All unused inputs connected to ground.

These typical curves are not guarantees, but are design aids.

Caution: The maximum current rating is 10 mA per pin.

MOTOROLA CMOS LOGIC DATAMC14007UB

Figure 4. Switching Time and Power Dissipation Test Circuit and Waveforms

PULSE

GENERATOR

VDD

500

F0.01

CERAMIC

CLVout

VSS

Vin

IDVin

Vout

90%

50%

10%

90%

50%

10%

20 ns 20 ns VDD

VSS

VOH

VOL

tTHL tTLH

tPHL tPLH

APPLICATIONS

The MC14007UB dual pair plus inverter , which has access

to all its elements offers a number of unique circuit applica-

tions. Figures 1, 5, and 6 are a few examples of the device

flexibility.

Figure 5. 3–State Buffer

+VDD

DISABLE 3

INPUT 10

DISABLE 6

12 OUTPUT

INPUT DISABLE OUTPUT

OPEN

X = Don’t Care

Figure 6. AOI Functions Using Tree Logic

VDD

13 11

OUTPUT

OUT = A+B

•

Substrates of P–channel devices internally connected to VDD;

Substrates of N–channel devices internally connected to VSS.

MOTOROLA CMOS LOGIC DATA 35

MC14007UB

OUTLINE DIMENSIONS

L SUFFIX

CERAMIC DIP PACKAGE

CASE 632–08

ISSUE Y

DIM MIN MAX MIN MAX

MILLIMETERSINCHES

A0.750 0.785 19.05 19.94

B0.245 0.280 6.23 7.11

C0.155 0.200 3.94 5.08

D0.015 0.020 0.39 0.50

F0.055 0.065 1.40 1.65

G0.100 BSC 2.54 BSC

J0.008 0.015 0.21 0.38

K0.125 0.170 3.18 4.31

L0.300 BSC 7.62 BSC

M0 15 0 15

N0.020 0.040 0.51 1.01

____

NOTES:

1. DIMENSIONING AND TOLERANCING PER ANSI

Y14.5M, 1982.

2. CONTROLLING DIMENSION: INCH.

3. DIMENSION L TO CENTER OF LEAD WHEN

FORMED PARALLEL.

4. DIMENSION F MAY NARROW TO 0.76 (0.030)

WHERE THE LEAD ENTERS THE CERAMIC

BODY.

–A–

–B–

14 PLDGF N

14 PLJM

0.25 (0.010) T

–T–

SEATING

PLANE

1 7

14 9

P SUFFIX

PLASTIC DIP PACKAGE

CASE 646–06

ISSUE L

NOTES:

1. LEADS WITHIN 0.13 (0.005) RADIUS OF TRUE

POSITION AT SEATING PLANE AT MAXIMUM

MATERIAL CONDITION.

2. DIMENSION L TO CENTER OF LEADS WHEN

FORMED PARALLEL.

3. DIMENSION B DOES NOT INCLUDE MOLD

FLASH.

4. ROUNDED CORNERS OPTIONAL.

1 7

14 8

H G D K

SEATING

PLANE

DIM MIN MAX MIN MAX

MILLIMETERSINCHES

A0.715 0.770 18.16 19.56

B0.240 0.260 6.10 6.60

C0.145 0.185 3.69 4.69

D0.015 0.021 0.38 0.53

F0.040 0.070 1.02 1.78

G0.100 BSC 2.54 BSC

H0.052 0.095 1.32 2.41

J0.008 0.015 0.20 0.38

K0.115 0.135 2.92 3.43

L0.300 BSC 7.62 BSC

M0 10 0 10

N0.015 0.039 0.39 1.01

_ _ _ _

MOTOROLA CMOS LOGIC DATAMC14007UB

OUTLINE DIMENSIONS

D SUFFIX

PLASTIC SOIC PACKAGE

CASE 751A–03

ISSUE F

NOTES:

1. DIMENSIONING AND TOLERANCING PER ANSI

Y14.5M, 1982.

2. CONTROLLING DIMENSION: MILLIMETER.

3. DIMENSIONS A AND B DO NOT INCLUDE

MOLD PROTRUSION.

4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)

PER SIDE.

5. DIMENSION D DOES NOT INCLUDE DAMBAR

PROTRUSION. ALLOWABLE DAMBAR

PROTRUSION SHALL BE 0.127 (0.005) TOTAL

IN EXCESS OF THE D DIMENSION AT

MAXIMUM MATERIAL CONDITION.

–A–

–B–

P7 PL

14 8

71 M

0.25 (0.010) B M

0.25 (0.010) A S

–T–

RX 45

SEATING

PLANE

D14 PL K

DIM MIN MAX MIN MAX

INCHESMILLIMETERS

A8.55 8.75 0.337 0.344

B3.80 4.00 0.150 0.157

C1.35 1.75 0.054 0.068

D0.35 0.49 0.014 0.019

F0.40 1.25 0.016 0.049

G1.27 BSC 0.050 BSC

J0.19 0.25 0.008 0.009

K0.10 0.25 0.004 0.009

M0 7 0 7

P5.80 6.20 0.228 0.244

R0.25 0.50 0.010 0.019

_ _ _ _

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the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit,

and specifically disclaims any and all liability, including without limitation consequential or incidental damages. “T ypical” parameters which may be provided

in Motorola data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters,

including “Typicals” must be validated for each customer application by customer’s technical experts. Motorola does not convey any license under its patent

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MC14007UB/D

*MC14007UB/D*

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