BTS4300SGA
Smart High-Side Power Switch
Data Sheet, Rev. 1.0, March 2008
Automotive Power
Datasheet 2 1.0, 2007-19-12
BTS 4300SGA
1Overview 3
2Block Diagram 5
3 Pin Configuration 6
3.1 Pin Assignment 6
3.2 Pin Definitions and Functions 6
3.3 Voltage and Current Definition 7
4 General Product Characteristics 8
4.1 Absolute Maximum Ratings 8
4.2 Functional Range 9
4.3 Thermal Resistance 9
5 Power Stage 10
5.1 Output ON-State Resistance 10
5.2 Turn ON / OFF Characteristics 10
5.3 Inductive Output Clamp 11
5.4 Electrical Characteristics Power Stage 12
6 Protection Mechanisms 13
6.1 Undervoltage Protection 13
6.2 Overvoltage Protection 13
6.3 Reverse Polarity Protection 14
6.4 Overload Protection 14
6.5 Electrical Characteristics Protection Functions 16
7 Diagnostic Mechanism 17
7.1 ST Pin 17
7.2 ST Signal in Case of Failures 17
7.2.1 Diagnostic in Open Load, Channel OFF 17
7.2.2 ST Signal in case of Over Temperature 19
7.3 Electrical Characteristics Diagnostic Functions 20
8 Input Pin 21
8.1 Input Circuitry 21
8.2 Electrical Characteristics 21
9 Application Information 22
9.1 Further Application Information 22
10 Package Outlines 23
11 Revision History 24
PG-DSO-8-24
Type Package Marking
BTS4300SGA PG-DSO-8-24 4300SGA
Data Sheet 3 Rev. 1.0, 2008-03-18
Smart High-Side Power Switch
BTS4300SGA
1 Overview
Basic Features
Fit for 12V application
One Channel device
Very Low Stand-by Current
CMOS Compatible Inputs
Electrostatic Discharge Protection (ESD)
Optimized Electromagnetic Compatibility
Logic ground independent from load ground
Very low leakage current from OUT to the load in OFF state
Green Product (RoHS compliant)
•AEC Qualified
Description
The BTS4300SGA is a single channel Smart High-Side Power Switch. It is embedded in a PG-DSO-8-24 package,
providing protective functions and diagnostics. The power transistor is built by a N-channel power MOSFET with
charge pump. The device is monolithically integrated in Smart technology. It is specially designed to drive Relay
or LED in the harsh automotive environment.
Diagnostic Feature
Open drain diagnostic output
Open load detection in OFF state
Table 1 Electrical Parameters (short form)
Parameter Symbol Value
Operating voltage range VSOP 5V .... 34V
Over voltage protection VS (AZ) 41V
Maximum ON State resistance at Tj = 150°C RDS(ON) 600m
Nominal load current IL (nom) 0.4A
Minimum current limitation IL_SCR 0.4A
Standby current for the whole device with load IS(off) 26µA
Maximum reverse battery voltage -Vs(REV) 32V
BTS4300SGA
Overview
Data Sheet 4 Rev. 1.0, 2008-03-18
Protection Functions
Short circuit protection
Overload protection
Current limitation
Thermal shutdown with restart
Overvoltage protection (including load dump)
Loss of ground and loss of battery protection
Electrostatic discharge protection (ESD)
Application
All types of relays, resistive and capacitive loads
Data Sheet 5 Rev. 1.0, 2008-03-18
BTS4300SGA
Block Diagram
2 Block Diagram
Figure 1 Block diagram for the BTS4300SGA
Block diagram.emf
V
S
OUT
IN
T
driver
logic
gate control
&
charge pump
open load detection
over
temperature clamp for
inductive load
over current
switch off
voltage sensor
GND
ESD
protection
ST
internal
power
supply
BTS4300SGA
Pin Configuration
Data Sheet 6 Rev. 1.0, 2008-03-18
3 Pin Configuration
3.1 Pin Assignment
Figure 2 Pin Configuration
3.2 Pin Definitions and Functions
Pin Symbol Function
1GNDGround; Ground connection
2IN Input channel; Input signal. Activate the channel in case of logic high level
3OUTOutput; Protected High side power output channel
4ST Diagnostic feedback; of channel. Open drain.
5, 6, 7, 8 VSBattery voltage; Design the wiring for the simultaneous max. short circuit current
and also for low thermal resistance
VS
VS
VS
GND
IN
OUT
ST VS
1
3
2
8
7
6
4 5
Data Sheet 7 Rev. 1.0, 2008-03-18
BTS4300SGA
Pin Configuration
3.3 Voltage and Current Definition
Figure 3 shows all terms used in this data sheet, with associated convention for positive values.
Figure 3 Voltage and current definition
V
S
IN
ST
GND
OUT
I
IN
I
ST
V
S
V
IN
V
ST
I
S
I
GND
V
DS
V
OUT
I
L
Voltage and current convention
single avec diag.vsd
R
GND
BTS4300SGA
General Product Characteristics
Data Sheet 8 Rev. 1.0, 2008-03-18
4 General Product Characteristics
4.1 Absolute Maximum Ratings
Note: Stresses above the ones listed here may cause permanent damage to the device. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
Note: Integrated protection functions are designed to prevent IC destruction under fault conditions described in the
data sheet. Fault conditions are considered as “outside” normal operating range. Protection functions are
not designed for continuous repetitive operation.
Absolute Maximum Ratings 1)
Tj = 25 °C; (unless otherwise specified)
1) Not subject to production test, specified by design
Pos. Parameter Symbol Limit Values Unit Conditions
Min. Max.
Voltages
4.1.1 Supply voltage VS–40V
4.1.2 Reverse polarity Voltage - VS(REV) 032V
4.1.3 Supply voltage for short circuit protection Vbat(SC) 028VRECU = 20mΩ,
RCable=16m/m,
LCable=1µH/m,
l = 0 or 5m 2)
see Chapter 6
2) In accordance to AEC Q100-012 and AEC Q101-006
Input pins
4.1.4 Voltage at INPUT pins VIN -10 16 V
4.1.5 Current through INPUT pins IIN -5 5 mA
Power stage
4.1.6 Load current | IL |– I
L(LIM) A–
4.1.7 Power dissipation (DC), PTOT –0.8WTA=85°C,
Tj <150°C
4.1.8 Inductive load switch off energy
dissipation, Single pulse
EAS –800mJTj=150°C,
VS=13.5V,
IL = 0.3A
Temperatures
4.1.9 Junction Temperature Tj-40 150 °C–
4.1.10 Storage Temperature Tstg -55 150 °C–
ESD Susceptibility
4.1.11 ESD Resistivity IN pin VESD -1 1 kV HBM3)
3) ESD susceptibility HBM according to EIA/JESD 22-A 114B
4.1.12 ESD Resistivity all other pins VESD -5 5 kV HBM3)
Data Sheet 9 Rev. 1.0, 2008-03-18
BTS4300SGA
General Product Characteristics
4.2 Functional Range
Note: Within the functional range the IC operates as described in the circuit description. The electrical
characteristics are specified within the conditions given in the related electrical characteristics table.
4.3 Thermal Resistance
Pos. Parameter Symbol Limit Values Unit Conditions
Min. Max.
4.2.1 Operating Voltage VSOP 534VVIN = 4.5V,
RL = 47Ω,
VDS < 0.5V
4.2.2 Undervoltage shutdown VSUV –5V
4.2.3 Undervoltage restart of charge
pump
VS(u cp) –5.5V
4.2.4 Operating current IGND 1.3 mA VIN = 5V
4.2.5 Standby current IS(OFF)
26 µA Tj = 150°C,
VIN = 0V
Pos. Parameter Symbol Limit Values Unit Conditions
Min. Typ. Max.
4.3.1 Junction to Soldering Point RthJC ––15K/W
1)
1) Not subject to production test, specified by design
4.3.2 Junction to Ambient:
channel active
RthJA 83 K/W with 6cm² cooling
area1)
BTS4300SGA
Power Stage
Data Sheet 10 Rev. 1.0, 2008-03-18
5 Power Stage
The power stage is built by an N-channel vertical power MOSFET (DMOS) with charge pump.
5.1 Output ON-State Resistance
The ON-state resistance RDS(ON) depends on the supply voltage as well as the junction temperature Tj. Figure 4
shows the dependencies for the typical ON-state resistance. The behavior in reverse polarity is described in
Chapter 6.3.
Figure 4 Typical ON-state resistance
A high signal (See Chapter 8) at the input pin causes the power DMOS to switch ON with a dedicated slope, which
is optimized in terms of EMC emission.
5.2 Turn ON / OFF Characteristics
Figure 5 shows the typical timing when switching a resistive load.
Figure 5 Turn ON/OFF (resistive) timing
0
100
200
300
400
500
600
700
800
900
1000
01234 56789101112131415161718
Battery voltage (V)
Rdson (m)
Rdson.vsd
0
100
200
300
400
500
600
-40
-20
0
20
40
60
80
100
120
140
Junction temperatureC)
Rdson (m )
IN
t
V
OUT
t
ON
t
OFF
90% V
S
10% V
S
V
IN_H_min
V
IN_L_m ax
t
Switching times.vsd
30% V
S
70% V
S
dV/dt
ON
dV/dt
OFF
Data Sheet 11 Rev. 1.0, 2008-03-18
BTS4300SGA
Power Stage
5.3 Inductive Output Clamp
When switching OFF inductive loads with high side switches, the voltage VOUT drops below ground potential,
because the inductance intends to continue driving the current. To prevent the destruction of the device due to
high voltages, there is a voltage clamp mechanism implemented that keeps the negative output voltage at a certain
level (VS-VDS(AZ)). Please refers to Figure 6 and Figure 7 for details. Nevertheless, the maximum allowed load
inductance is limited.
Figure 6 Output clamp
Figure 7 Switching in inductance timing
Maximum Load Inductance
During demagnetization of inductive loads, energy has to be dissipated in the BTS4300SGA. This energy can be
calculated with following equation:
V
BAT
V
OUT
I
L
L, R
L
V
S
OUT
V
DS
LOGIC
IN
V
IN
Output clamp.vsd
GND
IN
V
OUT
I
L
V
S
V
S-
V
DS(AZ)
t
t
t
Switching an inductance.vs
d
t
peak
EV
DSAZ()L
RL
--------
×VSVDS AZ()
RL
----------------------------------------RLIL
×
VSVDS AZ()
----------------------------------------


ln IL
++×=
BTS4300SGA
Power Stage
Data Sheet 12 Rev. 1.0, 2008-03-18
Following equation simplifies under the assumption of RL = 0.
The energy, which is converted into heat, is limited by the thermal design of the component.
5.4 Electrical Characteristics Power Stage
Electrical Characteristics: Power stage
VS = 13.5V, Tj = -40 °C to +150 °C,(unless otherwise specified). Typical values are given at Tj = 25°C
Pos. Parameter Symbol Limit Values Unit Conditions
Min. Typ. Max.
5.4.1 ON-state resistance per channel RDS(ON) –300–mTj = 25°C, 1)
IL = 0.3A,
VBB = 9...40V
VIN= 5V,
See Figure 4
1) Not subject to production test, specified by design
–480600 T
j =150°C
5.4.2 Nominal load current IL(nom) 0.4––ATA =85°C1),
Tj <150°C
5.4.3 Drain to Source Clamping Voltage
VDS(AZ) = VS-VOUT
VDS(AZ) 41 47 V IDS = 4mA2)
2) Voltage is measured by forcing IDS.
5.4.4 Output leakage current IL(OFF) ––12µAVIN=0V,
VOUT = 0V
5.4.5 Slew rate ON
10% to 30% VOUT
dV/dtON –- –- 2 V/µs RL=47Ω,
Vs=13.5V,
See Figure 5
5.4.6 Slew rate OFF
70% to 40% VOUT
-dV/dtOFF ––2V/µs
5.4.7 Turn-ON time to 90% VOUT
Includes propagation delay
tON ––140µs
5.4.8 Turn-OFF time to 10%
VOUTIncludes propagation delay
tOFF ––170µs
E1
2
---LI2
×1
VS
VSVDS AZ )()
-------------------------------------------


×=
Data Sheet 13 Rev. 1.0, 2008-03-18
BTS4300SGA
Protection Mechanisms
6 Protection Mechanisms
The device provides embedded protective functions. Integrated protection functions are designed to prevent the
destruction of the IC from fault conditions described in the data sheet. Fault conditions are considered as “outside”
normal operating range. Protection functions are designed for neither continuous nor repetitive operation.
6.1 Undervoltage Protection
Below VSOP_min, the under voltage mechanism is met. If the supply voltage is below the under voltage mechanism,
the device is OFF (turns OFF). As soon as the supply voltage is above the under voltage mechanism, then the
device can be switched ON and the protection functions are operational.
6.2 Overvoltage Protection
There is a clamp mechanism for over voltage protection. To guarantee this mechanism operates properly in the
application, the current in the zener diode ZDAZ has to be limited by a ground resistor. Figure 8 shows a typical
application to withstand overvoltage issues. In case of supply greater than VS(AZ), the power transistor switches
ON and the voltage across logic section is clamped. As a result, the internal ground potential rises to VS - VS(AZ).
Due to the ESD zener diodes, the potential at pin IN rises almost to that potential, depending on the impedance
of the connected circuitry. Integrated resistors are provided at the IN pin to protect the input circuitry from
excessive current flow during this condition.
Figure 8 Over voltage protection with external components
In the case the supply voltage is in between of VS(SC) max and VDS(AZ), the output transistor is still operational and
follow the input. If the channel is in ON state, parameters are no longer warranted and lifetime is reduced
compared to normal mode. This specially impacts the short circuit robustness, as well as the maximum energy
EAS the device can handle.
IN
ST
R
IN
R
ST
ZD
ESD
GND
OUT
V
S
V
BAT
R
GND
ZD
AZ
LOGIC
Overvoltage protection single with diag.vsd
BTS4300SGA
Protection Mechanisms
Data Sheet 14 Rev. 1.0, 2008-03-18
6.3 Reverse Polarity Protection
In case of reverse polarity, the intrinsic body diode causes power dissipation. The current in this intrinsic body
diode is limited by the load itself. Additionally, the current into the ground path and the logical pins has to be limited
to the maximum current described in Chapter 4.1, sometimes with an external resistor. Figure 9 shows a typical
application. The RGND resistor is used to limit the current in the zener protection of the device. Resistors RIN and
RST is used to limit the current in the logic of the device and in the ESD protection stage. The recommended value
for RGND is 150, for RST 0/1= 15k. In case the over voltage is not considered in the application, RGND can be
replaced by a Shottky diode.
Figure 9 Reverse polarity protection with external components
6.4 Overload Protection
In case of overload, or short circuit to ground, the BTS4300SGA offers two protections mechanisms.
Current limitation
At first step, the instantaneous power in the switch is maintained to a safe level by limiting the current to the
maximum current allowed in the switch IL(LIM). During this time, the DMOS temperature is increasing, which affects
the current flowing in the DMOS.
Thermal protection
At thermal shutdown, the device turns OFF and cools down. A restart mechanism is used, after cooling down, the
device restarts and limits the current to IL(SCR). Figure 10 shows the behavior of the current limitation as a function
of time.
Micro controller
(e.g. XC22xx)
GND
OUT
IN
V
S
V
BAT
R
ST
ST
R
IN
R
GND
Z
dbody
ZD
ESD
Reverse Polarity single with diag.vs
d
-V
DS(REV)
I
L(nom)
R
STPU
VccµC
Data Sheet 15 Rev. 1.0, 2008-03-18
BTS4300SGA
Protection Mechanisms
Figure 10 Current limitation function of the time
t
IL
IL(LIM)
IL(SCr)
Cur rent lim itati on w i th diag full . vsd
t
IN
ST
t
T
dST(+)
BTS4300SGA
Protection Mechanisms
Data Sheet 16 Rev. 1.0, 2008-03-18
6.5 Electrical Characteristics Protection Functions
Electrical Characteristics: Protection
VS = 13.5V, Tj = -40 °C to +150 °C. Typical values are given at Tj = 25°C
Pos. Parameter Symbol Limit Values Unit Conditions
Min. Typ. Max.
Reverse polarity
6.5.1 Drain source diode voltage during
reverse polarity
-VDS(REV) 600 mV TJ = 150°C
Overvoltage
6.5.2 Over voltage protection VS(AZ) 41 V Is = 4mA
Overload condition
6.5.3 Load current limitation IL(LIM)
0.4
1.2
2
ATj = -40°C,
Tj = 25°C,
Tj = 150°C,
VS = 20V
6.5.4 Repetitive short circuit current
limitation
IL(SCR) –1–A
1)
6.5.5 Thermal shutdown temperature TjSC 150 °C 1)
6.5.6 Thermal shutdown hysteresis TJT –10K
1)
1) Not subject to production test, but specified by design
Data Sheet 17 Rev. 1.0, 2008-03-18
BTS4300SGA
Diagnostic Mechanism
7 Diagnostic Mechanism
For diagnosis purpose, the BTS4300SGA provides a status pin.
7.1 ST Pin
BTS4300SGA status pin is an open drain, active low circuit. Figure 11 shows the equivalent circuitry. As long as
no “hard” failure mode occurs (Short circuit to GND / Over temperature or open load in OFF), the signal is
permanently high, and due to a required external pull-up to the logic voltage will exhibit a logic high in the
application. A suggested value for the RPU ST is 15kΩ.
.
Figure 11 Status output circuitry
7.2 ST Signal in Case of Failures
Table 3 gives a quick reference for the logical state of the ST pin during device operation.
7.2.1 Diagnostic in Open Load, Channel OFF
For open load diagnosis in OFF-state, an external output pull-up resistor (ROL) is recommended. For calculation
of the pull-up resistor value, the leakage currents and the open load threshold voltage VOL(OFF) has to be taken into
account. Figure 12 gives a sketch of the situation and Figure 13 shows the typical timing diagram.
Ileakage defines the leakage current in the complete system, including IL(OFF) (see Chapter 5.4) and external
leakages e.g due to humidity, corrosion, etc... in the application.
Table 3 ST pin truth table
Device operation IN OUT ST
Normal operation L L H
HHH
Open Load channel L H L
HHH
Over temp channel L L H
HLL
Short circuit to GND L L H
HL1)
1) VouT < 2V typ.
L
ST pin full diag.vsd
GND
ST
R
ST
ZD
ESD
R
PU ST
V
ccµC
Channel 0
Diagnostic
Logic
BTS4300SGA
Diagnostic Mechanism
Data Sheet 18 Rev. 1.0, 2008-03-18
To reduce the stand-by current of the system, an open load resistor switch SOL is recommended.
If the channel is OFF, the output is no longer pulled down by the load and VOUT voltage rises to nearly VS. This is
recognized by the device as open load. The voltage threshold is given by VOL(OFF). In that case, the ST signal is
switched to a logical low VSTL.
Figure 12 Open load detection in OFF electrical equivalent circuit
Figure 13 ST in open load condition
OUT
V
S
R
leakage
R
OL
S
OL
V
bat
V
OL(OFF)
I
leakage
I
L(OL)
OL
comp.
Open Load i n OF F .vsd
GND
R
GND
IN
V
OUT
ST
I
L
Diagnostic In Open load full diag.vs
t
t
t
t
V
ST(HIGH)
V
OL(OFF)
V
ST(LOW)
Data Sheet 19 Rev. 1.0, 2008-03-18
BTS4300SGA
Diagnostic Mechanism
7.2.2 ST Signal in case of Over Temperature
In case of over temperature, the junction temperature reaches the thermal shutdown temperature TjSC.
In that case, the ST signal is stable and remains to toggling between VST(L) and VST(H). Figure 14 gives a sketch
of the situation.
Figure 14 Sense signal in overtemperature condition
.
IN
V
OUT
ST
T
J
Diagnostic In Overload full toggling.vs
t
t
t
t
T
JSC
T
JSC
BTS4300SGA
Diagnostic Mechanism
Data Sheet 20 Rev. 1.0, 2008-03-18
7.3 Electrical Characteristics Diagnostic Functions
Electrical Characteristics: Diagnostics
VS = 13.5V, Tj = -40 °C to +150 °C, (unless otherwise specified) Typical values are given at Vs = 13.5V, Tj = 25°C
Pos. Parameter Symbol Limit Values Unit Conditions
Min. Typ. Max.
Load condition threshold for diagnostic
7.3.1 Open Load detection voltage VOL(OFF) –3.0–VVIN = 0V
7.3.1 Open load detection current IL(OL) –5–µAincluded in the
standby current
IS(OFF)
ST pin
7.3.2 Status output (open drain)
High level; Zener limit voltage
VST (HIGH) 5.4 6.1 V IST = +1,6mA1),
Zener Limit voltage
7.3.3 Status output (open drain)
Low level
VST (LOW) ––0.6VIST =+1,6mA1)
1) If ground resistor RGND is used, the voltage drop across this resistor has to be added
Diagnostic timing
7.3.4 Status invalid after positive input
slope
tdST(+) –300600µs
2)
2) Not subject to production test, specified by design
7.3.5 Short circuit detection voltage VOUT (SC) –2.8–V
Data Sheet 21 Rev. 1.0, 2008-03-18
BTS4300SGA
Input Pin
8 Input Pin
8.1 Input Circuitry
The input circuitry is CMOS compatible. The concept of the Input pin is to react to voltage transition and not to
voltage threshold. With the Schmidt trigger, it is impossible to have the device in an un-defined state, if the voltage
on the input pin is slowly increasing or decreasing. The output is either OFF or ON but cannot be in an linear or
undefined state. The input circuitry is compatible with PWM applications. Figure 15 shows the electrical equivalent
input circuitry. The pull down current source ensures the channel is OFF with a floating input.
Figure 15 Input pin circuitry
8.2 Electrical Characteristics
Electrical Characteristics: Diagnostics
VS = 13.5V, Tj = -40 °C to +150 °C, Typical values are given at Vs = 13.5V, Tj = 25°C
Pos. Parameter Symbol Limit Values Unit Conditions
Min. Typ. Max.
INput pins characteristics
8.2.1 Low level input voltage VIN(L) ––0.8V
1)
1) If ground resistor RGND is used, the voltage drop across this resistor has to be added
8.2.2 High level input voltage VIN(H) 2.2––V
1)
8.2.3 Input voltage hysteresis VIN(HYS) –0.3–V
2)
2) Not subject to production test, specified by design
8.2.4 Low level input current IIN(L) 1–30µAVIN= 0.7V
8.2.5 High level input current IIN(H) 1–30µAVIN= 5V
8.2.6 Input resistance RI1.5 3.5 5 kSee Figure 15
IN
ESD
To driver’s logic
Input circuitry.vsd
R
I
I
I
BTS4300SGA
Application Information
Data Sheet 22 Rev. 1.0, 2008-03-18
9 Application Information
Note: The following information is given as a hint for the implementation of the device only and shall not be
regarded as a description or warranty of a certain functionality, condition or quality of the device.
Figure 16 Application diagram with BTS4300SGA
Note: This is a very simplified example of an application circuit. The function must be verified in the real application.
9.1 Further Application Information
For further information you may visit http://www.infineon.com/
OUT
IN
GND
Vdd
Microcontroller
(e.g. XC22xx)
R
IN
R
ST
IN
ST
IS
GND
OUT
V
s
R
GND
V
BAT
R
OL
V
BAT_SW
V
DD
R
PUST
V
DD
Application example single avec diag.vsd
Data Sheet 23 Rev. 1.0, 2008-03-18
BTS4300SGA
Package Outlines
10 Package Outlines
Figure 17 PG-DSO-8-24 (Plastic Dual Small Outline Package)
Green Product (RoHS compliant)
To meet the world-wide customer requirements for environmentally friendly products and to be compliant with
government regulations the device is available as a green product. Green products are RoHS-Compliant (i.e Pb-
free finish on leads and suitable for Pb-free soldering according to IPC/JEDEC J-STD-020).
Does not include plastic or metal protrusion of 0.15 max. per side
-0.05
-0.2
+0.1
5
0.41
Index Marking (Chamfer)
x8
1
1)
4
8
1.27
5
A
0.1
0.2
M
A
(1.5)
0.1 MIN.
1.75 MAX.
C
C
6±0.2
0.64
0.33 4
-0.2
-0.01
0.2
+0.05
x 45˚
±0.08
1)
±0.25
MAX.
1)
Index
Marking
BTS4300SGA
Revision History
Data Sheet 24 Rev. 1.0, 2008-03-18
11 Revision History
Version Date Changes
1.0 2008-03-18 Creation of the data sheet
Edition 2008-03-18
Published by
Infineon Technologies AG
81726 Munich, Germany
© 2008 Infineon Technologies AG
All Rights Reserved.
Legal Disclaimer
The information given in this document shall in no event be regarded as a guarantee of conditions or
characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any
information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties
and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights
of any third party.
Information
For further information on technology, delivery terms and conditions and prices, please contact the nearest
Infineon Technologies Office (www.infineon.com).
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Due to technical requirements, components may contain dangerous substances. For information on the types in
question, please contact the nearest Infineon Technologies Office.
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