74LV123BQ,115\"\" - NXP SEMICONDUCTORS

1. General description

The 74LV123 is a low-voltage Si-gate CMOS device and is pin and function compatible

with the 74HC123; 74HCT123. It is a dual retriggerable monostable multivibrator which

uses three methods to control the output pulse width:

1. The basic pulse time is programmed by the selection of an external resistor (REXT)

and capacitor (CEXT). These are norma lly con n ec ted as sh own in Figure 9.

2. Once triggered, the basic output pulse width may be extended by retriggering the

gated active LOW- going edge input (nA) or the active HIGH-going edge in put (nB). By

repeating this process, the ou tput pulse peri od (nQ = HIGH, n Q = LOW) can be made

as long as desired (see Figure 12).

3. Alternatively, an output delay can be ter mina ted at an y time by a LOW-going edg e on

input nRD, which also inhibits the triggering (see Figure 13).

Schmitt-trigger action in the nA and nB inputs makes the circuit highly tolerant of slower

input rise and fall times.

2. Features and benefits

Optimized for low-voltage applications: 1.0 V to 5.5 V

Accepts TTL input levels between VCC = 2.7 V and VCC = 3.6 V

Typical output ground bounce: < 0.8 V at VCC = 3.3 V and Tamb = 25 C

Typical HIGH-leve l ou tpu t vo ltage (VOH) undershoot: > 2 V at VCC = 3.3 V and

Tamb = 25 C

DC triggered from active HIGH or active LOW inputs

Retriggerable for very long pulses up to 100 % duty factor

Direct reset termin ate s ou tp ut puls es

Schmitt-trigger action on all inputs except for the reset input

74LV123

Dual retriggerable monostable multivibrator with reset

Rev. 7 — 12 December 2011 Product data sheet

Product data sheet Rev. 7 — 12 December 2011 2 of 24

NXP Semiconductors 74LV123

Dual retriggerable monostable multivibrator with reset

3. Ordering information

4. Functional diagram

Tabl e 1. Ordering information

Type number Package

Temperature range Name Description Version

74LV123N 40 Cto+125C DIP16 plastic dual in-line package; 16 leads (300 mil) SOT38-4

74LV123D 40 Cto+125C SO16 plastic small outline package; 16 leads; body width

3.9 mm SOT109-1

74LV123DB 40 Cto+125C SSOP16 plastic shrink small outline package; 16 leads; body width

5.3 mm SOT338-1

74LV123PW 40 Cto+125C TSSOP16 plastic thin shrink small outline package; 16 leads; body

width 4.4 mm SOT403-1

74LV123BQ 40 Cto+125C DHVQFN16 plastic dual in-line compatible thermal enhanced very thin

quad flat package; no leads; 16 terminals;

body 2.5 3.5 0.85 mm

SOT763-1

Fig 1. Logic symbol Fig 2. IEC logic symbol

001aae521

1RD

2RD

1CEXT

1REXT/CEXT

2CEXT

2REXT/CEXT

RCX

001aae522

RCX

Product data sheet Rev. 7 — 12 December 2011 3 of 24

NXP Semiconductors 74LV123

Dual retriggerable monostable multivibrator with reset

Fig 3. Functional dia g ra m

2RD

S13

1REXT/CEXT

1CEXT

001aaa610

1RD

2REXT/CEXT

2CEXT

Q2Q

Product data sheet Rev. 7 — 12 December 2011 4 of 24

NXP Semiconductors 74LV123

Dual retriggerable monostable multivibrator with reset

Fig 4. Logic diagram

001aae524

nREXT/CEXT

CL CL

CLCL V

Product data sheet Rev. 7 — 12 December 2011 5 of 24

NXP Semiconductors 74LV123

Dual retriggerable monostable multivibrator with reset

5. Pinning information

5.1 Pinning

5.2 Pin description

(1) The die substrate is attached to this

pad using conductive die attach

material. It cannot be used as a supply

pin or input.

Fig 5. Pin configuration for DIP16, SO16,

SSOP16 and TSSOP16 Fig 6. Pin configuration for DHVQFN16

74LV123

1A V

1B 1REXT/CEXT

1RD 1CEXT

1Q 1Q

2Q 2Q

2CEXT 2RD

2REXT/CEXT 2B

GND 2A

001aag678

001aag650

74LV123

2REXT/CEXT 2B

2CEXT 2RD

2Q 2Q

1Q 1Q

1RD 1CEXT

1B 1REXT/CEXT

GND

VCC

Transparent top view

7 10

6 11

5 12

413

3 14

2 15

terminal 1

index area

VCC(1)

Table 2. Pin description

Symbol Pin Description

1A 1 negative-edge triggered input 1

1B 2 positive-edge triggered input 1

1RD 3 direct reset LOW and positive-edge triggered input 1

1Q 4 active LOW output 1

2Q 5 active HIGH output 2

2CEXT 6 external capacitor connection 2

2REXT/CEXT 7 external resistor and capacitor connection 2

GND 8 ground (0 V)

2A 9 negative-edge triggered input 2

2B 10 positive-edge triggered inpu t 2

2RD 11 direct reset LOW and positive-edge triggered input 2

2Q 12 active LOW output 2

1Q 13 active HIGH output 1

1CEXT 14 external capacitor connection 1

1REXT/CEXT 15 external resistor and capacitor connection 1

VCC 16 supply voltage

Product data sheet Rev. 7 — 12 December 2011 6 of 24

NXP Semiconductors 74LV123

Dual retriggerable monostable multivibrator with reset

6. Functional description

[1] H = HIGH voltage level;

L = LOW voltage level;

X = don’t care;

 = LOW-to-HIGH transition;

 = HIGH-to-LOW transition;

= one HIGH level output pulse

= one LOW level output pulse

[2] If the monostable multivibrator was triggered before this condition was established, the pulse will continue as programmed.

Table 3. Function table[1]

Input Output

nRDnA nB nQ nQ

LXXLH

XHXL

[2] H[2]

XXLL

[2] H[2]

HL

HH

LH

Product data sheet Rev. 7 — 12 December 2011 7 of 24

NXP Semiconductors 74LV123

Dual retriggerable monostable multivibrator with reset

7. Limiting values

[1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed.

[2] For DIP16 package: Ptot derates linearly with 12 mW/K above 70 C.

[3] For SO16 package: Ptot derates linearly with 8 mW/K above 70 C.

[4] For SSOP16 and TSSOP16 packages: Ptot derates linearly with 5.5 mW/K above 60 C.

[5] For DHVQFN16 package: Ptot derates linearly with 4.5 mW/K above 60 C.

8. Recommended operating conditions

[1] The 74LV123 is guaranteed to function down to VCC = 1.0 V (input levels GND or VCC); Section 9 “S t atic characteristics” are guaranteed

from VCC = 1.2 V to VCC = 5.5 V.

[2] Except for Schmitt-trigger inputs nA and nB.

Table 4. Limiting values

In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).

Symbol Parameter Conditions Min Max Unit

VCC supply voltage 0.5 +7 V

IIK input clamping current VI<0.5 V or VI>V

CC +0.5V [1] -20 mA

IOK output clamping current VO<0.5 V or VO>V

CC +0.5V [1] -50 mA

IOoutput current except for pins nREXT/CEXT;

VO=0.5 V to (VCC +0.5V) [1] -25 mA

ICC supply current - +50 mA

IGND ground current - 50 mA

Tstg storage temperature 65 +150 C

Ptot total power dissipation Tamb =40 C to +125 C

DIP16 package [2] - 750 mW

SO16 package [3] - 500 mW

SSOP16 package [4] - 500 mW

TSSOP16 package [4] - 500 mW

DHVQFN16 package [5] - 500 mW

Table 5. Recommended operating conditions

Symbol Parameter Conditions Min Typ Max Unit

VCC supply voltage [1] 1.0 3.3 5.5 V

VIinput voltage 0 - VCC V

VOoutput voltage 0 - VCC V

Tamb ambient temperature in free air 40 +25 +125 C

t/V input transition rise and fall rate VCC = 1.0 V to 2.0 V [2] - - 500 ns/V

VCC = 2.0 V to 2.7 V - - 200 ns/V

VCC = 2.7 V to 3.6 V - - 100 ns/V

VCC = 3.6 V to 5.5 V - - 50 ns/V

Product data sheet Rev. 7 — 12 December 2011 8 of 24

NXP Semiconductors 74LV123

Dual retriggerable monostable multivibrator with reset

9. Static characteristics

Table 6. Static characteristics

At recommended operating conditions; voltages are referenced to GND (ground = 0 V).

Symbol Parameter Conditions Min Typ[1] Max Unit

Tamb = 40 C to +85 C

VIH HIGH-level input voltage VCC = 1.2 V 0.9 - - V

VCC = 2.0 V 1.4 - - V

VCC = 2.7 V to 3.6 V 2.0 - - V

VCC = 4.5 V to 5.5 V 0.7 VCC -- V

VIL LOW-level input voltage VCC = 1.2 V - - 0.3 V

VCC = 2.0 V - - 0.6 V

VCC = 2.7 V to 3.6 V - - 0.8 V

VCC = 4.5 V to 5.5 V - - 0.3 VCC V

VOH HIGH-level output voltage VI = VIH or VIL

lO = 100 A; VCC = 1.2 V - 1.2 - V

lO = 100 A; VCC = 2.0 V 1.8 2.0 - V

lO = 100 A; VCC = 2.7 V 2.5 2.7 - V

lO = 100 A; VCC = 3.0 V 2.8 3.0 - V

lO = 100 A; VCC = 4.5 V 4.3 4.5 - V

lO = 6 mA; VCC = 3.0 V 2.40 2.82 - V

lO = 12 mA; VCC = 4.5 V 3.60 4.20 - V

VOL LOW-level output voltage VI = VIH or VIL

IO = 100 A; VCC = 1.2 V - 0 - V

IO = 100 A; VCC = 2.0 V - 0 0.2 V

IO = 100 A; VCC = 2.7 V - 0 0.2 V

IO = 100 A; VCC = 3.0 V - 0 0.2 V

IO = 100 A; VCC = 4.5 V - 0 0.2 V

IO = 6 mA; VCC = 3.0 V - 0.25 0.40 V

IO = 12 mA; VCC = 4.5 V - 0.35 0.55 V

IIinput leakage current VI = VCC or GND; VCC = 5.5 V - - 1.0 A

ICC supply current VI = VCC or GND; IO = 0 A; VCC =5.5V - - 20.0 A

ICC additional supply current VI = V CC  0.6 V; VCC = 2.7 V to 3.6 V - - 500 A

CIinput capacitance - 3.5 - pF

Tamb = 40 C to +125 C

VIH HIGH-level input voltage VCC = 1.2 V 0.9 - - V

VCC = 2.0 V 1.4 - - V

VCC = 2.7 V to 3.6 V 2.0 - - V

VCC = 4.5 V to 5.5 V 0.7 VCC -- V

VIL LOW-level input voltage VCC = 1.2 V - - 0.3 V

VCC = 2.0 V - - 0.6 V

VCC = 2.7 V to 3.6 V - - 0.8 V

VCC = 4.5 V to 5.5 V - - 0.3 VCC V

Product data sheet Rev. 7 — 12 December 2011 9 of 24

NXP Semiconductors 74LV123

Dual retriggerable monostable multivibrator with reset

[1] All typical values are measured at Tamb = 25 C.

VOH HIGH-level output voltage VI = VIH or VIL

lO = 100 A; VCC = 1.2 V - - - V

lO = 100 A; VCC = 2.0 V 1.8 - - V

lO = 100 A; VCC = 2.7 V 2.5 - - V

lO = 100 A; VCC = 3.0 V 2.8 - - V

lO = 100 A; VCC = 4.5 V 4.3 - - V

lO = 6 mA; VCC = 3.0 V 2.2 - - V

lO = 12 mA; VCC = 4.5 V 3.5 - - V

VOL LOW-level output voltage VI = VIH or VIL

IO = 100 A; VCC = 1.2 V - - - V

IO = 100 A; VCC = 2.0 V - - 0.2 V

IO = 100 A; VCC = 2.7 V - - 0.2 V

IO = 100 A; VCC = 3.0 V - - 0.2 V

IO = 100 A; VCC = 4.5 V - - 0.2 V

IO = 6 mA; VCC = 3.0 V - - 0.5 V

IO = 12 mA; VCC = 4.5 V - - 0.65 V

IIinput leakage current VI = VCC or GND; VCC = 5.5 V - - 1.0 A

ICC supply current VI = VCC or GND; IO = 0 A; VCC =5.5V - - 160 A

ICC additional supply current VI = V CC 0.6 V; VCC = 2.7 V to 3.6 V - - 850 A

Table 6. Static characteristics …continued

At recommended operating conditions; voltages are referenced to GND (ground = 0 V).

Symbol Parameter Conditions Min Typ[1] Max Unit

Product data sheet Rev. 7 — 12 December 2011 10 of 24

NXP Semiconductors 74LV123

Dual retriggerable monostable multivibrator with reset

10. Dynamic characteristics

Table 7. Dynamic characteristics

GND = 0 V; tr = tf



2.5 ns; for test circuit see Figure 8.

Symbol Parameter Conditions 40 C to +85 C40 C to +125 CUnit

Min Typ[1] Max Min Max

Propagation delay; see Figure 7

tpd propagation delay nRD, nA and nB to nQ [2]

VCC = 1.2 V - 120 - - - ns

VCC = 2.0 V - 40 76 - 92 ns

VCC = 2.7 V - 30 56 - 68 ns

VCC = 3.0 V to 3.6 V - 25 48 - 57 ns

VCC = 4.5 V to 5.5 V - 18 40 - 46 ns

nRD to nQ (reset) [2]

VCC = 1.2 V - 100 - - - ns

VCC = 2.0 V - 30 57 - 68 ns

VCC = 2.7 V - 23 43 - 51 ns

VCC = 3.0 V to 3.6 V - 20 38 - 45 ns

VCC = 4.5 V to 5.5 V - 14 31 - 36 ns

Inputs nA, nB and nRD; see Figure 7

tWpulse width nA = LOW

VCC = 2.0 V 30 5 - 40 - ns

VCC = 2.7 V 25 3.5 - 30 - ns

VCC = 3.0 V to 3.6 V 20 3.0 - 25 - n s

VCC = 4.5 V to 5.5 V 15 2.5 - 20 - n s

nB = HIGH

VCC = 2.0 V 30 13 - 40 - ns

VCC = 2.7 V 25 8 - 30 - ns

VCC = 3.0 V to 3.6 V 20 7 - 25 - n s

VCC = 4.5 V to 5.5 V 15 5 - 20 - n s

nRD = LOW; see Figure 13

VCC = 2.0 V 35 6 - 45 - ns

VCC = 2.7 V 30 5 - 40 - ns

VCC = 3.0 V to 3.6 V 25 4 - 30 - n s

VCC = 4.5 V to 5.5 V 20 3 - 25 - n s

trtrig retrigger time nB to nA; see Figure 12

VCC = 2.0 V - 70 - - - ns

VCC = 2.7 V - 55 - - - ns

VCC = 3.0 V to 3.6 V - 45 - - - n s

VCC = 4.5 V to 5.5 V - 40 - - - n s

Product data sheet Rev. 7 — 12 December 2011 11 of 24

NXP Semiconductors 74LV123

Dual retriggerable monostable multivibrator with reset

[1] All typical values are measured at Tamb = 25 C and nominal supply values (VCC = 3.3 V and 5.0 V).

[2] tpd is the same as tPLH and tPHL; CEXT = 0 pF; REXT =5 k.

[3] For other REXT and CEXT combinations see Figure 11 and Section 12.1.1 “Basic timing”.

[4] CEXT has no limits.

[5] CPD is used to determine the dynamic power dissipation (PD in W).

PD=C

PD VCC2fiN+(CLVCC2fo) where:

fi= input frequency in MHz;

fo= output frequency in MHz;

CL= output load capacitance in pF;

VCC = supply voltage in V;

N = number of inputs switching;

(CLVCC2fo) = sum of the outputs.

Outputs; nQ = LOW and nQ = HIGH, see Figure 7

tWpulse width CEXT = 100 nF; REXT = 10 k

VCC = 2.0 V -470- - -ns

VCC = 2.7 V - 460 - - - ns

VCC = 3.0 V to 3.6 V - 450 - - - ns

VCC = 4.5 V to 5.5 V - 430 - - - ns

CEXT = 0 pF; REXT = 5 k

VCC = 2.0 V - 100 - - - ns

VCC = 2.7 V - 90 - - - ns

VCC = 3.0 V to 3.6 V - 80 - - - n s

VCC = 4.5 V to 5.5 V - 70 - - - n s

External component s

REXT external

resistance see Figure 11 [3]

VCC = 1.2 V 10 - 1000 - - k

VCC = 2.0 V 5 - 1000 - - k

VCC = 2.7 V 3 - 1000 - - k

VCC = 3.0 V to 3.6 V 2 - 1000 - - k

VCC = 4.5 V to 5.5 V 2 - 1000 - - k

CEXT external

capacitance see Figure 11 [3][4]

VCC = 1.2V --- - -pF

VCC = 2.0V --- - -pF

VCC = 2.7V --- - -pF

VCC = 3.0 V to 3.6 V - - - - - pF

VCC = 4.5 V to 5.5 V - - - - - pF

Dynamic power dissipation

CPD power dissipation

capacitance VCC = 3.3 V; VI = GND to VCC [5] -60- - -pF

Table 7. Dynamic characteristics …continued

GND = 0 V; tr = tf



2.5 ns; for test circuit see Figure 8.

Symbol Parameter Conditions 40 C to +85 C40 C to +125 CUnit

Min Typ[1] Max Min Max

Product data sheet Rev. 7 — 12 December 2011 12 of 24

NXP Semiconductors 74LV123

Dual retriggerable monostable multivibrator with reset

11. Waveforms

Measurement points are given in Table 8.

Fig 7. Propagation delays from inputs (nA, nB, nRD) to outputs (nQ, nQ)

001aae528

nB input

(nA LOW)

tPLH

tPHL

tPLH

nA input

(nB HIGH)

nRD input

nQ output

tPHL

tPHL tPLH

RESET

Table 8. Measurement points

VCC VM

2.7 V 1.5 V

< 2.7 V 0.5 VCC

Test data is given in Table 9.

Definitions for test circuit:

RL = Load resistance.

CL = Load capacitance including jig and probe capacitance.

RT = Termination resistance should be equal to Zo of the pulse generator.

Fig 8. Load circuitry for switching times

001aae533

VCC

VIVO

DUT

50 pF

RTRL

1 kΩ

PULSE

GENERATOR

Product data sheet Rev. 7 — 12 December 2011 13 of 24

NXP Semiconductors 74LV123

Dual retriggerable monostable multivibrator with reset

12. Application information

12.1 Timing components

12.1.1 Basic timing

The basic output pulse wid th is essentially determined by the values of the external timing

components REXT and CEXT.

If CEXT > 10 nF, the following formula is valid: tW = K  REXT  CEXT (typ.) where:

tW = output pulse width in ns

REXT = external resistor in k

CEXT = external capacitor in pF

K = constant: this is 0.45 for VCC = 5.0 V and 0.48 for VCC = 2.0 V (see Figure 10)

The inherent test jig and pin capacitance at pin 15 and pin 7 (nREXT/CEXT) is

approximately 7 pF.

Table 9. Test data

Supply voltage Input Load Test

VCC VItr, tfCLRL

< 2.7 V VCC  2.5 ns 50 pF 1 ktPHL, tPLH

2.7 V to 3.6 V 2.7 V  2.5 ns 50 pF 1 k tPHL, t PLH

 4.5 V VCC  2.5 ns 50 pF 1 ktPHL, tPLH

(1) For minimum noise generation it is recommended to ground pins 6 (2CEXT) and 14 (1CEXT)

externally to pin 8 (GND).

Fig 9. Timing components connections

001aae525

CEXT REXT

VCC

nCEXT

nRD

nREXT/CEXT

GND

74LV123

13 (5)

4 (12)

15 (7)14 (6)

3 (11)

1 (9)

2 (10)

(1)

Product data sheet Rev. 7 — 12 December 2011 14 of 24

NXP Semiconductors 74LV123

Dual retriggerable monostable multivibrator with reset

12.1.2 Retrigger timing

The time to retrigger the monostable multivibrator depends on the values of REXT and

CEXT. The output pulse width will only be extended when the time between the active

going edges of the trigger pulses meets the minimum retrigger time. If CEXT > 10 pF, the

next formula for the set-up time of a retrigger pulse is valid:

at VCC = 5.0 V: trtrig = 30 + 0.19REXT  CEXT0.9 + 13  REXT1.05 (typ.)

at VCC = 3.0 V: trtrig = 41 + 0.15REXT  CEXT0.9  1  REXT (typ.)

where:

trtrig = retrigger time in ns

CEXT = external capacitor in pF

REXT = external resistor in k

CEXT =10nF; R

EXT = 10 k to 100 k VCC = 3.3 V and Tamb = 25 C

Fig 10. Typical ‘K’ factor as a function of VCC Fig 11. Typical output pulse width as a function of the

external capacitance values

001aae529

VCC (V)

0642

0.4

0.2

0.6

0.8

'K'

factor

001aae530

103

102

105

104

106

(ns)

Cext (pF)

110

103

10 102

REXT = 100 kΩ

50 kΩ

10 kΩ

2 kΩ

nRD = HIGH

Fig 12. Output pu lse control using retrigg e r pu ls e nA

001aae526

nB input

nQ output

nA input

rtrig

Product data sheet Rev. 7 — 12 December 2011 15 of 24

NXP Semiconductors 74LV123

Dual retriggerable monostable multivibrator with reset

12.1.3 Reset timing

12.2 Power considerations

12.2.1 Power-up

When the monostable multivibrator is powered-up, it may produce an output pulse with a

pulse width defined by the values of REXT and CEXT. This output pulse can be eliminated

using the RC circuit on pin nRD shown in Figure 14.

12.2.2 Power-down

A large capacitor (CEXT) may cause problems when powering-down the monostable due

to the energy stored in this capacitor. When a system containing this device is

powered-down or a rapid decrease of VCC to zero occurs, the monostable may sustain

damage, due to the capacitor discharging through the input protection diodes. To avoid

this possibility, connect a damping diode DEXT (preferably a germaniu m or Schottky type

diode) able to withstand large current surges - see Figure 14.

nA = LOW

Fig 13. Output pulse control using reset input nRD

001aae527

nB input

nQ output

nRD input

Fig 14. Power-up and po we r-do wn circuit

001aae532

VCC

RESET nRD

CEXT REXT

DEXT

VCC

nCEXTGND nREXT/CEXT

74LV123 13 (5)

4 (12)

15 (7)14 (6)8

1 (9)

2 (10)

3 (11)

Product data sheet Rev. 7 — 12 December 2011 16 of 24

NXP Semiconductors 74LV123

Dual retriggerable monostable multivibrator with reset

13. Package outline

Fig 15. Package outline SOT38-4 (DIP16)

REFERENCES

OUTLINE

VERSION EUROPEAN

PROJECTION ISSUE DATE

IEC JEDEC JEITA

SOT38-4 95-01-14

03-02-13

(e )

seating plane

pin 1 index

0 5 10 mm

scale

Note

1. Plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included.

UNIT A

max. 12 b1(1) (1) (1)

b2cD E e M Z

DIMENSIONS (inch dimensions are derived from the original mm dimensions)

min. A

max. bmax.

1.73

1.30 0.53

0.38 0.36

0.23 19.50

18.55 6.48

6.20 3.60

3.05 0.2542.54 7.62 8.25

7.80 10.0

8.3 0.764.2 0.51 3.2

inches 0.068

0.051 0.021

0.015 0.014

0.009

1.25

0.85

0.049

0.033 0.77

0.73 0.26

0.24 0.14

0.12 0.010.1 0.3 0.32

0.31 0.39

0.33 0.030.17 0.02 0.13

DIP16: plastic dual in-line package; 16 leads (300 mil) SOT38-4

Product data sheet Rev. 7 — 12 December 2011 17 of 24

NXP Semiconductors 74LV123

Dual retriggerable monostable multivibrator with reset

Fig 16. Pa ckage outline SOT109-1 (SO16)

detail X

vMA

(A )

pin 1 index

UNIT A

max. A1A2A3bpcD

(1) E(1) (1)

ELL

pQZywv θ

REFERENCES

OUTLINE

VERSION EUROPEAN

PROJECTION ISSUE DATE

IEC JEDEC JEITA

inches

1.75 0.25

0.10 1.45

1.25 0.25 0.49

0.36 0.25

0.19 10.0

9.8 4.0

3.8 1.27 6.2

5.8 0.7

0.6 0.7

0.3 8

0.25 0.1

DIMENSIONS (inch dimensions are derived from the original mm dimensions)

Note

1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.

1.0

0.4

SOT109-1 99-12-27

03-02-19

076E07 MS-012

0.069 0.010

0.004 0.057

0.049 0.01 0.019

0.014 0.0100

0.0075 0.39

0.38 0.16

0.15 0.05

1.05

0.041

0.244

0.228 0.028

0.020 0.028

0.012

0.01

0.25

0.01 0.004

0.039

0.016

0 2.5 5 mm

scale

SO16: plastic small outline package; 16 leads; body width 3.9 mm SOT109-1

Product data sheet Rev. 7 — 12 December 2011 18 of 24

NXP Semiconductors 74LV123

Dual retriggerable monostable multivibrator with reset

Fig 17. Pa ckage outline SOT338-1 (SSOP16)

UNIT A1A2A3bpcD

(1) E(1) eH

ELL

pQZywv θ

REFERENCES

OUTLINE

VERSION EUROPEAN

PROJECTION ISSUE DATE

IEC JEDEC JEITA

mm 0.21

0.05 1.80

1.65 0.25 0.38

0.25 0.20

0.09 6.4

6.0 5.4

5.2 0.65 1.25

7.9

7.6 1.03

0.63 0.9

0.7 1.00

0.55 8

0.130.2 0.1

DIMENSIONS (mm are the original dimensions)

Note

1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.

SOT338-1 99-12-27

03-02-19

(1)

vMA

16 9

detail X

(A )

MO-150

pin 1 index

0 2.5 5 mm

scale

SSOP16: plastic shrink small outline package; 16 leads; body width 5.3 mm SOT338-1

max.

Product data sheet Rev. 7 — 12 December 2011 19 of 24

NXP Semiconductors 74LV123

Dual retriggerable monostable multivibrator with reset

Fig 18. Package outline SOT403-1 (TSSOP16)

UNIT A1A2A3bpcD

(1) E(2) (1)

ELL

pQZywv θ

REFERENCES

OUTLINE

VERSION EUROPEAN

PROJECTION ISSUE DATE

IEC JEDEC JEITA

mm 0.15

0.05 0.95

0.80 0.30

0.19 0.2

0.1 5.1

4.9 4.5

4.3 0.65 6.6

6.2 0.4

0.3 0.40

0.06 8

0.13 0.10.21

DIMENSIONS (mm are the original dimensions)

Notes

1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.

2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.

0.75

0.50

SOT403-1 MO-153 99-12-27

03-02-18

0.25

16 9

detail X

(A )

vMA

0 2.5 5 mm

scale

TSSOP16: plastic thin shrink small outline package; 16 leads; body width 4.4 mm SOT403-1

max.

1.1

pin 1 index

Product data sheet Rev. 7 — 12 December 2011 20 of 24

NXP Semiconductors 74LV123

Dual retriggerable monostable multivibrator with reset

Fig 19. Pa ckage outline SOT736-1 (DHVQFN16)

terminal 1

index area

0.51

A1Eh

UNIT ye

0.2

REFERENCES

OUTLINE

VERSION EUROPEAN

PROJECTION ISSUE DATE

IEC JEDEC JEITA

mm 3.6

3.4

2.15

1.85

2.6

2.4 1.15

0.85

2.5

0.30

0.18

0.05

0.00 0.05 0.1

DIMENSIONS (mm are the original dimensions)

SOT763-1 MO-241 - - -- - -

0.5

0.3

0.1

0.05

0 2.5 5 mm

scale

SOT763-1

DHVQFN16: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads;

16 terminals; body 2.5 x 3.5 x 0.85 mm

A(1)

max.

AA1c

detail X

y1C

15 10

terminal 1

index area

E(1)

Note

1. Plastic or metal protrusions of 0.075 mm maximum per side are not included.

D(1)

02-10-17

03-01-27

Product data sheet Rev. 7 — 12 December 2011 21 of 24

NXP Semiconductors 74LV123

Dual retriggerable monostable multivibrator with reset

14. Revision history

Table 10. Revision history

Document ID Release date Data sheet status Change notice Supersedes

74LV12 3 v.7 20111212 Product data sheet - 74LV12 3 v.6

Modifications: •Legal pages updated.

74LV12 3 v.6 2011082 6 Product data sheet - 74LV123 v.5

74LV12 3 v.5 20071108 Product data sheet - 74LV123 v.4

74LV12 3 v.4 20070919 Product specification - 74LV123 v.3

74LV12 3 v.3 20030313 Product specification - 74LV123 v.2

74LV12 3 v.2 19980420 Product specification - 74LV123 v.1

74LV123 v.1 19970204 Product specification - -

Product data sheet Rev. 7 — 12 December 2011 22 of 24

NXP Semiconductors 74LV123

Dual retriggerable monostable multivibrator with reset

15. Legal information

15.1 Data sheet status

[1] Please consult the most recently issued document before initiating or completing a design.

[2] The term ‘short data sheet’ is explained in section “Definitions”.

[3] The product status of de vice(s) descr ibed in th is docume nt may have cha nged since this docume nt was publis hed and ma y dif fer in case of multiple devices. The latest product status

information is available on the Internet at URL http://www.nxp.com.

15.2 Definitions

Draft — The document is a draft version only. The content is still under

internal review and subject to formal approval, which may result in

modifications or additions. NXP Semiconductors does not give any

representations or warranties as to the accuracy or completeness of

information included herein and shall have no liab ility for the consequences of

use of such information.

Short data sheet — A short data sheet is an extract from a full data sheet

with the same product type number(s) and tit le. A short data sh eet is intended

for quick reference only and shou ld not be rel ied u pon to cont ain det ailed and

full information. For detailed and full information see the relevant full data

sheet, which is available on request via the local NXP Semiconductors sales

office. In case of any inconsistency or conf lict with the short data sheet, the

full data sheet shall pre vail.

Product specificatio n — The information and data provided in a Product

data sheet shall define the specification of the product as agreed between

NXP Semiconductors and its customer, unless NXP Semiconductors and

customer have explicitly agreed otherwise in writing. In no event however,

shall an agreement be valid in which the NXP Semiconductors product is

deemed to off er functions and qualities beyon d those described in the

Product data sheet.

15.3 Disclaimers

Limited warr a nty and liability — Information in this document is believed to

be accurate and reliable. However, NXP Semiconductors does not give any

representations or warranties, expressed or implied, as to the accuracy or

completeness of such information and shall have no liability for the

consequences of use of such information.

In no event shall NXP Semiconductors be liable for any indirect , incidental,

punitive, special or consequ ential damages (including - wit hout limitatio n - lost

profits, lost savings, business interruption, costs related to the removal or

replacement of any products or rework charges) whether or not such

damages are based on tort (including negligence), warranty, breach of

contract or any other legal theory.

Notwithstanding any damages that customer might incur for any reason

whatsoever, NXP Semiconduct ors’ aggregate and cumulati ve liability toward s

customer for the products described herein shall be limited in accordance

with the Terms and conditions of commercial sale of NXP Semiconductors.

Right to make changes — NXP Semiconductors reserves the right to make

changes to information published in this document, including without

limitation specifications and product descriptions, at any time and without

notice. This document supersedes and replaces all informa tion supplied prior

to the publication hereof .

Suitability for use — NXP Semiconductors products are not designed,

authorized or warranted to be suit able for use in life support, life-crit ical or

safety-critical systems or equipment, nor in applications where failure or

malfunction of an NXP Semiconductors pro duct can reasonably be expected

to result in perso nal injury, death or severe property or environmental

damage. NXP Semiconductors accepts no liab ility for inclusion and/or use of

NXP Semiconductors products in such equipment or applications and

therefore such inclusion and/or use is at the customer’s own risk.

Applications — Applications that are described herein for any of these

products are for illustrative purposes only. NXP Semiconductors makes no

representation or warranty tha t such application s will be suitable for the

specified use without further testing or modification.

Customers are responsible for the design and ope ration of their applications

and products using NXP Semiconductors product s, and NXP Semiconductors

accepts no liability for any assistance with applications or customer product

design. It is customer’s sole responsibility to determine whether the NXP

Semiconductors product is suit able and fit for the custome r’s applications and

products planned, as well as fo r the planned application and use of

customer’s third party customer(s). Customers should provide appropriate

design and operating safeguards to minimize the risks associated with their

applications and products.

NXP Semiconductors does not accept any liabili ty related to any default,

damage, costs or problem which is based on any weakness or default in the

customer’s applications or products, or the application or use by customer’s

third party customer(s). Customer is responsible for doing all necessa ry

testing for th e customer’s applications and pro ducts using NXP

Semiconductors products in order to avoid a default of the applications and

the products or of the application or use by customer’s third party

customer(s). NXP does not accept any liability in this respect.

Limiting values — Stress above one or more limiting values (as defined in

the Absolute Maximum Ratings System of IEC 60134) will cause permanent

damage to the device. Limiting values are stress ratings only and (proper)

operation of the device at these or any other conditions above those given in

the Recommended operating conditions section (if present) or the

Characteristics sections of this document is not warranted. Constant or

repeated exposure to limiting values will permanent ly and irreversibly affect

the quality and reliability of the device.

Terms and conditions of commercial sale — NXP Semiconductors

products are sold subject to the general terms and conditions of commercial

sale, as published at http://www.nxp.com/profile/terms, unless otherwise

agreed in a valid written individua l agreement. In case an individual

agreement is concluded only the ter ms and conditions of the respective

agreement shall apply. NXP Semiconductors hereby expressly objects to

applying the customer’s general terms and conditions with regard to the

purchase of NXP Semiconductors products by customer.

No offer to sell or license — Nothing i n this document may be interpreted or

construed as an of fer t o sell product s that is open for accept ance or t he grant,

conveyance or implication of any license under any copyrights, patents or

other industrial or intellectual property rights.

Export control — This document as well as the item(s) described herein

may be subject to export control regulatio ns. Export might require a prior

authorization from competent authorities.

Document status[1][2] Product status[3] Definition

Objective [short] data sheet Development This document contains data from the objective specification for product development.

Preliminary [short] dat a sheet Qualification This document contains data from the preliminary specification.

Product [short] dat a sheet Production This document contains the product specification.

Product data sheet Rev. 7 — 12 December 2011 23 of 24

NXP Semiconductors 74LV123

Dual retriggerable monostable multivibrator with reset

Non-automotive qualified products — Unless this data sheet expressly

states that this specific NXP Semiconductors product is automotive qualified,

the product is not suitable for automotive use. It i s neit her qua lified nor tested

in accordance with automotive testing or application requirements. NXP

Semiconductors accepts no liability for inclusion and/or use of

non-automotive qualified products in automotive equipment or applications.

In the event that customer uses the product for design-in and use in

automotive applications to automot ive specifications and standard s, customer

(a) shall use the product without NXP Semiconductors’ warranty of the

product for such automotive applications, use and specifications, and (b)

whenever customer uses the product for automotive applications beyond

NXP Semiconductors’ specifications such use shall be solely at customer’s

own risk, and (c) customer fully indemnifies NXP Semiconductors for any

liability, damages or failed product claims resulting from custome r design and

use of the product for automotive applications beyond NXP Semiconductors’

standard warranty and NXP Semiconductors’ product specif ications.

15.4 Trademarks

Notice: All referenced b rands, produc t names, service names and trademarks

are the property of their respect i ve ow ners.

16. Contact information

For more information, please visit: http://www.nxp.com

For sales office addresses, please send an email to: salesaddresses@nxp.com

NXP Semiconductors 74LV123

Dual retriggerable monostable multivibrator with reset

For more information, please visit: http://www.nxp.co m

For sales office addresses, please send an email to: salesaddresses@nxp.com

Date of release: 12 December 2011

Document identifier: 74LV123

Please be aware that important notices concerning this document and the product(s)

described herein, have been included in section ‘Legal information’.

17. Contents

1 General description. . . . . . . . . . . . . . . . . . . . . . 1

2 Features and benefits . . . . . . . . . . . . . . . . . . . . 1

3 Ordering information. . . . . . . . . . . . . . . . . . . . . 2

4 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2

5 Pinning information. . . . . . . . . . . . . . . . . . . . . . 5

5.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

5.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 5

6 Functional description . . . . . . . . . . . . . . . . . . . 6

7 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 7

8 Recommended operating conditions. . . . . . . . 7

9 Static characteristics. . . . . . . . . . . . . . . . . . . . . 8

10 Dynamic characteristics . . . . . . . . . . . . . . . . . 10

11 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

12 Application information . . . . . . . . . . . . . . . . . . 13

12.1 Timing components . . . . . . . . . . . . . . . . . . . . 13

12.1.1 Basic timing . . . . . . . . . . . . . . . . . . . . . . . . . . 13

12.1.2 Retrigger timing . . . . . . . . . . . . . . . . . . . . . . . 14

12.1.3 Reset timing . . . . . . . . . . . . . . . . . . . . . . . . . . 15

12.2 Power considerations . . . . . . . . . . . . . . . . . . . 15

12.2.1 Power-up . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

12.2.2 Power-down . . . . . . . . . . . . . . . . . . . . . . . . . . 15

13 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 16

14 Revision history. . . . . . . . . . . . . . . . . . . . . . . . 21

15 Legal information. . . . . . . . . . . . . . . . . . . . . . . 22

15.1 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 22

15.2 Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

15.3 Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 22

15.4 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 23

16 Contact information. . . . . . . . . . . . . . . . . . . . . 23

17 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24