©2001 Fairch ild Semicond uctor C orpo ration HGTP12N60C3D, HGT1S12N60C3DS Rev. B
HGTP12N60C3D, HGT1S12N60C3DS
24A, 600V, UFS Series N-Channel IGBT
with Anti-Parallel Hyperfast Diodes
This family of MOS gated high voltage switching devices
combine the best features of MOSFETs and bipolar
transistors. The device has the high input impedance of a
MOSFET and the lo w on-s tat e cond uc tio n loss of a bipola r
tra nsi stor. The much lower on-state voltage drop varies only
moder ately bet ween 2 5oC and 150oC. The IGBT used is the
developm ent type TA49123. The di ode used in anti-parallel
with the IGBT is the development type TA49188.
The IGBT is ideal for ma n y high voltage switching
applic ations operating at moderate frequencies wher e lo w
conduction losses are ess ential.
Formerly Developmental Type TA49182.
Symbol
Features
• 24A, 600V at TC = 25oC
• Typical Fall Time at T J = 150oC . . . . . . . . . . . . . . . . 210ns
• Shor t Circuit Rating
• Low Condu c tion Loss
• Hyperfast Anti-Parallel Diode
Packaging JEDEC TO-220AB
JEDEC TO-263AB
Ordering Information
PART NUMBER PACKAGE BRAND
HGTP12N60C3D TO-220AB 12N60C3D
HGT1S12N60C3DS TO-263AB 12N60C3D
NO TE: When ordering, use the entire part number . Add the suffix 9A
to obtain the TO-263 variant in Tape and Reel, i.e.,
HGT1S12N60C3DS9A.
C
E
G
ECG
COLLECTOR
(FLANGE)
G
E
COLLECTOR
(FLANGE)
FAIRCHILD CORPORATION IGBT PRODUCT IS COVERED BY ONE OR MORE OF THE FOLLOWING U.S. PATENTS
4,364,073 4,417,385 4,430,792 4,443,931 4,466,176 4,516,143 4,532,534 4,587,713
4,598,461 4,605,948 4,620,211 4,631,564 4,639,754 4,639,762 4,641,162 4,644,637
4,682,195 4,684,413 4,694,313 4,717,679 4,743,952 4,783,690 4,794,432 4,801,986
4,803,533 4,809,045 4,809,047 4,810,665 4,823,176 4,837,606 4,860,080 4,883,767
4,888,627 4,890,143 4,901,127 4,904,609 4,933,740 4,963,951 4,969,027
Data Sheet December 2001
©2001 Fairch ild Semicond uctor C orpo ration HGTP12N60C3D, HGT1S12N60C3DS Rev. B
Absolute Maximum Ratings TC = 25oC, Unless Otherwise Specified ALL TYPES UNITS
Collector to Emitter Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . BVCES 600 V
Collector Current Continuous
At TC = 25oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IC25 24 A
At TC = 110oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IC110 12 A
Average Diode Forward Current at 110oC. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .I(AVG) 12 A
Collector Current Pulsed (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ICM 96 A
Gate to Emitter Voltage Continuous. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VGES ±20 V
Gate to Emitte r Voltage Pulsed . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VGEM ±30 V
Switching Safe Operating Area at TJ = 150oC (Figure 14) . . . . . . . . . . . . . . . . . . . . . . SSOA 24A at 600V
Power Dissipation Total at TC = 25oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PD104 W
Power Dissipation Derating TC > 25oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.83 W/oC
Operating and Storage Junction Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . TJ, TSTG -40 to 150 oC
Maximum Lead Temperature for Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TL260 oC
Short Circuit Withst and T i me (Not e 2) at V GE = 15V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .tSC 4µs
Short Circuit Withst and T i me (Not e 2) at V GE = 10V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .tSC 13 µs
CAUTION: St resses above those l isted in “A bsolute Maximu m Rating s” may cause per manent d amage to t he device. This is a str ess on ly rating and operation o f the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
1. Repetitive Rating: Pulse width limited by maximum junction temperature.
2. VCE(PK) = 360V, TJ = 125oC, RG = 25Ω.
Electrical Specifications TC = 25oC, Unless Otherwise Specified
PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
Collector to Emitter Breakdown Voltag e BVCES IC = 250µA, VGE = 0V 600 - - V
Collector to Emitter Leakage Current ICES VCE = BVCES TC = 25oC - - 250 µA
TC = 150oC--2.0mA
Collector to Emitter Saturation Voltage VCE(SAT) IC = IC110, VGE = 15V TC = 25oC - 1.65 2.0 V
TC = 150oC - 1.85 2.2 V
IC = 15A, VGE = 15V TC = 25oC - 1.80 2.2 V
TC = 150oC-2.02.4V
Gate to Emitter Threshold V oltage VGE(TH) IC = 250µA, VCE = VGE 3.0 5.0 6.0 V
Gate to Emitter Leakage Current IGES VGE = ±20V - - ±100 nA
Switching SOA SSOA TJ = 150oC,
VGE = 15V,
RG = 25Ω,
L = 100µH
VCE(PK) = 480V 80 - - A
VCE(PK) = 600V 24 - - A
Gate to Emitter Plateau Voltage VGEP IC = IC110, VCE = 0.5 BVCES -7.6- V
On-State Gate Charge Qg(ON) IC = IC110,
VCE = 0.5 BVCES VGE = 15V - 48 55 nC
VGE = 20V - 62 71 nC
Current Turn-On Delay Time td(ON)I TJ = 150oC,
ICE = IC110,
VCE(PK) = 0.8 BVCES,
VGE = 15V,
RG = 25Ω,
L = 100µH
-28-ns
Current Rise Time tri -20-ns
Current Turn-Off Delay Time td(OFF)I - 270 400 ns
Current Fall Time tfi - 210 275 ns
Turn-On Energy EON - 380 - µJ
Turn-Off Energy (Note 3 ) EOFF - 900 - µJ
Diode Forward Voltage VEC IEC = 12A - 1.7 2.1 V
HGTP12N60C3D, HGT1S12N60C3DS
©2001 Fairch ild Semicond uctor C orpo ration HGTP12N60C3D, HGT1S12N60C3DS Rev. B
Diode Reverse Recovery T ime trr IEC = 12A, dIEC/dt = 200A/µs - 32 40 ns
IEC = 1.0A, dIEC/dt = 200A/µs - 23 30 ns
Thermal Resistance RθJC IGBT - - 1.2 oC/W
Diode - - 1.9 oC/W
NOTE:
3. Turn-Off Energy Loss (EOFF) is defined as the integral of the instantaneous power loss starting at the trailing edge of the input pulse, and ending
at the point where the collector current equals zero (ICE = 0A). This family of devices was tested per JEDEC Standard No. 24-1 Method for
Measurement of Power Device Turn-Off Switching Loss. This test method produces the true total T urn-Off Energy Loss. Turn-On losses include
losses due to diode recovery.
Electrical Specifications TC = 25oC, Unless Otherwise Specified (Continued)
PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
Typical Performance Curves
FIGURE 1. TRANSFER CHARACTERISTICS FIGURE 2. SATURATION CHARACTERISTICS
FIGURE 3. COLLECTOR TO EMITTER ON-STATE VOLTAGE FIGURE 4. COLLECTOR TO EMITTER ON-STATE VOLTAGE
ICE, COLLECTO R TO EMITTER CURRENT (A)
VGE, GATE TO EMITTER VOLTAGE (V)
6 8 10 12
0
10
20
40
50
60
70
14
30
80
PULSE DURATION = 250µs
DUTY CYCLE <0.5%, VCE = 10V
4
TC = 150oC
TC = 25oC
TC = -40oC
ICE, COLLECTOR TO EMITTER CURRENT (A)
VCE, COLLECTOR TO EMITTER VOLTAGE (V)
PULSE DURATION = 250µs, DUTY CYCLE <0.5%, TC = 25oC
00246810
10
20
30
12.0V
8.5V
9.0V
8.0V
7.5V
7.0V
VGE = 15.0V
40
50
60
70
80
10.0V
ICE, COLLECTOR TO EMITTER CURRENT (A)
0
30
012345
40
VCE, COLLECTOR TO EMITTER VOLTAGE (V)
PULSE DURATION = 250µs
DUTY CYCLE <0.5%, VGE = 10V
TC = 150oC
TC = 25oC
TC = -40oC
10
20
50
70
80
60
ICE, COLLECTOR TO EMITTER CURRENT (A)
0
30
012345
VCE, COL LECTOR TO EMITTER VOLTAGE (V)
TC = 25oC
TC = -40oC
TC = 150oC
DUTY CYCLE <0.5%, VGE = 15V
PULSE DURATION = 250µs
10
20
40
50
60
70
80
HGTP12N60C3D, HGT1S12N60C3DS
©2001 Fairch ild Semicond uctor C orpo ration HGTP12N60C3D, HGT1S12N60C3DS Rev. B
FIGURE 5. MAXIMUM DC COLLECTOR CURRENT vs CASE
TEMPERATURE FIGURE 6. SHORT CIRCUIT WITHSTAND TIME
FIGURE 7. TURN ON DELAY TIME vs COLLECTOR TO
EMITTER CURRENT FIGURE 8. TURN OFF DELAY TIME vs COLLECT OR TO
EMITTER CURRENT
FIGURE 9. TURN ON RISE TIME vs COLLECTOR TO
EMITTER CURRENT FIGURE 10. TURN OFF FALL TIME vs COLLECTOR TO
EMITTER CURRENT
Typical Performance Curves (Continued)
25 50 75 100 125 150
0
5
10
15
20
25
ICE, DC COLLECTOR CURRENT (A)
TC, CASE TEMPERATURE (oC)
VGE = 15V
ISC, PEAK SHORT CIRCUIT CURRENT (A)
20
60
80
120
tSC, SHORT CIRCUIT WITHSTAND TIME (µs)
10 11 12
VGE, GATE TO EMITTER VOLTAGE (V)
14 1513
140
100
40
ISC
5
10
15
20 VCE = 360V, RG = 25Ω, TJ = 125oC
tSC
td(ON)I, TURN ON DELAY TIME (ns)
10
20
30
5101520
ICE, COLLECTOR TO EMITTER CURRENT (A)
100
25 30
50
VGE = 10V
VGE = 15V
TJ = 150oC, RG = 25Ω, L = 100µH, VCE(PK) = 480V
ICE, COLLECTOR TO EMITTER CURRENT (A)
td(OFF)I, TURN OFF DELAY TIME (ns)
400
300
200
1005 1015202530
TJ = 150oC, RG = 25Ω, L = 100µH, VCE(PK) = 480V
VGE = 10V
VGE = 15V
ICE, COLLECTOR TO EMITTER CURRENT (A)
tri, TURN ON RISE TIME (ns)
5
10
100
5 1015202530
VGE = 15V
VGE = 10V
200 TJ = 150oC, RG = 25Ω, L = 100µH, VCE(PK) = 480V
ICE, COLLECTOR TO EMITTER CURRENT (A)
tfi, FALL TIME (ns)
100
5 1015202530
200
300 TJ = 150oC, RG = 25Ω, L = 100µH, VCE(PK) = 480V
VGE = 10V OR 15V
90
80
HGTP12N60C3D, HGT1S12N60C3DS
©2001 Fairch ild Semicond uctor C orpo ration HGTP12N60C3D, HGT1S12N60C3DS Rev. B
FIGURE 11. TURN ON ENERGY LOSS vs COLLECTOR TO
EMITTER CURRENT FIGURE 12. TURN OFF ENERGY LOSS vs COLLECTOR TO
EMITTER CURRENT
FIGURE 13. OPERATING FREQUENCY vs COLLECTOR TO
EMITTER CURRENT FIGURE 14. SWITCHING SAFE OPERATING AREA
FIGURE 15. CAPACITANCE vs COLLECTOR TO EMITTER
VOLTAGE FIGURE 16. GATE CHARGE WAVEFORMS
Typical Performance Curves (Continued)
ICE, COLLECTOR TO EMITTER CURRENT (A)
05101520
EON, TURN ON ENERGY LOSS (mJ)
VGE = 15V
0.5
1.0
1.5
2.0
25 30
VGE = 10V
TJ = 150oC, RG = 25Ω, L = 100µH, VCE(PK) = 480V
ICE, COLLECTOR TO EMITTER CURRENT (A)
EOFF, TURN OFF ENERGY LOSS (mJ)
5 1015202530
0.5
1.0
1.5
2.0
2.5
3.0
0
TJ = 150oC, RG = 25Ω, L = 100µH, VCE(PK) = 480V
VGE = 10V or 15V
ICE, COLLECTOR TO EMITTER CURRENT (A)
fMAX, OPERATING FREQUENCY (kHz)
5102030
10
100
200
1
fMAX2 = (PD - PC)/(EON + EOFF)
PD = ALLOWABLE DISSIPATION
PC = CONDUCTION DISSIPATION
fMAX1 = 0.05/(tD(OFF)I + tD(ON)I)
(DUTY FACTOR = 50%)
RθJC = 1.2oC/W
TJ = 150oC, TC = 75oC
RG = 25Ω, L = 100µH
VGE = 15V
VGE = 10V
VCE(PK), COLLECTOR TO EMITTER VOLTAGE (V)
ICE, COLLECTOR TO EMITTER CURRENT (A)
0 100 200 300 400 500 600
0
20
40
60
80
100 TJ = 150oC, VGE = 15V, RG = 25Ω, L = 100µH
LIMITED BY
CIRCUIT
COES
CRES
VCE, COLLECTOR TO EMITTER VOLTAGE (V)
0 5 10 15 20 25
0
500
1000
1500
2000
2500
C, CAPACITANCE (pF)
FREQUENCY = 1MHz
CIES
VGE, GATE TO EMITTER VOLTAGE (V)
Qg, GATE CHARGE (nC)
15
12
9
6
3
010 20 30 40 50 600
VCE = 200V VCE = 400V
VCE = 600V
IG REF = 1.276mA, R
L = 50Ω, TC = 25oC
HGTP12N60C3D, HGT1S12N60C3DS
©2001 Fairch ild Semicond uctor C orpo ration HGTP12N60C3D, HGT1S12N60C3DS Rev. B
FIGURE 17. IGBT NORMALIZED TRANSIENT THERMAL IMPEDANCE, JUNCTION TO CASE
FIGURE 18. DIODE FORWARD CURRENT vs FORWARD
VOLTAGE DROP FIGURE 19. RECOVERY TIMES vs FORWARD CURRENT
Typical Performance Curves (Continued)
t1, RECTANGULAR PULSE DURATION (s)
10-5 10-3 100101
10-4 10-1
10-2
100
ZθJC, NORMALIZED THERMAL RESPONSE
10-1
10-2
DUTY FACTOR, D = t1 / t2
PEAK TJ = PD x ZθJC x RθJC + TC
t1
t2
PD
SIN GLE PULSE
0.5
0.2
0.1
0.05
0.02
0.01
0.5 1.0 1.5 2.5 3.0
IEC, FORWARD CURRENT (A)
VEC, FORWARD VOLTAGE (V)
02.0
10
0
20
30
40
50
25oC
100oC
150oC
30
20
10
0
tR, RECOVERY TIMES (ns)
IEC, FORWARD CURRENT (A)
510 20015
35
25
15
5
trr
ta
tb
TC = 25oC, dIEC/dt = 200A/ms
Test Circuit and Waveform
FIGURE 20. INDUCTIVE SWITCHING TEST CIRCUIT FIGURE 21. SWITCHING TEST WAVEFORMS
RG = 25Ω
L = 100µH
VDD = 480V
+
-
HGTP12N60C3D
tfi
td(OFF)I tri
td(ON)I
10%
90%
10%
90%
VCE
ICE
VGE
EOFF EON
HGTP12N60C3D, HGT1S12N60C3DS
©2001 Fairch ild Semicond uctor C orpo ration HGTP12N60C3D, HGT1S12N60C3DS Rev. B
Handling Precautions for IGBTs
Insulated Gate Bipolar Transistors are susceptible to
gate- ins ul atio n dam age by the electrostatic d isc ha rge of
energy through the devices. When handling these devices,
care should be exercised to assure that the sta tic charge
built in the handler’s body capacitance is no t disc ha rged
through the device. With proper handling and application
procedures, however, IGBTs are currently being extensively
used in production b y nume rous equipment m anuf acturers in
military, ind u s trial and con su mer appli cations, with virtually
no damage problems due to electrostatic discharge. IGBTs
can be handled safely if the follow in g basic precautions are
taken:
1. Prior to ass emb ly int o a circ uit, al l lead s sho uld be k ept
shorted together either by the use of metal shorting
springs or by the insertion into conductive material such
as “ECCOSORBD LD26” or equivalent.
2. When devi ces are remo v ed by hand from their carriers ,
the hand being u sed shoul d be grou nded b y any suitab le
means, for example, with a metallic wristband.
3. Tips of soldering irons should be grounded.
4. Devices sho uld n e v er b e ins erted into or removed from
circuits with power on.
5. Gate V o ltage Ra ting - Ne v er e xceed the gate-v oltage
rating of VGEM. Exceed ing the ra ted VGE can result in
permanent damage to the o xide layer in the gate region.
6. Gate T ermination - The gates of these de vices are
essentially capacitors. Circuits that leave th e gate
open-cir cuited or floati ng should be avoided. These
conditions can result in turn-on of the device due to voltage
buildup on the input capacitor due to leak age currents or
pickup.
7. Gate Protection - The se de vices do no t hav e an internal
monolithic Zener Diode from gate to emitter. If gate
prote ction is requ ire d, an external Zener is
recommended.
Operating Frequency Information
Operating frequency information for a typical device (Figure 13)
is presente d as a gu ide for estim at ing device performance
f or a specif ic applic ation. Oth er typica l frequency vs coll ector
current (ICE) plots are possible using the information shown
for a typic al uni t in Figures 4, 7, 8, 11 and 12. The op erating
frequenc y plot (Figure 13) of a typi cal dev ice shows fMAX1 or
fMAX2 whichever is smaller at each point. The information is
based on measurements of a typical device and is bounded
by the maximum rated junction temperature.
fMAX1 is defin ed by fMAX1 = 0.05/(tD(OFF)I + tD(ON)I).
Deadti me (the de nominato r) has bee n arbit rarily held to 10%
of the on -sta te tim e for a 50% duty factor. Other definition s
are possible. tD(OFF)I and tD(ON)I are defined in Figure 21.
Device turn-off delay can esta blish a n additio n al fr eque n cy
limitin g con diti on for an application other than TJM. tD(OFF)I
is important when controlling output ripple under a lightly
loaded condition.
fMAX2 is defined by fMAX2 = (PD - PC)/(EOFF + EON). The
allowab le dissipation (PD) is defined by PD=(T
JM -T
C)/RθJC.
The sum o f de vice s witc hing and c onduction losses m ust not
exceed PD. A 50% duty factor w as us ed (Figure 13) and the
conduction losses (PC) are approximated by
PC=(V
CE xI
CE)/2.
EON and EOFF are defined in the switching waveforms
shown in Figure 21. EON is the integral of the instantaneous
power loss (ICE x VCE) during turn-on and EOFF is the
integral of the instantaneous power loss during turn-of f. All
tail losse s are inc lud ed in the ca lc ulation for EOFF; i.e., the
collector current equals zero (ICE = 0).
HGTP12N60C3D, HGT1S12N60C3DS
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER
NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or
systems which, (a) are intended for surgical implant into
the body, or (b) support or sustain life, or (c) whose
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
reasonably expected to result in significant injury to the
user.
2. A critical component is any component of a life
support device or system whose failure to perform can
be reasonably expected to cause the failure of the life
support device or system, or to affect its safety or
effectiveness.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification Product Status Definition
Advance Information
Preliminary
No Identification Needed
Obsolete
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
Formative or
In Design
First Production
Full Production
Not In Production
OPTOLOGIC™
OPTOPLANAR™
PACMAN™
POP™
Power247™
PowerTrench
QFET™
QS™
QT Optoelectronics™
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SILENT SWITCHER
FAST
FASTr™
FRFET™
GlobalOptoisolator™
GTO™
HiSeC™
ISOPLANAR™
LittleFET™
MicroFET™
MicroPak™
MICROWIRE™
Rev. H4
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CROSSVOLT™
DenseTrench™
DOME™
EcoSPARK™
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EnSignaTM
FACT™
FACT Quiet Series™
SMART START™
STAR*POWER™
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SuperSOT™-6
SuperSOT™-8
SyncFET™
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UHC™
UltraFET
STAR*POWER is used under license
VCX™
