1
FEATURES
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
A0
A1
A2
P0
P1
P2
P3
GND
VCC
SDA
SCL
INT
P7
P6
P5
P4
DW OR N PACKAGE
(TOP VIEW) 1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
INT
SCL
NC
SDA
VCC
A0
A1
NC
A2
P0
P7
P6
NC
P5
P4
GND
P3
NC
P2
P1
DGV OR PW PACKAGE
(TOP VIEW)
NC – No internal connection
RGY PACKAGE
(TOP VIEW)
1 20
10 11
2
3
4
5
6
7
8
9
19
18
17
16
15
14
13
12
P6
NC
P5
P4
GND
P3
NC
P2
SCL
NC
SDA
VCC
A0
A1
NC
A2
INT
P1 P7
P0
NC – No internal connection
RGT PACKAGE
(TOP VIEW)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
P7
INT
SCL
SDA
P0
P1
P2
P3
GND
P4
P5
P6VCC
A0
A1
A2
DESCRIPTION/ORDERING INFORMATION
PCF8574
www.ti.com
............................................................................................................................................................... SCPS068G – JULY 2001 – REVISED MAY 2008
REMOTE 8-BIT I/O EXPANDER FOR I
2
C BUS
•Low Standby-Current Consumption of •Compatible With Most Microcontrollers10 µA Max
•Latched Outputs With High-Current Drive•I
2
C to Parallel-Port Expander Capability for Directly Driving LEDs•Open-Drain Interrupt Output •Latch-Up Performance Exceeds 100 mA PerJESD 78, Class II
This 8-bit input/output (I/O) expander for the two-line bidirectional bus (I
2
C) is designed for 2.5-V to 6-V V
CCoperation.
The PCF8574 provides general-purpose remote I/O expansion for most microcontroller families via the I
2
Cinterface [serial clock (SCL), serial data (SDA)].
The device features an 8-bit quasi-bidirectional I/O port (P0 – P7), including latched outputs with high-current drivecapability for directly driving LEDs. Each quasi-bidirectional I/O can be used as an input or output without the useof a data-direction control signal. At power on, the I/Os are high. In this mode, only a current source to V
CC
isactive. An additional strong pullup to V
CC
allows fast rising edges into heavily loaded outputs. This device turnson when an output is written high and is switched off by the negative edge of SCL. The I/Os should be highbefore being used as inputs.
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications ofTexas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Copyright © 2001 – 2008, Texas Instruments IncorporatedProducts conform to specifications per the terms of the TexasInstruments standard warranty. Production processing does notnecessarily include testing of all parameters.
DESCRIPTION/ORDERING INFORMATION (CONTINUED)
PCF8574
SCPS068G – JULY 2001 – REVISED MAY 2008 ...............................................................................................................................................................
www.ti.com
The PCF8574 provides an open-drain output ( INT) that can be connected to the interrupt input of amicrocontroller. An interrupt is generated by any rising or falling edge of the port inputs in the input mode. Aftertime, t
iv
, INT is valid. Resetting and reactivating the interrupt circuit is achieved when data on the port is changedto the original setting or data is read from, or written to, the port that generated the interrupt. Resetting occurs inthe read mode at the acknowledge bit after the rising edge of the SCL signal, or in the write mode at theacknowledge bit after the high-to-low transition of the SCL signal. Interrupts that occur during the acknowledgeclock pulse can be lost (or be very short) due to the resetting of the interrupt during this pulse. Each change ofthe I/Os after resetting is detected and, after the next rising clock edge, is transmitted as INT. Reading from, orwriting to, another device does not affect the interrupt circuit.
By sending an interrupt signal on this line, the remote I/O can inform the microcontroller if there is incoming dataon its ports without having to communicate via the I
2
C bus. Therefore, the PCF8574 can remain a simple slavedevice.
ORDERING INFORMATION
T
A
PACKAGE
(1) (2)
ORDERABLE PART NUMBER TOP-SIDE MARKING
PCF8574NPDIP – N Tube of 25 PCF8574NPCF8574NE4QFN – RGT Reel of 3000 PCF8574RGTR ZWJPCF8574RGYRQFN – RGY Reel of 1000 PF574PCF8574RGYRG4
PCF8574DWTube of 40
PCF8574DWE4SOIC – DW PCF8574– 40 °C to 85 °C PCF8574DWRReel of 2000
PCF8574DWRE4
PCF8574PWTube of 70
PCF8574PWE4TSSOP – PW PF574PCF8574PWRReel of 2000
PCF8574PWRE4
PCF8574DGVRTVSOP – DGV Reel of 2000 PF574PCF8574DGVRE4
(1) Package drawings, thermal data, and symbolization are available at www.ti.com/packaging .(2) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TIwebsite at www.ti.com .
2Submit Documentation Feedback Copyright © 2001 – 2008, Texas Instruments Incorporated
Product Folder Link(s): PCF8574
14
I/O
Port
4
5
6
7
9
10
11
12
P0
P1
P2
P3
P4
P5
P6
P7
Shift
Register 8 Bit
LP Filter
Interrupt
Logic
I2C Bus
Control
Input
Filter
15
Power-On
Reset
Read Pulse
Write Pulse
PCF8574
3
2
1
13
16
8
GND
VCC
SDA
SCL
A2
A1
A0
INT
Pin numbers shown are for the DW and N packages.
To Interrupt
Logic
P0−P7
VCC
GND
CIS
D Q
FF
CIS
D Q
FF
Write Pulse
Data From
Shift Register
Power-On
Reset
Read Pulse
Data to
Shift Register
100 µA
PCF8574
www.ti.com
............................................................................................................................................................... SCPS068G – JULY 2001 – REVISED MAY 2008
LOGIC DIAGRAM (POSITIVE LOGIC)
SIMPLIFIED SCHEMATIC DIAGRAM OF EACH P-PORT INPUT/OUTPUT
Copyright © 2001 – 2008, Texas Instruments Incorporated Submit Documentation Feedback 3
Product Folder Link(s): PCF8574
I
2
C Interface
PCF8574
SCPS068G – JULY 2001 – REVISED MAY 2008 ...............................................................................................................................................................
www.ti.com
I
2
C communication with this device is initiated by a master sending a start condition, a high-to-low transition onthe SDA I/O while the SCL input is high. After the start condition, the device address byte is sent,most-significant bit (MSB) first, including the data direction bit (R/ W). This device does not respond to the generalcall address. After receiving the valid address byte, this device responds with an acknowledge, a low on the SDAI/O during the high of the acknowledge-related clock pulse. The address inputs (A0 – A2) of the slave device mustnot be changed between the start and the stop conditions.
The data byte follows the address acknowledge. If the R/ W bit is high, the data from this device are the valuesread from the P port. If the R/ W bit is low, the data are from the master, to be output to the P port. The data byteis followed by an acknowledge sent from this device. If other data bytes are sent from the master, following theacknowledge, they are ignored by this device. Data are output only if complete bytes are received andacknowledged. The output data will be valid at time, t
pv
, after the low-to-high transition of SCL and during theclock cycle for the acknowledge.
A stop condition, which is a low-to-high transition on the SDA I/O while the SCL input is high, is sent by themaster.
Interface Definition
BITBYTE
7 (MSB) 6 5 4 3 2 1 0 (LSB)
I
2
C slave address L H L L A2 A1 A0 R/ WI/O data bus P7 P6 P5 P4 P3 P2 P1 P0
4Submit Documentation Feedback Copyright © 2001 – 2008, Texas Instruments Incorporated
Product Folder Link(s): PCF8574
A AS 0 1 0 0 A1A2 A0 0
Start
Condition
ACK
From Slave ACK
From Slave
Data DataSlave Address R/W
P7 P6 1 P0 P7 P0 A
Integral Multiples of Two Bytes
P5
tpv
IOHT
tir
SCL
SDA
Write to
Port
Data Output
Voltage
P5 Output
Voltage
P5 Pullup
Output
Current
INT
ACK
From Slave
Data A0
and B0
Valid
12345678 1234567 8 1 2 3 4 5 6 7 8
IOH
A AS 0 1 0 0 A1A2 A0 1
ACK
From Slave ACK
From Master
R/W
P7 P6 P0 P7
ACK
From Master
tsu
tir
SCL
SDA
Read From
Port
Data Into
Port
INT
P5 P4 P3 P2 P1 AP0
tir
tiv
P7 to P0
A low-to-high transition of SDA while SCL is high is defined as the stop condition (P). The transfer of data can be stopped at any moment by
a stop condition. When this occurs, data present at the latest ACK phase is valid (output mode). Input data is lost.
P6 P5 P4 P3 P2 P1
th
P7 P6
12345678 1234567 8 1 2 3 4 5 6 7 8
P7 to P0
PCF8574
www.ti.com
............................................................................................................................................................... SCPS068G – JULY 2001 – REVISED MAY 2008
Figure 1 and Figure 2 show the address and timing diagrams for the write and read modes, respectively.
Figure 1. Write Mode (Output)
Figure 2. Read Mode (Input)
Copyright © 2001 – 2008, Texas Instruments Incorporated Submit Documentation Feedback 5
Product Folder Link(s): PCF8574
Absolute Maximum Ratings
(1)
Recommended Operating Conditions
PCF8574
SCPS068G – JULY 2001 – REVISED MAY 2008 ...............................................................................................................................................................
www.ti.com
Address Reference
INPUTS
I
2
C BUS SLAVE ADDRESSA2 A1 A0
L L L 32 (decimal), 20 (hexadecimal)L L H 33 (decimal), 21 (hexadecimal)L H L 34 (decimal), 22 (hexadecimal)L H H 35 (decimal), 23 (hexadecimal)H L L 36 (decimal), 24 (hexadecimal)H L H 37 (decimal), 25 (hexadecimal)H H L 38 (decimal), 26 (hexadecimal)H H H 39 (decimal), 27 (hexadecimal)
over operating free-air temperature range (unless otherwise noted)
MIN MAX UNIT
V
CC
Supply voltage range – 0.5 7 VV
I
Input voltage range
(2)
– 0.5 V
CC
+ 0.5 VV
O
Output voltage range
(2)
– 0.5 V
CC
+ 0.5 VI
IK
Input clamp current V
I
< 0 – 20 mAI
OK
Output clamp current V
O
< 0 – 20 mAI
OK
Input/output clamp current V
O
< 0 or V
O
> V
CC
± 400 µAI
OL
Continuous output low current V
O
= 0 to V
CC
50 mAI
OH
Continuous output high current V
O
= 0 to V
CC
– 4 mAContinuous current through V
CC
or GND ± 100 mADGV package
(3)
92DW package
(3)
57N package
(3)
67θ
JA
Package thermal impedance °C/WPW package
(3)
83RGT package
(4)
53RGY package
(4)
37T
stg
Storage temperature range – 65 150 °C
(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratingsonly, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operatingconditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.(2) The input negative-voltage and output voltage ratings may be exceeded if the input and output current ratings are observed.(3) The package thermal impedance is calculated in accordance with JESD 51-7.(4) The package thermal impedance is calculated in accordance with JESD 51-5.
MIN MAX UNIT
V
CC
Supply voltage 2.5 6 VV
IH
High-level input voltage 0.7 ×V
CC
V
CC
+ 0.5 VV
IL
Low-level input voltage – 0.5 0.3 ×V
CC
VI
OH
High-level output current – 1 mAI
OL
Low-level output current 25 mAT
A
Operating free-air temperature – 40 85 °C
6Submit Documentation Feedback Copyright © 2001 – 2008, Texas Instruments Incorporated
Product Folder Link(s): PCF8574
Electrical Characteristics
I
2
C Interface Timing Requirements
PCF8574
www.ti.com
............................................................................................................................................................... SCPS068G – JULY 2001 – REVISED MAY 2008
over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS V
CC
MIN TYP
(1)
MAX UNIT
V
IK
Input diode clamp voltage I
I
= – 18 mA 2.5 V to 6 V – 1.2 VV
POR
Power-on reset voltage
(2)
V
I
= V
CC
or GND, I
O
= 0 6 V 1.3 2.4 VI
OH
P port V
O
= GND 2.5 V to 6 V 30 300 µAI
OHT
P-port transient pullup current High during acknowledge, V
OH
= GND 2.5 V – 1 mASDA V
O
= 0.4 V 2.5 V to 6 V 3I
OL
P port V
O
= 1 V 5 V 10 25 mAINT V
O
= 0.4 V 2.5 V to 6 V 1.6SCL, SDA ± 5I
I
INT V
I
= V
CC
or GND 2.5 V to 6 V ± 5 µAA0, A1, A2 ± 5I
IHL
P port V
I
≥V
CC
or V
I
≤GND 2.5 V to 6 V ± 400 µAOperating mode V
I
= V
CC
or GND, I
O
= 0, f
SCL
= 100 kHz 40 100I
CC
6 V µAStandby mode V
I
= V
CC
or GND, I
O
= 0 2.5 10C
i
SCL V
I
= V
CC
or GND 2.5 V to 6 V 1.5 7 pFSDA 3 7C
io
V
IO
= V
CC
or GND 2.5 V to 6 V pFP port 4 10
(1) All typical values are at V
CC
= 5 V, T
A
= 25 °C.(2) The power-on reset circuit resets the I
2
C-bus logic with V
CC
< V
POR
and sets all I/Os to logic high (with current source to V
CC
).
over recommended operating free-air temperature range (unless otherwise noted) (see Figure 3 )
MIN MAX UNIT
f
scl
I
2
C clock frequency 100 kHzt
sch
I
2
C clock high time 4 µst
scl
I
2
C clock low time 4.7 µst
sp
I
2
C spike time 100 nst
sds
I
2
C serial data setup time 250 nst
sdh
I
2
C serial data hold time 0 nst
icr
I
2
C input rise time 1 µst
icf
I
2
C input fall time 0.3 µst
ocf
I
2
C output fall time (10-pF to 400-pF bus) 300 nst
buf
I
2
C bus free time between stop and start 4.7 µst
sts
I
2
C start or repeated start condition setup 4.7 µst
sth
I
2
C start or repeated start condition hold 4 µst
sps
I
2
C stop condition setup 4 µst
vd
Valid data time SCL low to SDA output valid 3.4 µsC
b
I
2
C bus capacitive load 400 pF
Copyright © 2001 – 2008, Texas Instruments Incorporated Submit Documentation Feedback 7
Product Folder Link(s): PCF8574
Switching Characteristics
PCF8574
SCPS068G – JULY 2001 – REVISED MAY 2008 ...............................................................................................................................................................
www.ti.com
over recommended operating free-air temperature range, C
L
≤100 pF (unless otherwise noted) (see Figure 4 )
FROM TOPARAMETER MIN MAX UNIT(INPUT) (OUTPUT)
t
pv
Output data valid SCL P port 4 µst
su
Input data setup time P port SCL 0 µst
h
Input data hold time P port SCL 4 µst
iv
Interrupt valid time P port INT 4 µst
ir
Interrupt reset delay time SCL INT 4 µs
8Submit Documentation Feedback Copyright © 2001 – 2008, Texas Instruments Incorporated
Product Folder Link(s): PCF8574
PARAMETER MEASUREMENT INFORMATION
DUT
RL = 1 kΩ
VCC
CL = 10 pF to 400 pF
tbuf
ticr
tsth tsds
tsdh
ticf
ticr
tscl tsch
tsts
tPHL
tPLH
0.7 × VCC
Stop
Condition
tsps
Repeat
Start
Condition
Start or
Repeat
Start
Condition
SCL
SDA
Start
Condition
(S)
Bit 7
MSB Bit 6 Bit 0
LSB
(R/W)
Acknowledge
(A)
Stop
Condition
(P)
2 Bytes for Complete Device
Programming
LOAD CIRCUIT
VOLTAGE WAVEFORMS
ticf
Stop
Condition
(P)
tsp
0.7 × VCC
0.3 × VCC
0.3 × VCC
Pn
PCF8574
www.ti.com
............................................................................................................................................................... SCPS068G – JULY 2001 – REVISED MAY 2008
Figure 3. I
2
C Interface Load Circuit and Voltage Waveforms
Copyright © 2001 – 2008, Texas Instruments Incorporated Submit Documentation Feedback 9
Product Folder Link(s): PCF8574
A
A
A
A
S 0 1 0 0 A1A2 A0 1 Data 1 1 PData 3
Start
Condition
Acknowledge
From Slave Acknowledge
From Slave
Data From Port Data From PortSlave Address
R/W
87654321
tir
tir
tsps
tiv
Data 1 Data 2 Data 3
INT
Data
Into
Port
B
B
A
A
PnINT
R/W A
tir
0.7 × VCC
0.3 × VCC
0.7 × VCC
0.3 × VCC
0.7 × VCC
0.3 × VCC
0.7 × VCC
0.3 × VCC
INT SCL
View B−BView A−A
tiv
W A 0.7 × VCC
0.3 × VCC
SCL D
ÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
tpv
Slave
Acknowledge
Unstable
Data
Last Stable Bit
SDA
Pn
PCF8574
SCPS068G – JULY 2001 – REVISED MAY 2008 ...............................................................................................................................................................
www.ti.com
PARAMETER MEASUREMENT INFORMATION (continued)
Figure 4. Interrupt Voltage Waveforms
Figure 5. I
2
C Write Voltage Waveforms
10 Submit Documentation Feedback Copyright © 2001 – 2008, Texas Instruments Incorporated
Product Folder Link(s): PCF8574
PCF8574
www.ti.com
............................................................................................................................................................... SCPS068G – JULY 2001 – REVISED MAY 2008
PARAMETER MEASUREMENT INFORMATION (continued)
Figure 6. Load Circuits
Copyright © 2001 – 2008, Texas Instruments Incorporated Submit Documentation Feedback 11
Product Folder Link(s): PCF8574
PACKAGING INFORMATION
Orderable Device Status (1) Package
Type Package
Drawing Pins Package
Qty Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
PCF8574DGVR ACTIVE TVSOP DGV 20 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
PCF8574DGVRE4 ACTIVE TVSOP DGV 20 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
PCF8574DGVRG4 ACTIVE TVSOP DGV 20 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
PCF8574DW ACTIVE SOIC DW 16 40 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
PCF8574DWE4 ACTIVE SOIC DW 16 40 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
PCF8574DWG4 ACTIVE SOIC DW 16 40 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
PCF8574DWR ACTIVE SOIC DW 16 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
PCF8574DWRE4 ACTIVE SOIC DW 16 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
PCF8574DWRG4 ACTIVE SOIC DW 16 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
PCF8574N ACTIVE PDIP N 16 25 Pb-Free
(RoHS) CU NIPDAU N / A for Pkg Type
PCF8574NE4 ACTIVE PDIP N 16 25 Pb-Free
(RoHS) CU NIPDAU N / A for Pkg Type
PCF8574PW ACTIVE TSSOP PW 20 70 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
PCF8574PWE4 ACTIVE TSSOP PW 20 70 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
PCF8574PWG4 ACTIVE TSSOP PW 20 70 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
PCF8574PWR ACTIVE TSSOP PW 20 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
PCF8574PWRE4 ACTIVE TSSOP PW 20 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
PCF8574PWRG4 ACTIVE TSSOP PW 20 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
PCF8574RGTR ACTIVE QFN RGT 16 3000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
PCF8574RGTRG4 ACTIVE QFN RGT 16 3000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
PCF8574RGYR ACTIVE VQFN RGY 20 3000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
PCF8574RGYRG4 ACTIVE VQFN RGY 20 3000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
PACKAGE OPTION ADDENDUM
www.ti.com 21-Dec-2009
Addendum-Page 1
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
PACKAGE OPTION ADDENDUM
www.ti.com 21-Dec-2009
Addendum-Page 2
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
PCF8574DGVR TVSOP DGV 20 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1
PCF8574DWR SOIC DW 16 2000 330.0 16.4 10.75 10.7 2.7 12.0 16.0 Q1
PCF8574PWR TSSOP PW 20 2000 330.0 16.4 6.95 7.1 1.6 8.0 16.0 Q1
PCF8574RGTR QFN RGT 16 3000 330.0 12.4 3.3 3.3 1.0 8.0 12.0 Q2
PCF8574RGYR VQFN RGY 20 3000 330.0 12.4 3.8 4.8 1.6 8.0 12.0 Q1
PACKAGE MATERIALS INFORMATION
www.ti.com 30-Jul-2010
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
PCF8574DGVR TVSOP DGV 20 2000 346.0 346.0 29.0
PCF8574DWR SOIC DW 16 2000 346.0 346.0 33.0
PCF8574PWR TSSOP PW 20 2000 346.0 346.0 33.0
PCF8574RGTR QFN RGT 16 3000 346.0 346.0 35.0
PCF8574RGYR VQFN RGY 20 3000 346.0 346.0 29.0
PACKAGE MATERIALS INFORMATION
www.ti.com 30-Jul-2010
Pack Materials-Page 2
MECHANICAL DATA
MPDS006C – FEBRUAR Y 1996 – REVISED AUGUST 2000
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
DGV (R-PDSO-G**) PLASTIC SMALL-OUTLINE
24 PINS SHOWN
14
3,70
3,50 4,90
5,10
20
DIM
PINS **
4073251/E 08/00
1,20 MAX
Seating Plane
0,05
0,15
0,25
0,50
0,75
0,23
0,13
112
24 13
4,30
4,50
0,16 NOM
Gage Plane
A
7,90
7,70
382416
4,90
5,103,70
3,50
A MAX
A MIN
6,60
6,20
11,20
11,40
56
9,60
9,80
48
0,08
M
0,07
0,40
0°–8°
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion, not to exceed 0,15 per side.
D. Falls within JEDEC: 24/48 Pins – MO-153
14/16/20/56 Pins – MO-194
IMPORTANT NOTICE
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements,
and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should
obtain the latest relevant information before placing orders and should verify that such information is current and complete. All products are
sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment.
TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI’s standard
warranty. Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty. Except where
mandated by government requirements, testing of all parameters of each product is not necessarily performed.
TI assumes no liability for applications assistance or customer product design. Customers are responsible for their products and
applications using TI components. To minimize the risks associated with customer products and applications, customers should provide
adequate design and operating safeguards.
TI does not warrant or represent that any license, either express or implied, is granted under any TI patent right, copyright, mask work right,
or other TI intellectual property right relating to any combination, machine, or process in which TI products or services are used. Information
published by TI regarding third-party products or services does not constitute a license from TI to use such products or services or a
warranty or endorsement thereof. Use of such information may require a license from a third party under the patents or other intellectual
property of the third party, or a license from TI under the patents or other intellectual property of TI.
Reproduction of TI information in TI data books or data sheets is permissible only if reproduction is without alteration and is accompanied
by all associated warranties, conditions, limitations, and notices. Reproduction of this information with alteration is an unfair and deceptive
business practice. TI is not responsible or liable for such altered documentation. Information of third parties may be subject to additional
restrictions.
Resale of TI products or services with statements different from or beyond the parameters stated by TI for that product or service voids all
express and any implied warranties for the associated TI product or service and is an unfair and deceptive business practice. TI is not
responsible or liable for any such statements.
TI products are not authorized for use in safety-critical applications (such as life support) where a failure of the TI product would reasonably
be expected to cause severe personal injury or death, unless officers of the parties have executed an agreement specifically governing
such use. Buyers represent that they have all necessary expertise in the safety and regulatory ramifications of their applications, and
acknowledge and agree that they are solely responsible for all legal, regulatory and safety-related requirements concerning their products
and any use of TI products in such safety-critical applications, notwithstanding any applications-related information or support that may be
provided by TI. Further, Buyers must fully indemnify TI and its representatives against any damages arising out of the use of TI products in
such safety-critical applications.
TI products are neither designed nor intended for use in military/aerospace applications or environments unless the TI products are
specifically designated by TI as military-grade or "enhanced plastic." Only products designated by TI as military-grade meet military
specifications. Buyers acknowledge and agree that any such use of TI products which TI has not designated as military-grade is solely at
the Buyer's risk, and that they are solely responsible for compliance with all legal and regulatory requirements in connection with such use.
TI products are neither designed nor intended for use in automotive applications or environments unless the specific TI products are
designated by TI as compliant with ISO/TS 16949 requirements. Buyers acknowledge and agree that, if they use any non-designated
products in automotive applications, TI will not be responsible for any failure to meet such requirements.
Following are URLs where you can obtain information on other Texas Instruments products and application solutions:
Products Applications
Audio www.ti.com/audio Communications and Telecom www.ti.com/communications
Amplifiers amplifier.ti.com Computers and Peripherals www.ti.com/computers
Data Converters dataconverter.ti.com Consumer Electronics www.ti.com/consumer-apps
DLP® Products www.dlp.com Energy and Lighting www.ti.com/energy
DSP dsp.ti.com Industrial www.ti.com/industrial
Clocks and Timers www.ti.com/clocks Medical www.ti.com/medical
Interface interface.ti.com Security www.ti.com/security
Logic logic.ti.com Space, Avionics and Defense www.ti.com/space-avionics-defense
Power Mgmt power.ti.com Transportation and www.ti.com/automotive
Automotive
Microcontrollers microcontroller.ti.com Video and Imaging www.ti.com/video
RFID www.ti-rfid.com Wireless www.ti.com/wireless-apps
RF/IF and ZigBee® Solutions www.ti.com/lprfTI E2E Community Home Page e2e.ti.com
Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
Copyright © 2011, Texas Instruments Incorporated