1. Product profile
1.1 General description
100 W LDMOS power transistor for base station applications at frequencies from
2300 MHz to 2400 MHz.
[1] Single carrier IS-95 with pilot, paging, sync and 6 traffic channels (Walsh codes 8 - 13). PAR = 9.7 dB at
0.01 % probability on the CCDF. Channel bandwidth is 1.2288 MHz.
[2] 3GPP; test model 1; 64 DPCH; PAR = 7.2 dB at 0.01 % probability on CCDF. Channel bandwidth is
3.84 MHz.
1.2 Features and benefits
Excellent ruggedness
High efficiency
Low Rth providing excellent thermal stability
Designed for low memory effects providing excellent digital pre-distortion capability
Internally matched for ease of use
Integrated ESD protection
Compliant to Restriction of Hazardous Substances (RoHS) Directive 2002/95/EC
1.3 Applications
RF power amplifiers for base stations an d multi carrier applications i n the 2300 MHz to
2400 MHz frequency range
BLF7G24L-100;
BLF7G24LS-100
Power LDMOS transistor
Rev. 4 — 22 July 2011 Product data sheet
Table 1. Typical performance
Typical RF perfo rman c e at Tcase = 25
C in a common source class-AB production test circuit.
Mode of operation f IDq VDS PL(AV) GpDACPR885k ACPR5M
(MHz) (mA) (V) (W) (dB) (%) (dBc) (dBc)
IS-95 2300 to 2400 900 28 20 18 27 46[1] -
1 carrier W-CDMA 2300 to 2400 900 28 30 18.7 33 - 40[2]
BLF7G24L-100_7G24LS-100 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 4 — 22 July 2011 2 of 14
NXP Semiconductors BLF7G24L-100; BLF7G24LS-100
Power LDMOS transistor
2. Pinning information
[1] Connected to flange.
3. Ordering information
4. Limiting values
5. Thermal characteristics
Table 2. Pinning
Pin Description Simplified outline Graphic symbol
BLF7G24L-100 (SOT 502A)
1drain
2gate
3source [1]
BLF7G24LS-100 (SOT5 02B)
1drain
2gate
3source [1]
3
2
1
sym112
1
3
2
3
2
1
sym112
1
3
2
Table 3. Ordering information
Type number Package
Name Description Version
BLF7G24L-100 - flanged LDMOST ceramic package; 2 mounting holes;
2 leads SOT502A
BLF7G24LS-100 - earless flanged LDMOST ceramic package; 2 leads SOT502B
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter Conditions Min Max Unit
VDS drain-source voltage - 65 V
VGS gate-source voltage 0.5 +13 V
IDdrain current - 28 A
Tstg storage temperature 65 +150 C
Tjjunction temperature - 200 C
Table 5. Thermal characteristics
Symbol Parameter Conditions Typ Unit
Rth(j-c) thermal resistance from junction to case Tcase =80C; PL=100W 0.3 K/W
BLF7G24L-100_7G24LS-100 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 4 — 22 July 2011 3 of 14
NXP Semiconductors BLF7G24L-100; BLF7G24LS-100
Power LDMOS transistor
6. Characteristics
7. Test information
Remark: All testing performed in a class-AB production test circuit.
7.1 Ruggedness in class-AB operation
The BLF7G24L-100 and BLF7G24LS-100 are capable of withstanding a load mismatch
corresponding to VSWR = 10 : 1 through all phases under the following conditions:
VDS =28V; I
Dq =900mA; P
L= 100 W (CW); f = 2300 MHz.
Table 6. Characteristics
Tj = 25
C unless otherwise specified.
Symbol Parameter Conditions Min Typ Max Unit
V(BR)DSS drain-source breakdown voltage VGS =0V; I
D=1mA 65 - - V
VGS(th) gate-source threshold voltage VDS =10 V; I
D= 150 mA 1.5 1.8 2.3 V
IDSS drain leakage current VGS =0V; V
DS =28V - - 5 A
IDSX drain cut-off current VGS =V
GS(th) +3.75 V;
VDS =10V 25.1 29 - A
IGSS gate leakage current VGS =11V; V
DS = 0 V - - 500 nA
gfs forward transconductance VDS =10V; I
D=5.35A - 10.5 - S
RDS(on) drain-source on-state resistance VGS =V
GS(th) + 3.75 V;
ID=5.25A -0.1-
Table 7. Functional test information
Mode of operation: 1-carrier N-CDMA, single carrier IS-95 with pilot, paging, sync and 6 traffic
channels (Walsh codes 8 - 13). P AR = 9.7 dB at 0.01 % probability on the CCDF, channel bandwidth
is 1.2288 MHz; f1= 2300 MHz; f2= 2400 MHz; RF performance at VDS =28V; I
Dq =900mA;
Tcase =25
C; unless otherwise specified.
Symbol Parameter Conditions Min Typ Max Unit
PL(AV) average output power - 20 - W
Gppower gain 17.3 18 - dB
RLin input return loss - 14 - dB
Ddrain efficiency 22 27 - %
ACPR885k adjacent channel power ratio (885 kHz) - 46 40 dBc
BLF7G24L-100_7G24LS-100 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 4 — 22 July 2011 4 of 14
NXP Semiconductors BLF7G24L-100; BLF7G24LS-100
Power LDMOS transistor
7.2 Single carrier IS-95
Single carrier IS-95 with pilot, paging, sync and 6 traffic channels (Walsh codes 8 - 13).
PAR = 9.7 dB at 0.01 % probability on the CCDF. Channel bandwidth is 1.2288 MHz.
VDS = 28 V; IDq = 900 mA.
(1) f = 2300 MHz
(2) f = 2400 MHz
VDS = 28 V; IDq = 900 mA.
(1) f = 2300 MHz
(2) f = 2400 MHz
Fig 1. Single carrier IS-95 power gain as a functio n of
load power; typical values Fig 2. Single carr ier IS-95 drain efficiency as a
function of load power; typical values
PL (W)
0806020 40
001aan495
17.5
18.5
19.5
Gp
(dB)
16.5
(1)
(2)
PL (W)
0806020 40
001aan496
20
30
10
40
50
ηD
(%)
0
(1)
(2)
VDS = 28 V; IDq = 900 mA.
(1) f = 2300 MHz
(2) f = 2400 MHz
VDS = 28 V; IDq = 900 mA.
(1) f = 2300 MHz
(2) f = 2400 MHz
Fig 3. Single carrier IS-95 ACPR at 885 kHz as a
function of load power; typ ic al values Fig 4. Single carr ier IS-95 ACPR at 1980 kHz as a
function of load power; typical values
PL (W)
0806020 40
001aan497
−50
−40
−60
−30
−20
APCR885
(dBc)
−70
(1)
(2)
PL (W)
0806020 40
001aan498
−60
−50
−70
−40
−30
APCR1980
(dBc)
−80
(1)
(2)
BLF7G24L-100_7G24LS-100 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 4 — 22 July 2011 5 of 14
NXP Semiconductors BLF7G24L-100; BLF7G24LS-100
Power LDMOS transistor
VDS = 28 V; IDq = 900 mA.
(1) f = 2300 MHz
(2) f = 2400 MHz
VDS = 28 V; IDq = 900 mA.
(1) f = 2300 MHz
(2) f = 2400 MHz
Fig 5. Single carrier IS-95 peak-to-average power
ratio as a function of load power;
typical values
Fig 6. Single carrier IS-95 peak power as a function
of load power; typical values
PL (W)
0806020 40
001aan499
4
8
12
PAR
(dB)
0
(1)
(2)
PL (W)
0806020 40
001aan500
80
120
40
160
200
PL(M)
(W)
0
(1)
(2)
BLF7G24L-100_7G24LS-100 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 4 — 22 July 2011 6 of 14
NXP Semiconductors BLF7G24L-100; BLF7G24LS-100
Power LDMOS transistor
7.3 Pulsed CW
VDS = 28 V; IDq = 900 mA.
(1) f = 2300 MHz
(2) f = 2400 MHz
VDS = 28 V; IDq = 900 mA.
(1) f = 2300 MHz
(2) f = 2400 MHz
Fig 7. Pulsed CW power gain as a function of load
power; typical values Fig 8. Pulsed CW drain efficiency as a function of
load power; typical values
PL (W)
0 16012040 80
001aan501
17.5
18.5
19.5
Gp
(dB)
16.5
(1)
(2)
PL (W)
0 16012040 80
001aan502
30
40
20
50
60
ηD
(%)
10
(1)
(2)
BLF7G24L-100_7G24LS-100 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 4 — 22 July 2011 7 of 14
NXP Semiconductors BLF7G24L-100; BLF7G24LS-100
Power LDMOS transistor
7.4 Single carrier W - CDMA
3GPP; test model 1; 64 DPCH; PAR = 7.2 dB at 0.01 % probability on CCDF. Channel
bandwidth is 3.84 MHz.
VDS = 28 V; IDq = 900 mA.
(1) f = 2300 MHz
(2) f = 2400 MHz
VDS = 28 V; IDq = 900 mA.
(1) f = 2300 MHz
(2) f = 2400 MHz
Fig 9. Single carrier W -CDMA pow e r gain as a
function of load power; typ ic al values Fig 10. Single carrier W-CDMA drain efficiency as a
function of load power; typical values
PL (W)
0 1008040 6020
001aan503
17.5
18.5
19.5
Gp
(dB)
16.5
(1)
(2)
PL (W)
0 1008040 6020
001aan504
30
40
20
50
60
ηD
(%)
10
(1)
(2)
VDS = 28 V; IDq = 900 mA.
(1) f = 2300 MHz
(2) f = 2400 MHz
VDS = 28 V; IDq = 900 mA.
(1) f = 2300 MHz
(2) f = 2400 MHz
Fig 11. Single carrier W-CDMA AC PR at 5 MH z as a
function of load power; typ ic al values Fig 12. Single carrier W-CDMA ACPR at 10 MHz as a
function of load power; typical values
PL (W)
0 1008040 6020
001aan505
−40
−30
−50
−20
−10
APCR5M
(dBc)
−60
(1)
(2)
PL (W)
0 1008040 6020
001aan506
−50
−40
−60
−30
−20
APCR10M
(dBc)
−70
(1)
(2)
BLF7G24L-100_7G24LS-100 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 4 — 22 July 2011 8 of 14
NXP Semiconductors BLF7G24L-100; BLF7G24LS-100
Power LDMOS transistor
VDS = 28 V; IDq = 900 mA.
(1) f = 2300 MHz
(2) f = 2400 MHz
VDS = 28 V; IDq = 900 mA.
(1) f = 2300 MHz
(2) f = 2400 MHz
Fig 13. Single carrier W -CD MA peak-to -average p ower
ratio as a function of load power;
typical values
Fig 14. Single carrier W-CDMA peak output power as a
function of load power; typical values
PL (W)
0 1008040 6020
001aan507
4
2
6
8
PAR
(dB)
0
(1)
(2)
PL (W)
0 1008040 6020
001aan508
100
150
50
200
250
PL(M)
(W)
0
(1)
(2)
BLF7G24L-100_7G24LS-100 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 4 — 22 July 2011 9 of 14
NXP Semiconductors BLF7G24L-100; BLF7G24LS-100
Power LDMOS transistor
8. Package outline
Fig 15. Package outline SOT502A
REFERENCES
OUTLINE
VERSION EUROPEAN
PROJECTION ISSUE DATE
IEC JEDEC JEITA
SOT502A 99-12-28
03-01-10
0 5 10 mm
scale
Flanged LDMOST ceramic package; 2 mounting holes; 2 leads SOT502A
p
L
AF
b
D
U2
H
Q
c
1
3
2
D1
E
A
C
q
U1
C
B
E1
M M
w2
UNIT A
mm
Db
12.83
12.57 0.15
0.08 20.02
19.61 9.53
9.25 19.94
18.92 9.91
9.65
4.72
3.43
cU2
0.25 0.5127.94
qw
2
w1
F
1.14
0.89
U1
34.16
33.91
L
5.33
4.32
p
3.38
3.12
Q
1.70
1.45
EE
1
9.50
9.30
inches 0.505
0.495 0.006
0.003 0.788
0.772
D1
19.96
19.66
0.786
0.774 0.375
0.364 0.785
0.745 0.390
0.380
0.186
0.135 0.01 0.021.100
0.045
0.035 1.345
1.335
0.210
0.170 0.133
0.123 0.067
0.057
0.374
0.366
H
DIMENSIONS (millimetre dimensions are derived from the original inch dimensions)
w1AB
M M M
BLF7G24L-100_7G24LS-100 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 4 — 22 July 2011 10 of 14
NXP Semiconductors BLF7G24L-100; BLF7G24LS-100
Power LDMOS transistor
Fig 16. Package outline SOT502B
REFERENCES
OUTLINE
VERSION EUROPEAN
PROJECTION ISSUE DATE
IEC JEDEC JEITA
SOT502B 03-01-10
07-05-09
0 5 10 mm
scale
Earless flanged LDMOST ceramic package; 2 leads SOT502B
AF
b
D
U2
L
H
Q
c
1
3
2
D1
E
D
U1
D
E1
M M
w2
UNIT A
mm
Db
12.83
12.57 0.15
0.08 20.02
19.61 9.53
9.25 19.94
18.92 9.91
9.65
4.72
3.43
cU2
0.25
w2
F
1.14
0.89
U1
20.70
20.45
L
5.33
4.32
Q
1.70
1.45
EE
1
9.50
9.30
inches 0.505
0.495 0.006
0.003 0.788
0.772
D1
19.96
19.66
0.786
0.774 0.375
0.364 0.785
0.745 0.390
0.380
0.186
0.135 0.010
0.045
0.035 0.815
0.805
0.210
0.170 0.067
0.057
0.374
0.366
H
DIMENSIONS (millimetre dimensions are derived from the original inch dimensions)
BLF7G24L-100_7G24LS-100 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 4 — 22 July 2011 11 of 14
NXP Semiconductors BLF7G24L-100; BLF7G24LS-100
Power LDMOS transistor
9. Abbreviations
10. Revision history
Table 8. Abbreviations
Acronym Description
3GPP Third Generation Partnership Project
CCDF Complementary Cumulative Distribution Function
CW Continuous Wave
DPCH Dedicated Physical CHannel
IS-95 Interim Standard 95
ESD ElectroStatic Discharge
LDMOS Laterally Diffused Metal Oxide Semiconductor
LDMOST Laterally Diffused Metal Oxide Semiconductor Transistor
N-CDMA Narrowband Code Division Multiple Access
PAR Peak-to-Average power Ratio
RF Radio Frequency
VSWR Voltage Standing Wave Ratio
W-CDMA Wideband Code Division Multiple Access
Table 9. Revision history
Document ID Release date Data sheet status Change notice Supersedes
BLF7G24L-100_7G24LS-1 00 v.4 20110722 Product data sheet - BLF7G24L-100_7G24LS-100
v.3
Modifications: •The status of this data sheet has been changed to Product data sheet
BLF7G24L-100_7G24LS-1 00 v.3 20110405 Preliminary data sheet - BLF7G24L-100_7G24LS-100
v.2
BLF7G24L-100_7G24LS-1 00 v.2 20100714 Obje ctive data sheet - BLF7G24L-100_7G24LS-100
v.1
BLF7G24L-100_7G24LS-100 v.1 20100414 Objective data sheet - -
BLF7G24L-100_7G24LS-100 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 4 — 22 July 2011 12 of 14
NXP Semiconductors BLF7G24L-100; BLF7G24LS-100
Power LDMOS transistor
11. Legal information
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[1] Please consult the most recently issued document before initiating or completing a design.
[2] The term ‘short data sheet’ is explained in section “Definitions”.
[3] The product status of de vice(s) descr ibed in th is docume nt may have cha nged since this docume nt was publis hed and ma y dif fer in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
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Draft — The document is a draft version only. The content is still under
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Short data sheet — A short data sheet is an extract from a full data sheet
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for quick reference only and shou ld not be rel ied u pon to cont ain det ailed and
full information. For detailed and full informatio n see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
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Product specificatio n — The information and data provided in a Product
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Applications — Applications that are described herein for any of these
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representation or warranty tha t such application s will be suitable for the
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Customers are responsible for the design and ope ration of their applications
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Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those given in
the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanent ly and irreversibly affect
the quality and reliability of the device.
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Document status[1][2] Product status[3] Definition
Objective [short] data sheet Development This document contains data from the objective specification for product development.
Preliminary [short] dat a sheet Qualification This document contains data from the preliminary specification.
Product [short] dat a sheet Production This document contains the product specification.
BLF7G24L-100_7G24LS-100 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 4 — 22 July 2011 13 of 14
NXP Semiconductors BLF7G24L-100; BLF7G24LS-100
Power LDMOS transistor
Non-automotive qualified products — Unless this data sheet expressly
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In the event that customer uses the product for design-in and use in
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Notice: All referenced b rands, produc t names, service names and trademarks
are the property of their respect i ve ow ners.
12. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
NXP Semiconductors BLF7G24L-100; BLF7G24LS-100
Power LDMOS transistor
© NXP B.V. 2011. All rights reserved.
For more information, please visit: http://www.nxp.co m
For sales office addresses, please send an email to: salesaddresses@nxp.com
Date of release: 22 July 2011
Document identifier: BLF7G24L-100_7G24LS-100
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
13. Contents
1 Product profile. . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.1 General description . . . . . . . . . . . . . . . . . . . . . 1
1.2 Features and benefits. . . . . . . . . . . . . . . . . . . . 1
1.3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
2 Pinning information. . . . . . . . . . . . . . . . . . . . . . 2
3 Ordering information. . . . . . . . . . . . . . . . . . . . . 2
4 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 2
5 Thermal characteristics . . . . . . . . . . . . . . . . . . 2
6 Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . 3
7 Test information. . . . . . . . . . . . . . . . . . . . . . . . . 3
7.1 Ruggedness in class-AB operation . . . . . . . . . 3
7.2 Single carrier IS-95. . . . . . . . . . . . . . . . . . . . . . 4
7.3 Pulsed CW . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
7.4 Single carrier W-CDMA . . . . . . . . . . . . . . . . . . 7
8 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 9
9 Abbreviations. . . . . . . . . . . . . . . . . . . . . . . . . . 11
10 Revision history. . . . . . . . . . . . . . . . . . . . . . . . 11
11 Legal information. . . . . . . . . . . . . . . . . . . . . . . 12
11.1 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 12
11.2 Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
11.3 Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 12
11.4 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 13
12 Contact information. . . . . . . . . . . . . . . . . . . . . 13
13 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
