SGLS131B - JULY 2002 - REVISED DECEMBER 2003 D D D D D - One Assembly/Test Site, One Fabrication Site Extended Temperature Performance of -55C to 125C Enhanced Diminishing Manufacturing Sources (DMS) Support Enhanced Product Change Notification Qualification Pedigree Output Swing Includes Both Supply Rails Component qualification in accordance with JEDEC and industry standards to ensure reliable operation over an extended temperature range. This includes, but is not limited to, Highly Accelerated Stress Test (HAST) or biased 85/85, temperature cycle, autoclave or unbiased HAST, electromigration, bond intermetallic life, and mold compound life. Such qualification testing should not be viewed as justifying use of this component beyond specified performance and environmental limits. description The TLC2272A and TLC2274A are dual and quadruple operational amplifiers from Texas Instruments. Both devices exhibit rail-to-rail output performance for increased dynamic range in single- or split-supply applications. The TLC227xA family offers 2 MHz of bandwidth and 3 V/s of slew rate for higher speed applications. These devices offer comparable ac performance while having better noise, input offset voltage, and power dissipation than existing CMOS operational amplifiers. The TLC227xA has a noise voltage of 9 nV/Hz, two times lower than competitive solutions. D Low Noise . . . 9 nV/Hz Typ at f = 1 kHz D Low Input Bias Current . . . 1 pA Typ D Fully Specified for Both Single-Supply and D D D D D D Split-Supply Operation Common-Mode Input Voltage Range Includes Negative Rail High-Gain Bandwidth . . . 2.2 MHz Typ High Slew Rate . . . 3.6 V/s Typ Low Input Offset Voltage 950 V Max at TA = 25C Macromodel Included Performance Upgrades for the TS272, TS274, TLC272, and TLC274 MAXIMUM PEAK-TO-PEAK OUTPUT VOLTAGE vs SUPPLY VOLTAGE V(OPP) V O(PP) - Maximum Peak-to-Peak Output Voltage - V D Controlled Baseline 16 TA = 25C 14 12 IO = 50 A 10 IO = 500 A 8 6 The TLC227xA, exhibiting high input impedance and low noise, is excellent for small-signal 4 16 4 6 8 10 12 14 conditioning for high-impedance sources, such as |VDD | - Supply Voltage - V piezoelectric transducers. Because of the micropower dissipation levels, these devices work well in hand-held monitoring and remote-sensing applications. In addition, the rail-to-rail output feature, with single- or split-supplies, makes this family a great choice when interfacing with analog-to-digital converters (ADCs). For precision applications, the TLC227xA family has a maximum input offset voltage of 950 V. This family is fully characterized at 5 V and 5 V. The TLC2272/4 also makes great upgrades to the TLC272/4 or TS272/4 in standard designs. They offer increased output dynamic range, lower noise voltage, and lower input offset voltage. This enhanced feature set allows them to be used in a wider range of applications. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Advanced LinCMOS is a trademark of Texas Instruments. Copyright Copyright 2002 - 2003, 2003 Texas Instruments Incorporated !" # $" # %$&'" "( $"# ! " #%"# % ") "!# # #"$!"# #" *"+( $" %##, # " ##'+ '$ "#", '' %!"#( POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 1 SGLS131A - JULY 2002 - REVISED NOVEMBER 2003 AVAILABLE OPTIONS PACKAGED DEVICES TA VIOmax At 25C SMALL OUTLINE (D) -55C to 125C 950 V 2.5 mV TLC2272AMDREP TLC2272MDREP TLC2272AMPWREP TLC2272MPWREP -55C to 125C 950 V 2.5 mV TLC2274AMDREP TLC2274MDREP TLC2274AMPWREP TLC2274MPWREP TLC2272 D OR PW PACKAGE (TOP VIEW) 1OUT 1IN - 1IN + VDD - /GND 2 1 8 2 7 3 6 4 5 VDD + 2OUT 2IN - 2IN + POST OFFICE BOX 655303 TSSOP (PW) TLC2274 D OR PW PACKAGE (TOP VIEW) 1OUT 1IN - 1IN + VDD + 2IN + 2IN - 2OUT 1 14 2 13 3 12 4 11 5 10 6 9 7 8 * DALLAS, TEXAS 75265 4OUT 4IN - 4IN + VDD - 3IN + 3IN - 3OUT SGLS131A - JULY 2002 - REVISED NOVEMBER 2003 equivalent schematic (each amplifier) VDD + Q3 Q6 Q9 Q12 Q14 Q16 IN + OUT C1 IN - R5 Q1 Q4 Q13 Q15 Q17 D1 Q2 Q5 R3 R4 Q7 Q8 Q10 Q11 R1 R2 VDD- ACTUAL DEVICE COMPONENT COUNT TLC2272 TLC2274 Transistors COMPONENT 38 76 Resistors 26 52 9 18 Diodes Capacitors 3 6 Includes both amplifiers and all ESD, bias, and trim circuitry POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 3 SGLS131A - JULY 2002 - REVISED NOVEMBER 2003 absolute maximum ratings over operating free-air temperature range (unless otherwise noted) Supply voltage, VDD + (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 V Supply voltage, VDD - (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -8 V Differential input voltage, VID (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 V Input voltage range, VI (any input, see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDD- - 0.3 V to VDD+ Input current, II (any input) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 mA Output current, IO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mA Total current into VDD + . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mA Total current out of VDD - . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mA Duration of short-circuit current at (or below) 25C (see Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . unlimited Continuous total dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Dissipation Rating Table Operating free-air temperature range, TA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -55C to 125C Storage temperature range (see Note 4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -65C to 150C Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds: D or PW package . . . . . . . . . . . . . . . 260C Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. All voltage values, except differential voltages, are with respect to the midpoint between VDD+ and VDD -. 2. Differential voltages are at IN+ with respect to IN -. Excessive current will flow if input is brought below VDD - - 0.3 V. 3. The output may be shorted to either supply. Temperature and/or supply voltages must be limited to ensure that the maximum dissipation rating is not exceeded. 4. Long term high-temperature storage and/or extended use at maximum recommended operating conditions may result in a reduction of overall device life. See http://www.ti.com/ep_quality for additional information on enhanced plastic packaging. DISSIPATION RATING TABLE PACKAGE TA 25C 25 C POWER RATING DERATING FACTOR ABOVE TA = 25C 70C TA = 70 C POWER RATING 85C TA = 85 C POWER RATING 125C TA = 125 C POWER RATING D-8 725 mW 5.8 mW/C 464 mW 337 mW 145 mW D-14 950 mW 7.6 mW/C 608 mW 494 mW 190 mW PW-8 525 mW 4.2 mW/C 336 mW 273 mW 105 mW PW-14 700 mW 5.6 mW/C 448 mW 364 mW -- recommended operating conditions Supply voltage, VDD Input voltage, VI MIN MAX 2.2 8 Common-mode input voltage, VIC VDD - VDD - Operating free-air temperature, TA -55 4 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 UNIT V VDD + - 1.5 VDD + - 1.5 V 125 C V SGLS131A - JULY 2002 - REVISED NOVEMBER 2003 TLC2272-EP electrical characteristics at specified free-air temperature, VDD = 5 V (unless otherwise noted) PARAMETER VIO Input offset voltage VIO Temperature coefficient of input offset voltage Input offset voltage longterm drift (see Note 5) IIO Input offset current IIB Input bias current VICR Common-mode input voltage TEST CONDITIONS High-level output voltage 25C VDD = 2.5 V, RS = 50 VIC = 0 V, VO = 0 V, Large-signal differential voltage amplification 2500 IOL = 5 mA RL = 10 k VIC = 2.5 V, VO = 1 V to 4 V RL = 1 m V 0.002 0.002 V/mo 25C 0.5 60 0.5 800 1 0 to 4 60 -0.3 to 4.2 1 4.85 Full range 4.85 25C 4.25 Full range 4.25 -0.3 to 4.2 4.85 4.93 4.85 4.65 4.25 V 4.65 4.25 0.01 25C 0.09 Full range 0.01 0.15 0.09 0.15 0.9 Full range 10 Full range 10 35 0.15 0.15 1.5 0.9 1.5 25C pA 4.99 4.93 25C 25C pA V 0 to 3.5 4.99 25C 60 800 0 to 4 0 to 3.5 60 800 800 25C IOL = 500 A 950 1500 UNIT 25C Full range VIC = 2.5 V, 300 MAX V/C |VIO | 5 mV IOL = 50 A TYP 2 25C IOH = - 200 A MIN 2 25C VIC = 2.5 V, AVD 300 Full range VIC = 2.5 V, Low-level output voltage MAX Full range RS = 50 , TLC2272A-EP TYP 3000 25C 25 C to 125C IOH = - 1 mA VOL TLC2272-EP MIN Full range IOH = - 20 A VOH TA V 1.5 1.5 10 35 10 V/mV 25C 175 175 rid Differential input resistance 25C 1012 1012 ri Common-mode input resistance 25C 1012 1012 ci Common-mode input capacitance f = 10 kHz, P package 25C 8 8 pF zo Closed-loop output impedance f = 1 MHz, AV = 10 25C 140 140 CMRR Common-mode rejection ratio VIC = 0 V to 2.7 V, VO = 2.5 V, RS = 50 25C 70 Full range 70 kSVR Supply-voltage rejection ratio (VDD /VIO) VDD = 4.4 V to 16 V, VIC = VDD /2, No load 25C 80 Full range 80 IDD Supply current VO = 2.5 V, Full range 25C No load 75 70 75 dB 70 95 80 95 dB 80 2.2 3 3 2.2 3 3 mA Full range is -55C to 125C for M level part. Referenced to 2.5 V NOTE 5: Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150C extrapolated to TA = 25C using the Arrhenius equation and assuming an activation energy of 0.96 eV. POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 5 SGLS131A - JULY 2002 - REVISED NOVEMBER 2003 TLC2272-EP operating characteristics at specified free-air temperature, VDD = 5 V PARAMETER TEST CONDITIONS TLC2272-EP TA MIN TYP 25C 2.3 3.6 Full range 1.7 TLC2272A-EP MAX MIN TYP 2.3 3.6 Slew rate at unity gain VO = 1.25 V to 2.75 V, RL = 10 k, CL = 100 pF Equivalent input noise voltage f = 10 Hz 25C 50 50 Vn f = 1 kHz 25C 9 9 Peak-to-peak equivalent input noise voltage f = 0.1 Hz to 1 Hz 25C 1 1 VNPP f = 0.1 Hz to 10 Hz 25C 1.4 1.4 In Equivalent input noise current 25C 0.6 0.6 THD + N Total harmonic distortion plus noise VO = 0.5 V to 2.5 V, f = 20 kHz, k , RL = 10 k Gain-bandwidth product f = 10 kHz, CL = 100 pF Maximum outputswing bandwidth VO(PP) = 2 V, RL = 10 k, Settling time AV = - 1, Step = 0.5 V to 2.5 V, RL = 10 k, CL = 100 pF SR BOM ts m Phase margin at unity gain RL = 10 k, AV = 1 AV = 10 AV = 100 RL = 10 k, AV = 1, CL = 100 pF 6 V/s V V fA/Hz 0.0013% 0.004% 0.004% 0.03% 0.03% 25C 2.18 2.18 MHz 25C 1 1 MHz 1.5 1.5 2.6 2.6 25C 50 50 25C 10 10 25C 25 C To 0.01% POST OFFICE BOX 655303 nV/Hz 0.0013% ss 25C Gain margin Full range is -55C to 125C for M level part. Referenced to 2.5 V UNIT 1.7 To 0.1% CL = 100 pF MAX * DALLAS, TEXAS 75265 dB SGLS131A - JULY 2002 - REVISED NOVEMBER 2003 TLC2272-EP electrical characteristics at specified free-air temperature, VDD = 5 V (unless otherwise noted) PARAMETER VIO Input offset voltage VIO Temperature coefficient of input offset voltage Input offset voltage long-term drift (see Note 5) IIO Input offset current IIB Input bias current VICR Common-mode input voltage TEST CONDITIONS 25C VIC = 0 V, RS = 50 VO = 0 V, 2500 VO = 4 V IO = 5 mA RL = 10 k RL = 1 m V 0.002 0.002 V/mo 25C 0.5 60 0.5 800 1 -5 to 4 60 -5.3 to 4.2 1 25C 4.85 4.85 25C 4.25 Full range 4.25 25C -4.85 Full range -4.85 25C -3.5 Full range -3.5 25C 20 Full range 20 25C pA pA V 4.99 4.93 4.85 4.93 4.85 4.65 4.25 V 4.65 4.25 -4.99 25C -5.3 to 4.2 -5 to 3.5 4.99 Full range 60 800 -5 to 4 -5 to 3.5 60 800 800 25C IO = 500 A 950 1500 UNIT 25C Full range VIC = 0 V, 300 MAX V/C |VIO | 5 mV IO = 50 A TYP 2 25C C 25 IO = - 200 A MIN 2 25C VIC = 0 V, Large-signal differential voltage amplification 300 Full range VIC = 0 V, AVD MAX Full range RS = 50 ,, TLC2272A-EP TYP 3000 25C 25 C to 125C IO = - 1 mA Maximum negative peak VOM - output voltage TLC2272-EP MIN Full range IO = - 20 A Maximum positive peak VOM + output voltage TA -4.99 -4.91 -4.85 -4.91 -4.85 -4.1 -3.5 V -4.1 -3.5 50 20 50 20 V/mV rid Differential input resistance 25C 300 1012 ri Common-mode input resistance 25C 1012 1012 ci Common-mode input capacitance f = 10 kHz, P package 25C 8 8 pF zo Closed-loop output impedance f = 1 MHz, AV = 10 25C 130 130 CMRR Common-mode rejection ratio VIC = - 5 V to 2.7 V, VO = 0 V, RS = 50 25C 75 Full range 75 kSVR Supply-voltage rejection ratio (VDD /VIO) VDD = 2.2 V to 8 V, VIC = 0 V, No load 25C 80 Full range 80 IDD Supply current VO = 2.5 V, 25C No load Full range 80 75 300 1012 80 dB 75 95 80 95 dB 80 2.4 3 3 2.4 3 3 mA Full range is -55C to 125C for M level part. NOTE 5: Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150C extrapolated to TA = 25C using the Arrhenius equation and assuming an activation energy of 0.96 eV. POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 7 SGLS131A - JULY 2002 - REVISED NOVEMBER 2003 TLC2272-EP operating characteristics at specified free-air temperature, VDD = 5 V PARAMETER TEST CONDITIONS TLC2272-EP TA MIN TYP 25C 2.3 3.6 Full range 1.7 TLC2272A-EP MAX MIN TYP 2.3 3.6 Slew rate at unity gain VO = 1 V, CL = 100 pF Equivalent input noise voltage f = 10 Hz 25C 50 50 Vn f = 1 kHz 25C 9 9 Peak-to-peak equivalent input noise voltage f = 0.1 Hz to 1 Hz 25C 1 1 VNPP f = 0.1 Hz to 10 Hz 25C 1.4 1.4 In Equivalent input noise current 25C 0.6 0.6 THD + N Total harmonic distortion plus noise VO = 2.3 V RL = 10 k, f = 20 kHz AV = 1 AV = 10 Gain-bandwidth product f = 10 kHz, CL = 100 pF RL = 10 k, Maximum output-swing bandwidth VO(PP) = 4.6 V, RL = 10 k, AV = 1, CL = 100 pF Settling time AV = - 1, Step = - 2.3 V to 2.3 V, RL = 10 k, CL = 100 pF SR BOM ts m Phase margin at unity gain RL = 10 k, RL = 10 k, 8 V/s V V fA/Hz 0.0011% 0.004% 0.004% 0.03% 0.03% 25C 2.25 2.25 MHz 25C 0.54 0.54 MHz 1.5 1.5 3.2 3.2 25C 52 52 25C 10 10 25C 25 C ss 25C To 0.01% POST OFFICE BOX 655303 nV/Hz 0.0011% To 0.1% Gain margin Full range is -55C to 125C for M level part. UNIT 1.7 AV = 100 CL = 100 pF MAX * DALLAS, TEXAS 75265 dB SGLS131A - JULY 2002 - REVISED NOVEMBER 2003 TLC2274-EP electrical characteristics at specified free-air temperature, VDD = 5 V (unless otherwise noted) PARAMETER VIO Input offset voltage VIO Temperature coefficient of input offset voltage Input offset voltage long-term drift (see Note 5) IIO Input offset current IIB Input bias current VICR Common-mode input voltage TA TEST CONDITIONS 25C High-level output voltage VIC = 0 V, RS = 50 AVD Large-signal differential voltage amplification 2500 V 0.002 0.002 V/mo 25C 0.5 60 0.5 800 1 0 to 4 60 Full range 0 to 3.5 -0.3 to 4.2 1 25C 4.85 4.85 25C 4.25 Full range 4.25 0 to 4 -0.3 to 4.2 pA pA V 0 to 3.5 4.99 4.93 4.85 4.93 4.85 4.65 4.25 V 4.65 4.25 25C 0.01 25C 0.09 Full range 0.01 0.15 0.09 0.15 25C 60 800 4.99 Full range 60 800 800 25C VIC = 2.5 V, IOL = 500 A 950 1500 UNIT 25C 25C C 25 IOL = 50 A 300 MAX V/C |VIO | 5 mV IOH = - 200 A TYP 2 25C RS = 50 ,, MIN 2 Full range VIC = 2.5 V, Low-level output voltage 300 Full range IOH = - 1 mA VOL MAX 3000 25C 25 C to 125C VDD = 2.5 V, VO = 0 V, TLC2274A-EP TYP Full range IOH = - 20 A VOH TLC2274-EP MIN 0.9 0.15 1.5 0.9 VIC = 2.5 V, IOL = 5 mA RL = 10 k 25C 10 VIC = 2.5 V, VO = 1 V to 4 V Full range 10 RL = 1 M 25C 175 175 Full range 1.5 35 0.15 V 1.5 1.5 10 35 10 V/mV rid Differential input resistance 25C 1012 1012 ri Common-mode input resistance 25C 1012 1012 ci Common-mode input capacitance f = 10 kHz, N package 25C 8 8 pF zo Closed-loop output impedance f = 1 MHz, AV = 10 25C 140 140 CMRR Common-mode rejection ratio VIC = 0 V to 2.7 V, VO = 2.5 V, RS = 50 25C 70 Full range 70 kSVR Supply-voltage rejection ratio (VDD /VIO) VDD = 4.4 V to 16 V, VIC = VDD /2, No load 25C 80 Full range 80 IDD Supply current VO = 2.5 V, Full range 25C No load 75 70 75 dB 70 95 80 95 dB 80 4.4 6 6 4.4 6 6 mA Full range is -55C to 125C for M level part. Referenced to 2.5 V NOTE 5: Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150C extrapolated to TA = 25C using the Arrhenius equation and assuming an activation energy of 0.96 eV. POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 9 SGLS131A - JULY 2002 - REVISED NOVEMBER 2003 TLC2274-EP operating characteristics at specified free-air temperature, VDD = 5 V PARAMETER TEST CONDITIONS CL = 100 pF TLC2274-EP TA MIN TYP 25C 2.3 3.6 Full range 1.7 TLC2274A-EP MAX MIN TYP 2.3 3.6 Slew rate at unity gain VO = 0.5 V to 2.5 V, RL = 10 k, Equivalent input noise voltage f = 10 Hz 25C 50 50 Vn f = 1 kHz 25C 9 9 Peak-to-peak equivalent input noise voltage f = 0.1 Hz to 1 Hz 25C 1 1 VN(PP) f = 0.1 Hz to 10 Hz 25C 1.4 1.4 In Equivalent input noise current 25C 0.6 0.6 THD + N Total harmonic distortion plus noise SR BOM ts m VO = 0.5 V to 2.5 V, f = 20 kHz, k RL = 10 k AV = 1 AV = 10 Gain-bandwidth product f = 10 kHz, CL = 100 pF RL = 10 k, Maximum output-swing bandwidth VO(PP) = 2 V, RL = 10 k, AV = 1, CL = 100 pF Settling time AV = - 1, Step = 0.5 V to 2.5 V, RL = 10 k, CL = 100 pF Phase margin at unity gain RL = 10 k, 10 V/s V V fA /Hz 0.0013% 0.004% 0.004% 0.03% 0.03% 25C 2.18 2.18 MHz 25C 1 1 MHz 1.5 1.5 2.6 2.6 25C 50 50 25C 10 10 25C 25 C ss 25C To 0.01% POST OFFICE BOX 655303 nV/Hz 0.0013% To 0.1% Gain margin Full range is -55C to 125C for M level part. Referenced to 2.5 V UNIT 1.7 AV = 100 CL = 100 pF MAX * DALLAS, TEXAS 75265 dB SGLS131A - JULY 2002 - REVISED NOVEMBER 2003 TLC2274-EP electrical characteristics at specified free-air temperature, VDD = 5 V (unless otherwise noted) PARAMETER TA TEST CONDITIONS TLC2274-EP MIN 25C VIO Input offset voltage VIO Temperature coefficient of input offset voltage Input offset voltage longterm drift (see Note 5) IIO Input offset current IIB Input bias current VICR Common-mode input voltage 25C 25 C to 125C VO = 0 V, AVD 950 1500 V V 25C 0.002 0.002 V/mo 25C 0.5 Full range 60 0.5 800 1 -5 to 4 60 -5.3 to 4.2 1 25C IO = - 200 A A 25C 4.85 Full range 4.85 25C 4.25 Full range 4.25 VIC = 0 V, IO = 50 A 25C IO = 500 A A 25C -4.85 VIC = 0 V, Full range -4.85 25C -3.5 Full range -3.5 20 RL = 10 k Full range 20 RL = 1 M 25C pA V 4.99 4.93 4.85 4.93 4.85 4.65 4.25 V 4.65 4.25 -4.99 25C -5.3 to 4.2 -5 to 3.5 4.99 pA 60 800 -5 to 4 -5 to 3.5 60 800 800 IO = - 20 A VO = 4 V 300 UNIT V/C V/C |VIO | 5 mV IO = 5 mA MAX 2 25C RS = 50 ,, TYP 2 Full range VIC = 0 V, Large-signal differential voltage amplification 2500 Full range IO = - 1 mA Maximum negative peak VOM - output voltage 300 MIN 3000 25C Maximum positive peak VOM + output voltage MAX Full range VIC = 0 V, RS = 50 TLC2274A-EP TYP -4.99 -4.91 -4.85 -4.91 -4.85 -4.1 -3.5 V -4.1 -3.5 50 20 50 20 V/mV rid Differential input resistance 25C 300 1012 ri Common-mode input resistance 25C 1012 1012 ci Common-mode input capacitance f = 10 kHz, N package 25C 8 8 pF zo Closed-loop output impedance f = 1 MHz, AV = 10 25C 130 130 CMRR Common-mode rejection ratio VIC = - 5 V to 2.7 V VO = 0 V, RS = 50 kSVR Supply-voltage rejection ratio (VDD /VIO) VDD = 2.2 V to 8 V, VIC = 0 V, No load IDD Supply current VO = 0 V, No load 25C 75 Full range 75 25C 80 Full range 80 25C Full range 80 75 300 1012 80 dB 75 95 80 95 dB 80 4.8 6 6 4.8 6 6 mA Full range is -55C to 125C for M level part. NOTE 5: Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150C extrapolated to TA = 25C using the Arrhenius equation and assuming an activation energy of 0.96 eV. POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 11 SGLS131A - JULY 2002 - REVISED NOVEMBER 2003 TLC2274-EP operating characteristics at specified free-air temperature, VDD = 5 V PARAMETER TEST CONDITIONS TLC2274-EP TA MIN TYP 25C 2.3 3.6 Full range 1.7 TLC2274A-EP MAX MIN TYP 2.3 3.6 Slew rate at unity gain VO = 2.3 V, CL = 100 pF Equivalent input noise voltage f = 10 Hz 25C 50 50 Vn f = 1 kHz 25C 9 9 Peak-to-peak equivalent input noise voltage f = 0.1 Hz to 1 Hz 25C 1 1 VN(PP) f = 0.1 Hz to 10 Hz 25C 1.4 1.4 In Equivalent input noise current 25C 0.6 0.6 THD + N Total harmonic distortion plus noise VO = 2.3 V, RL = 10 k, f = 20 kHz Gain-bandwidth product f = 10 kHz, CL = 100 pF RL = 10 k, Maximum output-swing bandwidth VO(PP) = 4.6 V, RL = 10 k, AV = 1, CL = 100 pF Settling time AV = - 1, To 0.1% Step = - 2.3 V to 2.3 V, RL = 10 k, To 0.01% CL = 100 pF SR BOM ts m Phase margin at unit gain RL = 10 k, RL = 10 k, AV = 1 AV = 10 Gain margin Full range is -55C to 125C for M level part. 12 POST OFFICE BOX 655303 UNIT V/s 1.7 nV/Hz V V fA /Hz 0.0011% 0.0011% 0.004% 0.004% 0.03% 0.03% 25C 2.25 2.25 MHz 25C 0.54 0.54 MHz 1.5 1.5 3.2 3.2 25C 52 52 25C 10 10 25C 25 C AV = 100 CL = 100 pF MAX ss 25C * DALLAS, TEXAS 75265 dB SGLS131A - JULY 2002 - REVISED NOVEMBER 2003 TYPICAL CHARACTERISTICS Table of Graphs FIGURE VIO Input offset voltage Distribution vs Common-mode voltage VIO IIB /IIO Input offset voltage temperature coefficient Distribution Input bias and input offset current vs Free-air temperature 11 VI Input voltage vs Supply voltage vs Free-air temperature 12 13 VOH VOL High-level output voltage vs High-level output current 14 Low-level output voltage vs Low-level output current 15, 16 VOM + VOM - Maximum positive peak output voltage vs Output current 17 Maximum negative peak output voltage vs Output current 18 VO(PP) Maximum peak-to-peak output voltage vs Frequency 19 IOS Short-circuit output current vs Supply voltage vs Free-air temperature 20 21 VO Output voltage vs Differential input voltage Large-signal differential voltage amplification vs Load resistance Large-signal differential voltage amplification and phase margin vs Frequency 25, 26 AVD 1-4 5, 6 7 - 10 22, 23 24 Large-signal differential voltage amplification vs Free-air temperature 27, 28 zo Output impedance vs Frequency 29, 30 CMRR Common-mode rejection ratio vs Frequency vs Free-air temperature 31 32 kSVR Supply-voltage rejection ratio vs Frequency vs Free-air temperature 33, 34 35 IDD Supply current vs Supply voltage vs Free-air temperature 36, 37 38, 39 SR Slew rate vs Load capacitance vs Free-air temperature 40 41 VO Vn Inverting large-signal pulse response 42, 43 Voltage-follower large-signal pulse response 44, 45 Inverting small-signal pulse response 46, 47 Voltage-follower small-signal pulse response 48, 49 Equivalent input noise voltage vs Frequency Noise voltage over a 10-second period THD + N m 50, 51 52 Integrated noise voltage vs Frequency 53 Total harmonic distortion plus noise vs Frequency 54 Gain-bandwidth product vs Supply voltage vs Free-air temperature 55 56 Phase margin vs Load capacitance 57 Gain margin vs Load capacitance 58 NOTE: For all graphs where VDD = 5 V, all loads are referenced to 2.5 V. POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 13 SGLS131A - JULY 2002 - REVISED NOVEMBER 2003 TYPICAL CHARACTERISTICS DISTRIBUTION OF TLC2272 INPUT OFFSET VOLTAGE DISTRIBUTION OF TLC2272 INPUT OFFSET VOLTAGE 15 20 891 Amplifiers From 2 Wafer Lots VDD = 2.5 V TA = 25C Percentage of Amplifiers - % Percentage of Amplifiers - % 20 10 5 0 -1.6 -1.2 -0.8 -0.4 0 0.4 0.8 1.2 15 891 Amplifiers From 2 Wafer Lots VDD = 5 V TA = 25C 10 5 0 -1.6 -1.2 -0.8 -0.4 1.6 Figure 1 0.8 1.2 1.6 Figure 2 DISTRIBUTION OF TLC2274 INPUT OFFSET VOLTAGE DISTRIBUTION OF TLC2274 INPUT OFFSET VOLTAGE 20 20 992 Amplifiers From 2 Wafer Lots VDD = 5 V Percentage of Amplifiers - % 992 Amplifiers From 2 Wafer Lots VDD = 2.5 V Percentage of Amplifiers - % 0.4 VIO - Input Offset Voltage - mV VIO - Input Offset Voltage - mV 15 10 5 0 -1.6 -1.2 -0.8 -0.4 0 0.4 0.8 1.2 1.6 15 10 5 0 -1.6 -1.2 -0.8 VIO - Input Offset Voltage - mV -0.4 0 Figure 4 POST OFFICE BOX 655303 0.4 0.8 VIO - Input Offset Voltage - mV Figure 3 14 0 * DALLAS, TEXAS 75265 1.2 1.6 SGLS131A - JULY 2002 - REVISED NOVEMBER 2003 TYPICAL CHARACTERISTICS INPUT OFFSET VOLTAGE vs COMMON-MODE VOLTAGE INPUT OFFSET VOLTAGE vs COMMON-MODE VOLTAGE 1 VDD = 5 V TA = 25C RS = 50 VIO - Input Offset Voltage - mV VIO VIO VIO - Input Offset Voltage - mV 1 0.5 0 -0.5 -1 -1 0 2 1 3 0.5 0 -0.5 -1 -6 -5 -4 -3 -2 5 4 VDD = 5 V TA = 25C RS = 50 VIC - Common-Mode Voltage - V 1 2 3 4 5 Figure 6 DISTRIBUTION OF TLC2272 vs INPUT OFFSET VOLTAGE TEMPERATURE COEFFICIENT DISTRIBUTION OF TLC2272 vs INPUT OFFSET VOLTAGE TEMPERATURE COEFFICIENT 25 25 128 Amplifiers From 2 Wafer Lots VDD = 2.5 V P Package 25C to 125C Percentage of Amplifiers - % Percentage of Amplifiers - % 0 VIC - Common-Mode Voltage - V Figure 5 20 -1 15 10 20 128 Amplifiers From 2 Wafer Lots VDD = 5 V P Package 25C to 125C 15 10 5 5 0 -5 -4 0 -5 -4 -3 -2 -1 0 1 2 3 4 5 VIO - Temperature Coefficient - V/C -3 -2 -1 0 1 2 3 4 5 VIO - Temperature Coefficient - V/C Figure 7 Figure 8 Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices. POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 15 SGLS131A - JULY 2002 - REVISED NOVEMBER 2003 TYPICAL CHARACTERISTICS 25 25 128 Amplifiers From 2 Wafer Lots VDD = 2.5 V N Package TA = 25C to 125C 20 Percentage of Amplifiers - % Percentage of Amplifiers - % DISTRIBUTION OF TLC2274 vs INPUT OFFSET VOLTAGE TEMPERATURE COEFFICIENT DISTRIBUTION OF TLC2274 vs INPUT OFFSET VOLTAGE TEMPERATURE COEFFICIENT 15 10 5 0 -5 128 Amplifiers From 2 Wafer Lots VDD = 2.5 V N Package TA = 25C to 125C 20 15 10 5 0 -4 -3 -2 -1 0 2 1 3 4 -5 5 -4 -3 Figure 9 2 3 4 INPUT BIAS AND INPUT OFFSET CURRENT vs FREE-AIR TEMPERATURE INPUT VOLTAGE vs SUPPLY VOLTAGE 35 12 VDD = 2.5 V VIC = 0 V VO = 0 V RS = 50 TA = 25C RS = 50 10 8 6 25 20 IIB 15 IIO 10 4 2 |VIO| 5 mV 0 -2 -4 -6 5 -8 0 - 10 25 45 65 85 105 125 2 TA - Free-Air Temperature - C 3 4 5 6 7 |VDD | - Supply Voltage - V Figure 11 Figure 12 Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices. 16 5 Figure 10 V I - Input Voltage - V IIB I IO - Input Bias and Input Offset Currents - pA IIB and IIO 1 VIO - Temperature Coefficient - V/C VIO - Temperature Coefficient - V/C 30 -1 0 -2 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 8 SGLS131A - JULY 2002 - REVISED NOVEMBER 2003 TYPICAL CHARACTERISTICS INPUT VOLTAGE vs FREE-AIR TEMPERATURE HIGH-LEVEL OUTPUT VOLTAGE vs HIGH-LEVEL OUTPUT CURRENT 5 6 VDD = 5 V V0H V OH - High-Level Output Voltage - V VDD = 5 V V I - Input Voltage - V 4 3 |VIO| 5 mV 2 1 0 -1 -75 - 50 5 4 TA = 125C 3 TA = 25C 2 TA = - 55C 1 0 - 25 0 25 50 75 100 125 0 TA - Free-Air Temperature - C 1 Figure 13 4 LOW-LEVEL OUTPUT VOLTAGE vs LOW-LEVEL OUTPUT CURRENT 1.2 1.4 VOL VOL - Low-Level Output Voltage - V VDD = 5 V TA = 25C VOL VOL - Low-Level Output Voltage - V 3 Figure 14 LOW-LEVEL OUTPUT VOLTAGE vs LOW-LEVEL OUTPUT CURRENT 1 VIC = 0 V 0.8 VIC = 1.25 V 0.6 0.4 2 IOH - High-Level Output Current - mA VIC = 2.5 V 0.2 0 VDD = 5 V VIC = 2.5 V 1.2 1 TA = 125C 0.8 TA = 25C 0.6 TA = - 55C 0.4 0.2 0 0 1 2 3 4 IOL - Low-Level Output Current - mA 5 0 5 1 2 3 4 IOL - Low-Level Output Current - mA Figure 15 6 Figure 16 Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices. POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 17 SGLS131A - JULY 2002 - REVISED NOVEMBER 2003 TYPICAL CHARACTERISTICS 5 VDD = 5 V 4 TA = - 55C TA = 25C 3 TA = 125C 2 1 0 1 2 3 4 5 MAXIMUM NEGATIVE PEAK OUTPUT VOLTAGE vs OUTPUT CURRENT V OM - - Maximum Negative Peak Output Voltage - V V OM + - Maximum Positive Peak Output Voltage - V MAXIMUM POSITIVE PEAK OUTPUT VOLTAGE vs OUTPUT CURRENT -3.8 VDD = 5 V VIC = 0 V -4 TA = 125C -4.2 TA = 25C -4.4 TA = - 55C -4.6 -4.8 -5 0 1 |IO| - Output Current - mA 2 10 16 RL = 10 k TA = 25C 9 8 7 6 VDD = 5 V 4 VDD = 5 V 3 2 1 VID = - 100 mV 12 8 4 0 VID = 100 mV -4 VO = 0 V TA = 25C -8 0 100 k 1M 10 M 2 f - Frequency - Hz 3 4 5 6 7 |VDD | - Supply Voltage - V Figure 19 Figure 20 Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices. 18 6 SHORT-CIRCUIT OUTPUT CURRENT vs SUPPLY VOLTAGE IIOS OS - Short-Circuit Output Current - mA V(OPP) V O(PP) - Maximum Peak-to-Peak Output Voltage - V 5 Figure 18 MAXIMUM PEAK-TO-PEAK OUTPUT VOLTAGE vs FREQUENCY 10 k 4 IO - Output Current - mA Figure 17 5 3 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 8 SGLS131A - JULY 2002 - REVISED NOVEMBER 2003 TYPICAL CHARACTERISTICS SHORT-CIRCUIT OUTPUT CURRENT vs FREE-AIR TEMPERATURE IIOS OS - Short-Circuit Output Current - mA 15 OUTPUT VOLTAGE vs DIFFERENTIAL INPUT VOLTAGE 5 VO = 0 V VDD = 5 V VID = - 100 mV 11 VO - Output Voltage - V 4 7 -3 VDD = 5 V TA = 25C RL = 10 k VIC = 2.5 V 3 2 -1 VID = 100 mV 1 -5 -75 -50 -25 0 25 50 75 100 TA - Free-Air Temperature - C 0 -800 125 800 -400 0 400 VID - Differential Input Voltage - V Figure 21 Figure 22 LARGE-SIGNAL DIFFERENTIAL VOLTAGE AMPLIFICATION vs LOAD RESISTANCE OUTPUT VOLTAGE vs DIFFERENTIAL INPUT VOLTAGE VO - Output Voltage - V 3 1000 VDD = 5 V TA = 25C RL = 10 k VIC = 0 V VO = 1 V TA = 25C AVD AVD- Large-Signal Differential Voltage Amplification - dB 5 1200 1 AA AA AA -1 -3 -5 0 250 500 750 1000 -1000 -750 -500 -250 VID - Differential Input Voltage - V 100 VDD = 5 V 10 VDD = 5 V 1 0.1 0.1 Figure 23 1 10 RL - Load Resistance - k 100 Figure 24 Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices. POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 19 SGLS131A - JULY 2002 - REVISED NOVEMBER 2003 TYPICAL CHARACTERISTICS LARGE-SIGNAL DIFFERENTIAL VOLTAGE AMPLIFICATION AND PHASE MARGIN vs FREQUENCY 80 135 40 90 20 45 0 0 -20 om m - Phase Margin AVD AVD- Large-Signal Differential Voltage Amplification - dB 60 AA AA AA 180 VDD = 5 V RL = 10 k CL = 100 pF TA = 25C -45 -40 1k 10 k 100 k 1M -90 10 M f - Frequency - Hz Figure 25 LARGE-SIGNAL DIFFERENTIAL VOLTAGE AMPLIFICATION AND PHASE MARGIN vs FREQUENCY VDD = 5 V RL = 10 k CL = 100 pF TA = 25C AVD AVD- Large-Signal Differential Voltage Amplification - dB 60 AA AA AA 135 40 90 20 45 0 0 -20 -45 -40 1k 10 k 100 k 1M f - Frequency - Hz Figure 26 20 180 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 -90 10 M om m - Phase Margin 80 SGLS131A - JULY 2002 - REVISED NOVEMBER 2003 TYPICAL CHARACTERISTICS LARGE-SIGNAL DIFFERENTIAL VOLTAGE AMPLIFICATION vs FREE-AIR TEMPERATURE LARGE-SIGNAL DIFFERENTIAL VOLTAGE AMPLIFICATION vs FREE-AIR TEMPERATURE 1k VDD = 5 V VIC = 0 V VO = 4 V VDD = 5 V VIC = 2.5 V VO = 1 V to 4 V AVD AVD- Large-Signal Differential Voltage Amplification - V/mV AVD AVD- Large-Signal Differential Voltage Amplification - V/mV 1k RL = 1 M 100 AA AA -50 100 AA AA RL = 10 k 10 -75 RL = 1 M -25 0 25 50 75 100 TA - Free-Air Temperature - C RL = 10 k 10 -75 125 -50 -25 0 25 50 75 100 TA - Free-Air Temperature - C Figure 27 Figure 28 OUTPUT IMPEDANCE vs FREQUENCY OUTPUT IMPEDANCE vs FREQUENCY 1000 1000 VDD = 5 V TA = 25C 100 zo O zo - Output Impedance - zo O zo - Output Impedance - VDD = 5 V TA = 25C AV = 100 10 AV = 10 1 0.1 100 125 AV = 1 100 AV = 100 10 AV = 10 1 AV = 1 1k 10 k 100 k 1M 0.1 100 f - Frequency - Hz 1k 10 k 100 k 1M f - Frequency - Hz Figure 29 Figure 30 Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices. POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 21 SGLS131A - JULY 2002 - REVISED NOVEMBER 2003 TYPICAL CHARACTERISTICS COMMON-MODE REJECTION RATIO vs FREQUENCY 90 TA = 25C CMRR - Common-Mode Rejection Ratio - dB CMRR - Common-Mode Rejection Ratio - dB 100 COMMON-MODE REJECTION RATIO vs FREE-AIR TEMPERATURE VDD = 5 V 80 VDD = 5 V 60 40 20 86 82 VIC = - 5 V to 2.7 V 78 VDD = 5 V 74 0 10 100 1k 10 k 100 k 1M VDD = 5 V 70 -75 10 M VIC = 0 V to 2.7 V -50 -25 0 Figure 31 100 125 100 VDD = 5 V TA = 25C kSVR k SVR - Supply-Voltage Rejection Ratio - dB kSVR k SVR - Supply-Voltage Rejection Ratio - dB 75 SUPPLY-VOLTAGE REJECTION RATIO vs FREQUENCY 100 80 60 kSVR+ 40 kSVR - 20 0 100 1k 10 k 100 k 1M 10 M VDD = 5 V TA = 25C 80 60 kSVR+ 40 kSVR - 20 0 -20 10 f - Frequency - Hz 100 1k 10 k Figure 34 POST OFFICE BOX 655303 100 k f - Frequency - Hz Figure 33 22 50 Figure 32 SUPPLY-VOLTAGE REJECTION RATIO vs FREQUENCY -20 10 25 TA - Free-Air Temperature - C f - Frequency - Hz * DALLAS, TEXAS 75265 1M 10 M SGLS131A - JULY 2002 - REVISED NOVEMBER 2003 TYPICAL CHARACTERISTICS TLC2272 SUPPLY CURRENT vs SUPPLY VOLTAGE SUPPLY VOLTAGE REJECTION RATIO vs FREE-AIR TEMPERATURE 3 VDD = 2.2 V to 8 V VO = 0 V VO = 0 V No Load 2.4 105 IIDD DD - Supply Current - mA kSVR k SVR - Supply Voltage Rejection Ratio - dB 110 100 95 TA = 25C TA = - 55C 1.2 TA = 125C 0.6 90 85 -75 1.8 0 -50 -25 0 25 50 75 100 0 125 1 TA - Free-Air Temperature - C 2 3 4 5 6 |VDD | - Supply Voltage - V Figure 35 100 125 TLC2272 SUPPLY CURRENT vs FREE-AIR TEMPERATURE 3 6 VO = 0 V No Load VDD = 5 V VO = 0 V 2.4 3.6 IIDD DD - Supply Current - mA 4.8 IIDD DD - Supply Current - mA 8 Figure 36 TLC2274 SUPPLY CURRENT vs SUPPLY VOLTAGE TA = 25C TA = - 55C 2.4 TA = 125C 1.2 0 7 VDD = 5 V VO = 2.5 V 1.8 1.2 0.6 0 1 2 3 4 5 6 7 8 0 -75 -50 -25 0 25 50 75 TA - Free-Air Temperature - C |VDD | - Supply Voltage - V Figure 37 Figure 38 Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices. POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 23 SGLS131A - JULY 2002 - REVISED NOVEMBER 2003 TYPICAL CHARACTERISTICS TLC2274 SUPPLY CURRENT vs FREE-AIR TEMPERATURE SLEW RATE vs LOAD CAPACITANCE 5 6 VDD = 5 V VO = 0 V 4 SR - Slew Rate - V/ s IIDD DD - Supply Current - mA 4.8 VDD = 5 V VO = 2.5 V 3.6 2.4 SR - 3 2 SR + 1 1.2 0 -75 VDD = 5 V AV = - 1 TA = 25C -50 -25 0 25 50 75 100 0 10 125 100 1k CL - Load Capacitance - pF TA - Free-Air Temperature - C Figure 39 Figure 40 SLEW RATE vs FREE-AIR TEMPERATURE INVERTING LARGE-SIGNAL PULSE RESPONSE 5 5 VDD = 5 V RL = 10 k CL = 100 pF TA = 25C AV = - 1 SR - 4 VO - Output Voltage - mV VO SR - Slew Rate - V/ s 4 SR + 3 2 VDD = 5 V RL = 10 k CL = 100 pF AV = 1 1 0 -75 10 k 3 2 1 0 -50 -25 0 25 50 75 100 125 0 TA - Free-Air Temperature - C 1 2 3 4 5 6 7 8 t - Time - s Figure 41 Figure 42 Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices. 24 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 9 SGLS131A - JULY 2002 - REVISED NOVEMBER 2003 TYPICAL CHARACTERISTICS VOLTAGE-FOLLOWER LARGE-SIGNAL PULSE RESPONSE INVERTING LARGE-SIGNAL PULSE RESPONSE 5 3 2 4 VO - Output Voltage - V VO 4 V VO O - Output Voltage - V 5 VDD = 5 V RL = 10 k CL = 100 pF TA = 25C AV = - 1 1 0 -1 -2 VDD = 5 V RL = 10 k CL = 100 pF AV = 1 TA = 25C 3 2 -3 1 -4 -5 0 1 2 3 4 5 6 7 8 0 9 0 1 2 3 t - Time - s Figure 43 5 6 7 8 9 Figure 44 VOLTAGE-FOLLOWER LARGE-SIGNAL PULSE RESPONSE 5 INVERTING SMALL-SIGNAL PULSE RESPONSE 2.65 VDD = 5 V RL = 10 k CL = 100 pF TA = 25C AV = 1 3 2 VDD = 5 V RL = 10 k CL = 100 pF TA = 25C AV = -1 2.6 VO - Output Voltage - V VO 4 VO - Output Voltage - V VO 4 t - Time - s 1 0 -1 -2 -3 2.55 2.5 2.45 -4 -5 2.4 0 1 2 3 4 5 6 7 8 9 0 0.5 t - Time - s 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5 t - Time - s Figure 45 Figure 46 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 25 SGLS131A - JULY 2002 - REVISED NOVEMBER 2003 TYPICAL CHARACTERISTICS VOLTAGE-FOLLOWER SMALL-SIGNAL PULSE RESPONSE INVERTING SMALL-SIGNAL PULSE RESPONSE 2.65 VDD = 5 V RL = 10 k CL = 100 pF TA = 25C AV = 1 50 VDD = 5 V RL = 10 k CL = 100 pF TA = 25C AV = 1 2.6 VO - Output Voltage - V VO VO - Output Voltage - mV VO 100 0 -50 2.55 2.5 2.45 -100 2.4 0 0.5 1 1.5 2 2.5 3 3.5 4 0 t - Time - s Figure 47 Figure 48 VDD = 5 V RL = 10 k CL = 100 pF TA = 25C AV = 1 Vn nV HzHz Vn - Equivalent Input Noise Voltage - nV/ VO - Output Voltage - mV VO 50 0 -50 -100 1.5 60 VDD = 5 V TA = 25C RS = 20 50 40 30 20 10 0 0 0.5 1 1.5 10 t - Time - s 100 1k f - Frequency - Hz Figure 50 Figure 49 26 1 EQUIVALENT INPUT NOISE VOLTAGE vs FREQUENCY VOLTAGE-FOLLOWER SMALL-SIGNAL PULSE RESPONSE 100 0.5 t - Time - s POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 10 k SGLS131A - JULY 2002 - REVISED NOVEMBER 2003 TYPICAL CHARACTERISTICS NOISE VOLTAGE OVER A 10 SECOND PERIOD 60 1000 VDD = 5 V TA = 25C RS = 20 50 VDD = 5 V f = 0.1 Hz to 10 Hz TA = 25C 750 500 Noise Voltage - nV Vn nV HzHz Vn - Equivalent Input Noise Voltage - nV/ EQUIVALENT INPUT NOISE VOLTAGE vs FREQUENCY 40 30 20 250 0 -250 -500 10 -750 -1000 0 10 100 1k f - Frequency - Hz 0 10 k 2 4 TOTAL HARMONIC DISTORTION PLUS NOISE vs FREQUENCY THD + N - Total Harmonic Distortion Plus Noise - % V RMS Integrated Noise Voltage - uVRMS 100 Calculated Using Ideal Pass-Band Filter Lower Frequency = 1 Hz TA= 25C 10 1 0.1 100 1k 10 Figure 52 INTEGRATED NOISE VOLTAGE vs FREQUENCY 10 8 t - Time - s Figure 51 1 6 10 k 100 k 1 VDD = 5 V TA = 25C RL = 10 k 0.1 AV = 100 0.01 AV = 10 0.001 AV = 1 0.0001 100 1k 10 k 100 k f - Frequency - Hz f - Frequency - Hz Figure 54 Figure 53 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 27 SGLS131A - JULY 2002 - REVISED NOVEMBER 2003 TYPICAL CHARACTERISTICS GAIN-BANDWIDTH PRODUCT vs FREE-AIR TEMPERATURE GAIN-BANDWIDTH PRODUCT vs SUPPLY VOLTAGE 3 f = 10 kHz RL = 10 k CL = 100 pF TA = 25C 2.4 VDD = 5 V f = 10 kHz RL = 10 k CL = 100 pF 2.8 Gain-Bandwidth Product - MHz Gain-Bandwidth Product - MHz 2.5 2.3 2.2 2.1 2.6 2.4 2.2 2 1.8 1.6 1.4 2 0 1 6 2 3 4 5 |VDD | - Supply Voltage - V 7 8 -75 -50 Figure 55 GAIN MARGIN vs LOAD CAPACITANCE 15 VDD = 5 V TA = 25C VDD = 5 V AV = 1 RL = 10 k TA = 25C Rnull = 100 60 12 Rnull = 50 Gain Margin - dB m - Phase Margin om 125 Figure 56 PHASE MARGIN vs LOAD CAPACITANCE 75 -25 0 25 50 75 100 TA - Free-Air Temperature - C 45 Rnull = 20 30 9 6 10 k 15 10 k 3 VDD + Rnull VI Rnull = 0 CL 0 10 VDD - Rnull = 10 100 1000 CL - Load Capacitance - pF 10000 0 10 Figure 57 100 1000 CL - Load Capacitance - pF 10000 Figure 58 Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices. 28 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 SGLS131A - JULY 2002 - REVISED NOVEMBER 2003 APPLICATION INFORMATION macromodel information Macromodel information provided was derived using Microsim Parts, the model generation software used with Microsim PSpice. The Boyle macromodel (see Note 6) and subcircuit in Figure 59 were generated using the TLC227x typical electrical and operating characteristics at TA = 25C. Using this information, output simulations of the following key parameters can be generated to a tolerance of 20% (in most cases): D D D D D D D D D D D D Maximum positive output voltage swing Maximum negative output voltage swing Slew rate Quiescent power dissipation Input bias current Open-loop voltage amplification Unity gain frequency Common-mode rejection ratio Phase margin DC output resistance AC output resistance Short-circuit output current limit NOTE 6: G. R. Boyle, B. M. Cohn, D. O. Pederson, and J. E. Solomon, "Macromodeling of Integrated Circuit Operational Amplifiers", IEEE Journal of Solid-State Circuits, SC-9, 353 (1974). 99 3 VCC + 9 RSS 92 FB + 10 VC J1 DP J2 IN + 11 RD1 VAD DC 12 C1 R2 - 53 HLIM - C2 6 - - + VIN + GCM GA VLIM 8 - RD2 54 4 - 7 60 + - + DIP 91 + VIP 90 RO2 VB IN - VCC - - + ISS RP 2 1 DIN EGND + - RO1 DE 5 + VE OUT .SUBCKT TLC227x 1 2 3 4 5 C1 11 1214E-12 C2 6 760.00E-12 DC 5 53DX DE 54 5DX DLP 90 91DX DLN 92 90DX DP 4 3DX EGND 99 0POLY (2) (3,0) (4,) 0 .5 .5 FB 99 0POLY (5) VB VC VE VLP VLN 0 + 984.9E3 -1E6 1E6 1E6 -1E6 GA 6 011 12 377.0E-6 GCM 0 6 10 99 134E-9 ISS 3 10DC 216.OE-6 HLIM 90 0VLIM 1K J1 11 210 JX J2 12 110 JX R2 6 9100.OE3 RD1 60 112.653E3 RD2 60 122.653E3 R01 8 550 R02 7 9950 RP 3 44.310E3 RSS 10 99925.9E3 VAD 60 4-.5 VB 9 0DC 0 VC 3 53 DC .78 VE 54 4DC .78 VLIM 7 8DC 0 VLP 91 0DC 1.9 VLN 0 92DC 9.4 .MODEL DX D (IS=800.0E-18) .MODEL JX PJF (IS=1.500E-12BETA=1.316E-3 + VTO=-.270) .ENDS Figure 59. Boyle Macromodel and Subcircuit PSpice and Parts are trademarks of MicroSim Corporation. ! '# #!$'" ! '# ") ! '# % &+ "'+ "'+ " *" &+ # $''+ %#", '' ") #%" %", )"#"# ") #! $" % $" " *)) ") ! ' '"#( POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 29 PACKAGE OPTION ADDENDUM www.ti.com 22-Sep-2008 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty TLC2272AMDREP ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLC2272AMDREPG4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLC2274AMDREP ACTIVE SOIC D 14 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLC2274AMPWREP ACTIVE TSSOP PW 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLC2274MDREP ACTIVE SOIC D 14 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLC2274MPWREP ACTIVE TSSOP PW 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM V62/03618-01XE ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM V62/03618-02UE ACTIVE TSSOP PW 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM V62/03618-02YE ACTIVE SOIC D 14 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM V62/03618-04UE ACTIVE TSSOP PW 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM V62/03618-04YE ACTIVE SOIC D 14 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM Lead/Ball Finish MSL Peak Temp (3) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI Addendum-Page 1 PACKAGE OPTION ADDENDUM www.ti.com 22-Sep-2008 to Customer on an annual basis. OTHER QUALIFIED VERSIONS OF TLC2272A-EP, TLC2274-EP, TLC2274A-EP : TLC2272A, TLC2274, TLC2274A * Catalog: TLC2272A-Q1, TLC2274-Q1, TLC2274A-Q1 * Automotive: * Military: TLC2272AM, TLC2274M, TLC2274AM NOTE: Qualified Version Definitions: - TI's standard catalog product * Catalog - Q100 devices qualified for high-reliability automotive applications targeting zero defects * Automotive * Military - QML certified for Military and Defense Applications Addendum-Page 2 PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 TAPE AND REEL INFORMATION *All dimensions are nominal Device TLC2272AMDREP Package Package Pins Type Drawing SOIC SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 TLC2274AMDREP SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1 TLC2274AMPWREP TSSOP PW 14 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1 TLC2274MDREP SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1 TLC2274MPWREP TSSOP PW 14 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1 Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TLC2272AMDREP SOIC TLC2274AMDREP SOIC D 8 2500 367.0 367.0 35.0 D 14 2500 333.2 345.9 28.6 TLC2274AMPWREP TLC2274MDREP TSSOP PW 14 2000 367.0 367.0 35.0 SOIC D 14 2500 333.2 345.9 TLC2274MPWREP 28.6 TSSOP PW 14 2000 367.0 367.0 35.0 Pack Materials-Page 2 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46C and to discontinue any product or service per JESD48B. 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