DS25BR100
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SNLS217F –MARCH 2007–REVISED APRIL 2013
AC Electrical Characteristics(1)
Over recommended operating supply and temperature ranges unless otherwise specified(2)(3)
Parameter Test Conditions Min Typ Max Units
LVDS OUTPUT AC SPECIFICATIONS (OUT+, OUT-)
tPHLD Differential Propagation Delay High to Low 350 465 ps
RL= 100Ω
tPLHD Differential Propagation Delay Low to High 350 465 ps
tSKD1 Pulse Skew |tPLHD −tPHLD|(4) 45 100 ps
tSKD2 Part to Part Skew(5) 45 150 ps
tLHT Rise Time 80 150 ps
RL= 100Ω
tHLT Fall Time 80 150 ps
JITTER PERFORMANCE WITH PE = OFF AND EQ = LOW(6)(7)
tRJ1A VID = 350 mV 2.5 Gbps 0.5 1 ps
Random Jitter (RMS Value) VCM = 1.2V
tRJ2A Input Test Channel D(8) Clock (RZ) 3.125 Gbps 0.5 1 ps
PE = 0, EQ = 0
tDJ1A VID = 350 mV 2.5 Gbps 1 16 ps
Deterministic Jitter (Peak to Peak) VCM = 1.2V
tDJ2A Input Test Channel D(9) K28.5 (NRZ) 3.125 Gbps 11 31 ps
PE = 0, EQ = 0
tTJ1A VID = 350 mV 2.5 Gbps 0.03 0.09 UIP-P
Total Jitter (Peak to Peak) VCM = 1.2V
tTJ2A Input Test Channel D(10) PRBS-23 (NRZ) 3.125 Gbps 0.06 0.14 UIP-P
PE = 0, EQ = 0
JITTER PERFORMANCE WITH PE = OFF AND EQ = MEDIUM(6)(7)
tRJ1B VID = 350 mV 2.5 Gbps 0.5 1 ps
Random Jitter (RMS Value) VCM = 1.2V
tRJ2B Input Test Channel E(8) Clock (RZ) 3.125 Gbps 0.5 1 ps
PE = 0, EQ = 1
tDJ1B VID = 350 mV 2.5 Gbps 10 29 ps
Deterministic Jitter (Peak to Peak) VCM = 1.2V
tDJ2B Input Test Channel E(9) K28.5 (NRZ) 3.125 Gbps 27 43 ps
PE = 0, EQ = 1
tTJ1B VID = 350 mV 2.5 Gbps 0.07 0.12 UIP-P
Total Jitter (Peak to Peak) VCM = 1.2V
tTJ2B Input Test Channel E(10) PRBS-23 (NRZ) 3.125 Gbps 0.12 0.17 UIP-P
PE = 0, EQ = 1
(1) Specification is ensured by characterization and is not tested in production.
(2) The Electrical Characteristics tables list ensured specifications under the listed Recommended Operating Conditions except as
otherwise modified or specified by the Electrical Characteristics Conditions and/or Notes. Typical specifications are estimations only and
are not ensured.
(3) Typical values represent most likely parametric norms for VCC = +3.3V and TA= +25°C, and at the Recommended Operation Conditions
at the time of product characterization and are not ensured.
(4) tSKD1, |tPLHD −tPHLD|, is the magnitude difference in differential propagation delay time between the positive going edge and the negative
going edge of the same channel.
(5) tSKD2, Part to Part Skew, is defined as the difference between the minimum and maximum differential propagation delays. This
specification applies to devices at the same VCC and within 5°C of each other within the operating temperature range.
(6) Current into device pins is defined as positive. Current out of device pins is defined as negative. All voltages are referenced to ground
except VOD and ΔVOD.
(7) Typical values represent most likely parametric norms for VCC = +3.3V and TA= +25°C, and at the Recommended Operation Conditions
at the time of product characterization and are not ensured.
(8) Measured on a clock edge with a histogram and an acummulation of 1500 histogram hits. Input stimulus jitter is subtracted
geometrically.
(9) Tested with a combination of the 1100000101 (K28.5+ character) and 0011111010 (K28.5- character) patterns. Input stimulus jitter is
subtracted algebraically.
(10) Measured on an eye diagram with a histogram and an acummulation of 3500 histogram hits. Input stimulus jitter is subtracted.
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