HEXFET® Power MOSFET
PD - 95203
lGeneration V Technology
lUltra Low On-Resistance
lP-Channel Mosfet
lSurface Mount
lAvailable in Tape & Reel
lDynamic dv/dt Rating
lFast Switching
Description
Fifth Generation HEXFETs from International Rectifier
utilize advanced processing techniques to achieve the
lowest possible on-resistance per silicon area. This
benefit, combined with the fast switching speed and
ruggedized device design that HEXFET Power
MOSFETs are well known for, provides the designer
with an extremely efficient device for use in a wide
variety of applications.
The SO-8 has been modified through a customized
leadframe for enhanced thermal characteristics and
multiple-die capability making it ideal in a variety of
power applications. With these improvements, multiple
devices can be used in an application with dramatically
reduced board space. The package is designed for
vapor phase, infra red, or wave soldering techniques.
Power dissipation of greater than 0.8W is possible in
a typical PCB mount application.
IRF7404PbF
SO-8
Top View
8
1
2
3
45
6
7
D
D
DG
S
A
D
S
S
VDSS = -20V
RDS(on) = 0.040Ω
Parameter Max. Units
ID @ TA = 25°C 10 Sec. Pulsed Drain Current, VGS @ -4.5V -7.7
ID @ TA = 25°C Continuous Drain Current, VGS @ -4.5V -6.7
ID @ TA = 70°C Continuous Drain Current, VGS @ -4.5V -5.4
IDM Pulsed Drain Current -27
PD @TA = 25°C Power Dissipation 2.5 W
Linear Derating Factor 0.02 W/°C
VGS Gate-to-Source Voltage ± 12 V
dv/dt Peak Diode Recovery dv/dt -5.0 V/ns
TJ, TSTG Junction and Storage Temperature Range -55 to + 150 °C
Absolute Maximum Ratings
A
9/30/04
Thermal Resistance Ratings
Parameter Typ. Max. Units
RθJA Maximum Junction-to-Ambient 50 °C/W
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lLead-Free
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Parameter Min. Typ. Max. Units Conditions
V(BR)DSS Drain-to-Source Breakdown Voltage -20 V VGS = 0V, ID = -250µA
∆V(BR)DSS/∆T
JBreakdown Voltage Temp. Coefficient -0.012 V/°C Reference to 25°C, ID = -1mA
0.040 VGS = -4.5V, ID = -3.2A
0.060 VGS = -2.7V, ID = -2.7A
VGS(th) Gate Threshold Voltage -0.70 V VDS = VGS, ID = -250µA
gfs Forward Transconductance 6.8 S VDS = -15V, ID = -3.2A
-1.0 VDS = -16V, VGS = 0V
-25 VDS = -16V, VGS = 0V, TJ = 125°C
Gate-to-Source Forward Leakage -100 VGS = -12V
Gate-to-Source Reverse Leakage 100 VGS = 12V
QgTotal Gate Charge 50 ID = -3.2A
Qgs Gate-to-Source Charge 5.5 nC VDS = -16V
Qgd Gate-to-Drain ("Miller") Charge 21 VGS = -4.5V, See Fig. 6 and 12
td(on) Turn-On Delay Time 14 VDD = -10V
trRise Time 32 ID = -3.2A
td(off) Turn-Off Delay Time 100 RG = 6.0Ω
tfFall Time 65 RD = 3.1Ω, See Fig. 10
Between lead tip
and center of die contact
Ciss Input Capacitance 1500 VGS = 0V
Coss Output Capacitance 730 pF VDS = -15V
Crss Reverse Transfer Capacitance 340 = 1.0MHz, See Fig. 5
Notes:
Parameter Min. Typ. Max. Units Conditions
ISContinuous Source Current MOSFET symbol
(Body Diode) showing the
ISM Pulsed Source Current integral reverse
(Body Diode) p-n junction diode.
VSD Diode Forward Voltage -1.0 V TJ = 25°C, IS = -2.0A, VGS = 0V
trr Reverse Recovery Time 69 100 ns TJ = 25°C, IF = -3.2A
Qrr Reverse RecoveryCharge 71 110 µC di/dt = 100A/µs
ton Forward Turn-On Time
Repetitive rating; pulse width limited by
max. junction temperature. ( See fig. 11 )
ISD ≤ -3.2A, di/dt ≤ -65A/µs, VDD ≤ V(BR)DSS,
TJ ≤ 150°C
Pulse width ≤ 300µs; duty cycle ≤ 2%.
Source-Drain Ratings and Characteristics
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
-27
-3.1
A
IGSS
IDSS Drain-to-Source Leakage Current
LSInternal Source Inductance 4.0
LDInternal Drain Inductance 2.5
nH
ns
nA
µA
Ω
RDS(ON) Static Drain-to-Source On-Resistance
S
D
G
S
D
G
Surface mounted on FR-4 board, t ≤ 10sec.
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Fig 3. Typical Transfer Characteristics Fig 4. Normalized On-Resistance
Vs. Temperature
Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics
1
10
100
1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
T = 25°C
T = 150°C
J
J
GS
D
A
-I , Drain-to-Source Current (A)
-V , Gate-to-Source Voltage (V)
V = -15V
20µs PULSE WIDTH
DS
0.1
1
10
100
1000
0.01 0.1 1 10 100
D
DS
20µs PULSE WIDTH
T = 150°C
A
-I , Drain-to-Source Current (A)
-V , Drain-to-Source Voltage (V)
J
VGS
TOP - 7.5V
- 5.0V
- 4.0V
- 3.5V
- 3.0V
- 2.5V
- 2.0V
BOTTOM - 1.5V
-1.5V
0.1
1
10
100
1000
0.01 0.1 1 10 100
D
DS
20µs PULSE WIDTH
T = 25°C
A
-I , Drain-to-Source Current (A)
-V , Drain-to-Source Voltage (V)
J
VGS
TOP - 7.5V
- 5.0V
- 4.0V
- 3.5V
- 3.0V
- 2.5V
- 2.0V
BOTTOM - 1. 5V
-1.5V
0.0
0.5
1.0
1.5
2.0
-60 -40 -20 0 20 40 60 80 100 120 140 160
J
T , Junction Temperature (°C)
R , Drain-to-Source On Resistance
DS(on)
(Normalized)
A
I = -5.3A
D
V = -4.5V
GS
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1
10
100
0.1 1 10 100
OPERATION IN THIS AREA LIMITED
BY RDS(on)
Single Pulse
T
T
= 150 C
= 25 C
°
°
J
A
-V , Drain-to-Source Voltage (V)
-I , Drain Current (A)I , Drain Current (A)
DS
D
1ms
10ms
Fig 7. Typical Source-Drain Diode
Forward Voltage
Fig 8. Maximum Safe Operating Area
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
0.1
1
10
100
0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6
T = 25°C
T = 150°C
J
J
V = 0V
GS
SD
SD
-I , Reverse Drain Current (A)
-V , Source-to-Drain Voltage (V)
0
1000
2000
3000
1 10 100
C, Capacitance (pF)
A
DS
-V , Drain-to-Source Voltage (V)
V = 0V, f = 1MHz
C = C + C , C SHORTED
C = C
C = C + C
GS
iss gs gd ds
rss gd
oss ds gd
C
iss
C
oss
C
rss
0
2
4
6
8
10
0 102030405060
G
GS
A
FOR TEST CIRCUIT
SEE FIGURE 12
-V , Gate-to-Source Voltage (V)
Q , Total Gate Charge (nC)
I = -3.2A
V = -16V
D
DS
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0.1
1
10
100
0.0001 0.001 0.01 0.1 1 10 100
Notes:
1. Duty factor D = t / t
2. Peak T = P x Z + T
1 2
JDM thJA A
P
t
t
DM
1
2
t , Rectangular Pulse Duration (sec)
Thermal Response (Z )
1
thJA
0.01
0.02
0.05
0.10
0.20
D = 0.50
SINGLE PULSE
(THERMAL RESPONSE)
Fig 10a. Switching Time Test Circuit
VDS
90%
10%
VGS
t
d(on)
t
r
t
d(off)
t
f
Fig 9. Maximum Drain Current Vs.
Ambient Temperature
Fig 10b. Switching Time Waveforms
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Ambient
V
DS
V
GS
R
G
R
D
D.U.T.
-4.5V
Pulse Width
≤
1µs
Duty Factor
≤
0.1%
V
DD
+
-
A
25 50 75 100 125 150
0.0
2.0
4.0
6.0
8.0
T , Case Temperature ( C)
-I , Drain Current (A)
°
C
D
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Fig 12a. Basic Gate Charge Waveform Fig 12b. Gate Charge Test Circuit
Q
G
Q
GS
Q
GD
V
G
Charge
D.U.T. V
DS
I
D
I
G
-3mA
V
GS
.3µF
50KΩ
.2µF
12V
Current Regulator
Same Type as D.U.T.
Current Sampling Resistors
+
-
-4.5 V
IRF7404PbF
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P.W. Period
di/dt
Diode Recovery
dv/dt
Ripple ≤5%
Body Diode Forward Drop
Re-Applied
Voltage
Reverse
Recovery
Current
Body Diode Forward
Current
V
GS
=10V
V
DD
I
SD
Driver Gate Drive
D.U.T. I
SD
Waveform
D.U.T. V
DS
Waveform
Inductor Curent
D = P. W .
Period
+
-
+
+
+
-
-
-
RG
VDD
• dv/dt controlled by RG
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
D.U.T Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
* Reverse Polarity for P-Channel
** Use P-Channel Driver for P-Channel Measurements
*
VGS*
**
Peak Diode Recovery dv/dt Test Circuit
[ ]
[ ]
Fig 13. For P-Channel HEXFETS
*** VGS = 5.0V for Logic Level and 3V Drive Devices
[ ] ***
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SO-8 Package Outline
Dimensions are shown in milimeters (inches)
e1
D
E
y
b
A
A1
H
K
L
.189
.1497
0°
.013
.050 BASIC
.0532
.0040
.2284
.0099
.016
.1968
.1574
8°
.020
.0688
.0098
.2440
.0196
.050
4.80
3.80
0.33
1.35
0.10
5.80
0.25
0.40
0°
1.27 BAS IC
5.00
4.00
0.51
1.75
0.25
6.20
0.50
1.27
MIN MAX
MILLIMETERSINCHES
MI N MAX
DIM
8°
e
c .0075 .0098 0.19 0.25
.025 BASIC 0.635 BASIC
87
5
65
D B
E
A
e
6X
H
0.25 [.010] A
6
7
K x 45°
8X L 8X c
y
0.25 [.010] C A B
e1
A
A1
8X b
C
0.10 [.004]
4312
F OOT PR IN T
8X 0.72 [.028]
6.46 [.255]
3X 1.27 [.050]
4. OU T L INE CONF OR MS T O J E D E C OU T L IN E MS -0 12AA.
NOT ES :
1. DIME NSIONING & T OL ERANCING PER AS ME Y14.5M-1994.
2. CONT ROL LING DIMENS ION: MIL LIME T ER
3. DIMENS IONS ARE SHOWN IN MILLIMET ERS [INCHES ].
5 DIMENS ION DOE S NOT INCL UDE MOLD PROT RUS IONS .
6 DIMENS ION DOE S NOT INCL UDE MOLD PROT RUS IONS .
MOL D PROT RUS IONS NOT T O EXCEE D 0.25 [.010].
7 DIMENSION IS T HE LENGT H OF LEAD F OR SOLDERING TO
A SUBSTRAT E .
MOL D PROT RUS IONS NOT T O EXCEE D 0.15 [.006].
8X 1.78 [.070]
SO-8 Part Marking Information (Lead-Free)
DAT E CODE (YWW)
XXXX
INTERNAT IONAL
RECT IFIER
LOGO
F 7101
Y = LAS T DIGIT OF T HE YE AR
PART NUMBER
LOT CODE
WW = WE E K
EXAMPLE: T HIS IS AN IRF7101 (MOSFET )
P = DE S IGNAT E S L E AD-F R E E
PRODUCT (OPTIONAL)
A = AS S E MB L Y S IT E CODE
IRF7404PbF
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330.00
(12.992)
MAX.
14.40 ( .566 )
12.40 ( .488 )
NOTES :
1. CONTROLLING DIMENSION : MILLIMETER.
2. OUTLINE CONFORMS TO EIA-481 & EIA-541.
FEED DIRECTION
TERMINAL NUMBER 1
12.3 ( .484 )
11.7 ( .461 )
8.1 ( .318 )
7.9 ( .312 )
NOTES:
1. CONTROLLING DIMENSION : MILLIMETER.
2. ALL DIMENSIONS ARE SHOWN IN MILLIMETERS(INCHES).
3. OUTLINE CONFORMS TO EIA-481 & EIA-541.
SO-8 Tape and Reel
Dimensions are shown in milimeters (inches)
Data and specifications subject to change without notice.
This product has been designed and qualified for the Consumer market.
Qualifications Standards can be found on IR’s Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information.09/04
