MAX690-MAX695 Microprocessor Supervisory Circuits General Description The MAX690 family of supervisory circuits reduces the complexity and number of components required for power supply monitoring and battery control functions in microprocessor systems. These include P reset and backup-battery switchover, watchdog timer, CMOS RAM write protection, and power-failure warning. The MAX690 family significantly improves system reliability and accuracy compared to that obtainable with separate ICs or discrete components. The MAX690, MAX692, and MAX694 are supplied in 8-pin packages and provide four functions: A reset output during power-up, power-down, and brownout conditions. Battery backup switching for CMOS RAM, CMOS microprocessor or other low power logic. A Reset pulse if the optional watchdog timer has not been toggled within a specified time. A 1.3V threshold detector for power fail warning, low battery detection, or to monitor a power supply other than +5V. Benefits and Features Supervisory Function Integration Saves Board Space while Fully Protecting Microprocessor-Based Systems * Precision Voltage Monitor -- 4.65V (MAX690, MAX691, MAX694, MAX695) -- 4.40V (MAX692, MAX693) * Power OK/Reset Time Delay -- 50ms, 200ms, or Adjustable * Watchdog Timer -- 100ms, 1.6s, or Adjustable * Battery Backup Power Switching * Voltage Monitor for Power Fail or Low Battery Warning * Minimum External Component Count Low Power Consumption in Battery Backup Mode Extends Battery Life * 1A Standby Current Onboard Gating of Chip Enable Signals Protects Against Erroneous Data Written to RAM During Low VCC Events Applications Write protection of CMOS RAM or EEPROM. Adjustable reset and watchdog timeout periods. Ordering information appears at end of data sheet. The MAX691, MAX693, and MAX695 are supplied in 16-pin packages and perform all MAX690, MAX692, MAX694 functions, plus: Separate outputs for indicating a watchdog timeout, backup-battery switchover, and low VCC. Computers Controllers Intelligent Instruments Automotive Systems Critical P Power Monitoring Pin Configurations TOP VIEW Typical Operating Circuit VOUT 1 VCC 2 GND 3 MAX690 MAX692 MAX694 PFI 4 +5V VOUT VCC VBATT POWER TO CMOS RAM RESET PFI GND P RESET PFO P NMI WDI I/O LINE MAX690 TYPICAL APPLICATION 19-0218; Rev 5; 4/15 7 RESET 6 WDI 5 PFO P POWER P SYSTEM MAX690 8 VBATT VBATT 1 16 RESET VOUT 2 VCC 3 GND 4 BATT ON 5 15 RESET MAX691 MAX693 MAX695 14 WDO 13 CE IN 12 CE OUT LOW LINE 6 11 WDI OSC IN 7 10 PFO OSC SEL 8 9 PFI MAX690-MAX695 Microprocessor Supervisory Circuits Absolute Maximum Ratings Terminal Voltage (with respect to GND) VCC....................................................................-0.3V to +6.0V VBATT................................................................-0.3V to +6.0V All Other Inputs (Note 1) .................... -0.3V to (VOUT + 0.5V) Input Current VCC................................................................................200mA VBATT..............................................................................50mA GND ................................................................................20mA Output Current VOUT......................................................Short circuit protected All Other Outputs.............................................................20mA Rate-of-Rise, VBATT, VCC...............................................100V/s Operating Temperature Range C suffix.................................................................0C to +70C E suffix............................................................. -40C to +85C M suffix.......................................................... -55C to +125C Power Dissipation 8-Pin Plastic DIP (derate 5mW/C above +70C).....................................400mV 8-Pin CERDIP (derate 8mW/C above +85C).....................................500mV 16-Pin Plastic DIP (derate 7mW/C above +70C).....................................600mV 16-Pin Small Outline (derate 7mW/C above +70C).....................................600mV 16-Pin CERDIP (derate 10mW/C above +85C)...................................600mV Storage Temperature Range............................. -65C to +160C Lead Temperature (Soldering, 10s).................................... 300C Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Electrical Characteristics VCC = full operating range, VBATT = 2.8V, TA = +25C, unless otherwise noted.) PARAMETER CONDITIONS MIN TYP MAX UNITS BATTERY BACKUP SWITCHING Operating Voltage Range (MAX690, MAX691, MAX694, MAX695 VCC) 4.75 5.5 Operating Voltage Range (MAX690, MAX691, MAX694, MAX695 VBATT) 2.0 4.25 Operating Voltage Range (MAX692, MAX693 VCC) 4.5 5.5 Operating Voltage Range (MAX692, MAX693 VBATT) 2.0 4.0 VOUT Output Voltage VOUT in Battery Backup Mode V IOUT = 1mA VCC 0.3 VCC 0.1 IOUT = 50mA VCC 0.5 VCC 0.25 IOUT = 250A, VCC < VBATT - 0.2V VBATT - 0.1 VBATT - 0.02 V V IOUT = 1mA 2 5 IOUT = 50mA 3.5 10 Supply Current in Battery Backup Mode VCC = 0V, VBATT = 2.8V 0.6 1 Battery Standby Current (+ = Discharge, - = Charge) 5.5V > VCC > VBATT + 1V Battery Switchover Threshold (VCC - VBATT) Power-up 70 Power-down 50 Supply Current (Excluded IOUT) www.maximintegrated.com TA = +25C -0.1 +0.02 TA = full operating range -1.0 +0.02 mA A A mV Maxim Integrated 2 MAX690-MAX695 Microprocessor Supervisory Circuits Electrical Characteristics (continued) VCC = full operating range, VBATT = 2.8V, TA = +25C, unless otherwise noted.) PARAMETER CONDITIONS MIN Battery Switchover Hysteresis BATT ON Output Voltage BATT ON Output Short-Circuit Current TYP MAX 20 ISINK = 3.2mA mV 0.4 BATT ON = VOUT = 4.5V sink current BATT ON = 0V source current UNITS 25 V mA 0.5 1 25 MAX690, MAX691, MAX694, MAX695 4.5 4.65 4.75 MAX692, MAX693 4.25 4.4 4.5 A RESET AND WATCHDOG TIMER Reset Voltage Threshold TA = full operating range Reset Threshold Hysteresis 40 V mV Reset Timeout Delay (MAX690/MAX691/ MAX692/MAX693) Figure 6, OSC SEL HIGH, VCC = 5V 35 50 70 ms Reset Timeout Delay (MAX694/MAX695) Figure 6, OSC SEL HIGH, VCC = 5V 140 200 280 ms Long period, VCC = 5V 1.0 1.6 2.25 s Short period, VCC = 5V 70 100 140 ms Clock Cycles Watchdog Timeout Period, Internal Oscillator Watchdog Timeout Period, External Clock Minimum WDI Input Pulse Width RESET and LOW LINE Output Voltage RESET and WDO Output Voltage Long period 3840 4097 Short period 768 1025 VIL = 0.4, VIH = 0.8VCC 200 ISINK = 1.6mA, VCC = 4.25V ISOURCE = 1A, VCC = 5V 0.4 3.5 ISINK = 1.6mA ISOURCE = 1A, VCC = 5V Output Short-Circuit Current RESET, RESET, WDO, LOW LINE WDI Input Threshold Logic-Low VCC = 5V (Note 2) WDI Input Threshold Logic-High VCC = 5V (Note 2) WDI Input Current ns 0.4 3.5 1 3 25 0.8 3.5 WDI = VOUT 20 WDI = 0V -50 VCC = 5V, TA = full 1.2 50 -15 V V A V A POWER-FAIL DETECTOR PFI Threshold PFI Current PFO Output Voltage PFO Short Circuit Source Current www.maximintegrated.com 1.3 1.4 V 0.01 25 nA 0.4 V 25 A ISINK = 3.2mA ISOURCE = 1A PFI = VIH, PFO = 0V 3.5 1 V 3 Maxim Integrated 3 MAX690-MAX695 Microprocessor Supervisory Circuits Electrical Characteristics (continued) VCC = full operating range, VBATT = 2.8V, TA = +25C, unless otherwise noted.) PARAMETER CONDITIONS MIN TYP MAX UNITS CHIP ENABLE GATING VIL CE IN Thresholds 0.8 VIH V 3.0 CE IN Pullup Current 3 A ISINK = 3.2mA CE OUT Output Voltage CE Propagation Delay 0.4 ISOURCE = 3.0mA VOUT - 1.5 ISOURCE = 1A, VCC = 0V VOUT - 0.05 VCC = 5V V 50 200 ns OSCILLATOR OSC IN Input Current 2 OSC SEL Input Pullup Current A 5 OSC IN Frequency Range OSC SEL = 0V OSC IN Frequency with External Capacitor OSC SEL = 0V COSC = 47pF 0 A 250 4 kHz kHz Note 1: The input voltage limits on PFI and WDI may be exceeded provided the input current is limited to less than 10mA. Note 2: WDI is guaranteed to be in the mid-level (inactive) state if WDI is floating and VCC is in the operating voltage range. WDI is internally biased to 38% of VCC with an impedance of approximately 125k. Pin Description PIN MAX690/ MAX692/ MAX694 MAX691/ MAX693/ MAX695 NAME 2 3 VCC 8 1 VBATT Backup Battery Input. Connect to Ground if a backup battery is not used. 1 2 VOUT The higher of VCC or VBATT is internally switched to VOUT. Connect VOUT to VCC if VOUT and VBATT are not used. Connect a 0.1F or larger bypass capacitor to VOUT. 3 4 GND 0V Ground Reference for All Signals 7 15 RESET FUNCTION The +5V Input RESET goes low whenever VCC falls below either the reset voltage threshold or the VBATT input voltage. The reset threshold is typically 4.65V for the MAX690/691/694/695, and 4.4V for the MAX692 and MAX693. RESET remains low for 50ms after VCC returns to 5V, (except 200ms in MAX694/695). RESET also goes low for 50ms if the Watchdog Timer is enabled but not serviced within its timeout period. The RESET pulse width can be adjusted as shown in Table 1. 6 11 WDI Watchdog Input (WDI). WDI is a three level input. If WDI remains either high or low for longer than the watchdog timeout period, RESET pulses low and WDO goes low. The Watchdog Timer is disabled when WDI is left floating or is driven to mid-supply. The timer resets with each transition at the Watchdog Timer input. 4 9 PFI Noninverting Input to the Power-Fail Comparator. When PFI is less than 1.3V, PFO goes low. Connect PFI to GND or VOUT when not used. See Figure 1. www.maximintegrated.com Maxim Integrated 4 MAX690-MAX695 Microprocessor Supervisory Circuits Pin Description (continued) PIN MAX690/ MAX692/ MAX694 MAX691/ MAX693/ MAX695 NAME 5 10 PFO -- 13 CE IN -- 12 CE OUT CE OUT goes low only when CE IN is low and VCC is above the reset threshold (4.65V for MAX691 and MAX695, 4.4V for MAX693). See Figure 6. FUNCTION Output of the Power-Fail Comparator. It goes low when PFI is less than 1.3V. The comparator is turned off and PFO goes low when VCC is below VBATT. CE Gating Circuit Input. Connect to GND or VOUT if not used. -- 5 BATT ON BATT ON goes high when VOUT is internally switched to the VBATT input. It goes low when VOUT is internally switched to VCC. The output typically sinks 25mA and can directly drive the base of an external PNP transistor to increase the output current above the 50mA rating of VOUT. -- 6 LOW LINE LOW LINE goes low when VCC falls below the reset threshold. It returns high as soon as VCC rises above the reset threshold. See Figure 6, Reset Timing. -- 16 RESET -- 8 OSC SEL -- -- 7 14 www.maximintegrated.com OSC IN WDO Active-High Output. It is the inverse of RESET. When OSC SEL is unconnected or driven high, the internal oscillator sets the reset time delay and watchdog timeout period. When OSC SEL is low, the external oscillator input, OSC IN, is enabled. OSC SEL has a 3A internal pullup. See Table 1. When OSC SEL is low, OSC IN can be driven by an external clock to adjust both the reset delay and the watchdog timeout period. The timing can also be adjusted by connecting and external oscillator to this pin. See Figure 8. When OSC SEL is high or floating, OSC IN selects between fast and slow Watchdog timeout periods. The Watchdog Output (WDO). WDO goes low if WDI remains either high or low for longer than the watchdog timeout period. WDO is set high by the next transition at WDI. If WDI is unconnected or at mid-supply, WDO remains high. WDO also goes high when LOW LINE goes low. Maxim Integrated 5 MAX690-MAX695 Microprocessor Supervisory Circuits Typical Applications power-up RESET pulse lasts 50ms* to allow for this oscillator start-up time. The manual reset switch and the 0.1F capacitor connected to the reset bus can be omitted if manual reset is not needed. An inverted, active high, RESET output is also supplied. MAX691, MAX693, and MAX695 A typical connection for the MAX691/693/695 is shown in Figure 1. CMOS RAM is powered from VOUT. VOUT is internally connected to VCC when 5V power is present, or to VBATT when VCC is less than the battery voltage. VOUT can supply 50mA from VCC, but if more current is required, an external PNP transistor can be added. When VCC is higher than VBATT, the BATT ON output goes low, providing 25mA of base drive for the external transistor. When VCC is lower than VBATT, an internal 200 MOSFET connects the backup battery to VOUT. The quiescent current in the battery backup mode is 1A maximum when VCC is between 0V and VBATT-700mV. Power-Fail Detector The MAX691/93/95 issues a nonmaskable interrupt (NMI) to the microprocessor when a power failure occurs. The +5V power line is monitored via two external resistors connected to the power-fail input (PFI). When the voltage at PFI falls below 1.3V, the power-fail output (PFO) drives the processor's NMI input low. If a power-fail threshold of 4.8V is chosen, the microprocessor will have the time when VCC fails from 4.8V to 4.65V to save data into RAM. An earlier power-fail warning can be generated if the unregulated DC input of the 5V regulator is available for monitoring. Reset Output A voltage detector monitors VCC and generates a RESET output to hold the microprocessor's Reset line low when VCC is below 4.65V (4.4V for MAX693). An internal monostable holds RESET low for 50ms* after VCC rises above 4.65V (4.4V for MAX693). This prevents repeated toggling of RESET even if the 5V power drops out and recovers with each power line cycle. RAM Write Protection The MAX691/MAX693/MAX695 CE OUT line drives the Chip Select inputs of the CMOS RAM. CE OUT follows CE IN as long as VCC is above the 4.65V (4.4V for MAX693) reset threshold. If VCC falls below the reset threshold, CE OUT goes high, independent of the logic level at CE IN. This prevents the microprocessor from writing erroneous data into RAM during power-up, powerdown, brownouts, and momentary power interruptions. The LOW LINE output goes low when VCC falls below 4.65V (4.4V for MAX693). The crystal oscillator normally used to generate the clock for microprocessors takes several milliseconds to start. Since most microprocessors need several clock cycles to reset, RESET must be held low until the microprocessor clock oscillator has started. The MAX690 family *200ms for MAX695 +5V VCC INPUT 0.1F 0.1F 3 1 VCC VBATT 5 BATT ON 3V BATTERY CE OUT 9 4 7 NO CONNECTION VOUT 8 PFI CE IN MAX691 MAX693 MAX695 WDI GND PFO OSC IN RESET OSC SEL LOW LINE 6 WDO 14 SYSTEM STATUS INDICATORS 2 CMOS RAM 12 13 ADDRESS DECODE A0-A15 11 I/O 10 NMI 15 RESET RESET 0.1F MICROPROCESSOR AUDIBLE ALARM OTHER SYSTEM RESET SOURCES Figure 1. MAX691/693/695 Typical Application www.maximintegrated.com Maxim Integrated 6 MAX690-MAX695 Microprocessor Supervisory Circuits Watchdog Timer application. Operation is much the same as with the MAX691/MAX693/MAX695 (Figure 1), but in this case, the power- fail input (PFI) monitors the unregulated input to the 7805 regulator. The MAX690/MAX694 RESET output goes low when VCC falls below 4.65V. The RESET output of the MAX692 goes low when VCC drops below 4.4V. The microprocessor drives the WATCHDOG INPUT (WDI) with an I/O line. When OSC IN and OSC SEL are unconnected, the microprocessor must toggle the WDI pin once every 1.6s to verify proper software execution. If a hardware or software failure occurs such that WDI not toggled the MAX691/MAX693 will issue a 50ms* RESET pulse after 1.6s. This typically restarts the microprocessor's power-up routine. A new RESET pulse is issued every 1.6s until the WDI is again strobed. The current consumption of the battery-backed-up power bus must be less than 50mA. The MAX690/MAX692/ MAX694 does not have a BATT ON output to drive an external transistor. The MAX690/MAX692/MAX694 also does not include chip enable gating circuitry that is available on the MAX690/MAX692/MAX694. In many systems though, CE gating is not needed since a low input to the microprocessor RESET line prevents the processor from writing to RAM during power-up and power-down transients. The WATCHDOG OUTPUT (WDO) goes low if the watchdog timer is not serviced within its timeout period. Once WDO goes low it remains low until a transition occurs at WDI. The watchdog timer feature can be disabled by leaving WDI unconnected. OSC IN and OSC SEL also allow other watchdog timing options, as shown in Table 1 and Figure 8. The MAX690/MAX692/MAX694 watchdog timer has a fixed 1.6s timeout period. If WDI remains either low or high for more than 1.6s, a RESET pulse is sent to the microprocessor. The watchdog timer is disabled if WDI is left unconnected. MAX690, MAX692, and MAX694 The 8 pin MAX690, MAX692, and MAX694 have most of the features of the MAX691, MAX693, and MAX695. Figure 2 shows the MAX690/MAX692/MAX694 in a typical *200ms for MAX695 +8V 7805 3-TERMINAL REGULATOR +5V 2 0.1F 4 VCC VOUT MAX690 MAX692 MAX694 VBATT PFI RESET PFO GND WDI 1 8 7 5 6 0.1F POWER TO CMOS RAM MICROPROCESSOR POWER MICROPROCESSOR RESET NMI I/O LINE 3 Figure 2. MAX690/692/694 Typical Application www.maximintegrated.com Maxim Integrated 7 MAX690-MAX695 Microprocessor Supervisory Circuits Detailed Description Battery-Switchover and VOUT The battery switchover circuit compares VCC to the VBATT input, and connects VOUT to whichever is higher. Switchover occurs when VCC is 50mV greater than VBATT as VCC falls, and VCC is 70mV more than VBATT as VCC rises (see Figure 4). The switchover comparator has 20mV of hysteresis to prevent repeated, rapid switching if VCC falls very slowly or remains nearly equal to the battery voltage. When VCC is higher than VBATT, VCC is internally switched to VOUT via a low saturation PNP transistor. VOUT has 50mA output current capability. Use an external PNP pass transistor in parallel with internal transistor if the output current requirement at VOUT exceeds 50mA or if a lower VCC-VOUT voltage differential is desired. The BATT ON output (MAX691/MAX693/MAX695 only) can directly drive the base of the external transistor. It should be noted that the MAX690-MAX695 need only supply the average current drawn by the CMOS RAM if there is adequate filtering. Many RAM data sheets specify a 75mA maximum supply current, but this peak current spike lasts only 100ns. A 0.1F bypass capacitor at VOUT supplies the high instantaneous current, while VOUT need only supply the average load current, which is much less. A capacitance of 0.1F or greater must be connected to the VOUT terminal to ensure stability. A 200 MOSFET connects VBATT input to VOUT during battery backup. This MOSFET has very low input-tooutput differential (dropout voltage) at the low current levels required for battery backup of CMOS RAM or other low power CMOS circuitry. When VCC equals VBATT the supply current is typically 12A. When VCC is between 0V and (VBATT - 700mV) the typical supply current is only 600nA typical, 1A maximum. The MAX690/MAX691/MAX694/MAX695 operate with battery voltages from 2.0V to 4.25V while MAX692/ MAX693 operate with battery voltages from 2.0V to 4.0V. High value capacitors can also be used for shortterm memory backup. External circuitry is required to ensure that the capacitor voltage does not rise above the reset threshold, and that the charging resistor does not discharge the capacitor when in backup mode. The MAX691A and the MAX791 provide solutions requiring fewer external components. A small charging current of typically 10nA (0.1A max) flows out of the VBATT terminal. This current varies with the amount of current that is drawn from VOUT but its polarity is such that the backup battery is always slightly charged, and is never discharged while VCC is in its operating voltage range. This extends the shelf life of the backup battery by compensating for its self-discharge current. Also note that this current poses no problem when lithium batteries are used for backup since the maximum charging current (0.1A) is safe for even the smallest lithium cells. If the battery-switchover section is not used, connect VBATT to GND and connect VOUT to VCC. Table 2 shows the state of the inputs and output in the low power battery backup mode. VBATT 1 VCC CHIP-ENABLE INPUT 3 5 BATT ON + 2 - 12 13 6 + *4.4V (MAX693) * 4.65V 15 - 16 RESET GENERATOR OSC IN OSC SEL WATCHDOG INPUT POWER FAIL INPUT 7 TIMEBASE FOR RESET AND WATCHDOG 8 11 WATCHDOG TRANSITION DETECTOR 9 WATCHDOG TIMER + 1.3V 14 10 - 4 VOUT CHIP ENABLE OUTPUT LOW LINE RESET RESET WATCHDOG OUTPUT POWER FAIL OUTPUT GROUND Figure 3. MAX691/MAX693/MAX695 Block Diagram www.maximintegrated.com Maxim Integrated 8 MAX690-MAX695 Microprocessor Supervisory Circuits VCC +5V VOUT VCC P CHANNEL MOSFET BASE DRIVE 100 mV 3V BATTERY INPUT + BATT ON (MAX691, MAX693, MAX695 ONLY) - 700 mV 0.1F TO CMOS RAM AND REALTIME CLOCK VCC IN + + LOW IQ MODE - SELECT INTERNAL SHUTDOWN SIGNAL WHEN VBATT > VCC + 0.7V Figure 4. Battery-Switchover Block Diagram Reset Output RESET is an active-low output which goes low whenever VCC falls below 4.5V (MAX690/MAX691/MAX694/ MAX695) or 4.25V (MAX692/MAX693). It will remain low until VCC rises above 4.75V (MAX690/691/694/695) or 4.5V (MAX692/MAX693) for milliseconds*. See Figures 5 and 6. The guaranteed minimum and maximum thresholds of MAX690/MAX691/MAX694/MAX695 are 4.5V and 4.75V, while the guaranteed thresholds of the MAX692/MAX693 are 4.25V and 4.5V. The MAX690/MAX691/MAX694/ MAX695 is compatible with 5V supplies with a +10%, -5% tolerance while the MAX692/MAX693 is compatible with 5V 10% supplies. The reset threshold comparator has approximately 50mV of hysteresis, with a nominal threshold of 4.65V in the MAX690/MAX691/MAX694/MAX695, and 4.4V in the MAX692/MAX693. The response time of the reset voltage comparator is about 100s. VCC should be bypassed to ensure that glitches do not activate the RESET output. RESET also goes low if the watchdog timer is enabled and WDI remains either high or low longer than the watchdog timeout period. RESET has an internal 3A pullup, and can either connect to and open collector Reset bus or directly drive a CMOS gate without and external pullup resistor. CE Gating and RAM Write Protection The MAX691/MAX693/MAX695 use two pins to control the Chip Enable or Write inputs of CMOS RAMs. When VCC is +5V, CE OUT is a buffered replica of CE IN, with a 50ns propagation delay. If VCC input falls below 4.65V (4.5V min, 4.75V max) an internal gate forces CE OUT high, independent of CE IN. The MAX693 CE OUT goes high whenever VCC is below 4.4V (4.25V min, 4.5V max). The CE output of both devices is also forced high when VCC is less than VBATT. (See Figure 5.) CE OUT typically drives the CE, CS, or Write input of battery backed up CMOS RAM. This ensures the integrity of the data in memory by preventing write operations when VCC is at and invalid level. Similar protection of EEPROMs can be achieved by using the CE OUT to drive the Store or Write inputs of an EEPROM, EAROM, or NOVRAM. If the 50ns typical propagation delay of CE OUT is too long, connect CE IN to GND and use the resulting CE OUT to control a high speed external logic gate. A second alternative is to AND the LOW LINE output with the CE or WR signal. An external logic gate and the RESET output of the MAX690/MAX692/MAX694 can also be used for CMOS RAM write protection. *200ms for MAX694 and MAX695 www.maximintegrated.com Maxim Integrated 9 MAX690-MAX695 Microprocessor Supervisory Circuits CE IN CE OUT LOW LINE VCC RESET POWER-ON RESET METAL LINK TRIMMED RESISTORS + RESET RESET TIME 1.3V RESET QR WATCHDOG FROM WATCHDOG TIMER 10 kHz CLOCK FROM TIMEBASE SECTION Figure 5. Reset Block Diagram VCC RESET OUTPUT 4.7V 50ms* 4.6V 4.7V 4.6V 50ms* LOW LINE OUTPUT CE IN CE IN VOUT - VBATT *200ms FOR MAX694 AND MAX695 Figure 6. Reset Timing www.maximintegrated.com Maxim Integrated 10 MAX690-MAX695 Microprocessor Supervisory Circuits 1.3V Comparator and Power-Fail Warning at the end of reset, whether the reset was caused by lack of activity on WDI or by VCC falling below the reset threshold. If WDI remains either high or low, reset pulses will be issued every 1.6s. The watchdog monitor can be deactivated by floating the watchdog input (WDI). The power-fail input (PFI) is compared to an internal 1.3V reference. The power-fail output (PFO) goes low when the voltage at PFI is less than 1.3V. Typically, PFI is driven by an external voltage divider which senses either the unregulated DC input to the system's 5V regulator or the regulated 5V output. The voltage divider ratio can be chosen such that the voltage at PFI falls below 1.3V several milliseconds before the +5V supply falls below 4.75V. PFO is normally used to interrupt the microprocessor so that data can be stored in RAM before VCC falls below 4.75V and the RESET output goes low (4.5V for MAX692/ MAX693). The watchdog output (WDO, MAX691/MAX693/MAX695 only) goes low if the watchdog timer times out and remains low until set high by the next transition on the watchdog input. WDO is also set high when VCC goes below the reset threshold. The watchdog timeout period is fixed at 1.6s and the reset pulse width is fixed at 50ms* on the 8-pin MAX690/ MAX692/MAX694. The MAX691/MAX693/MAX695 allow these times to be adjusted per Table 1. Figures 8 shows various oscillator configurations. The power-fail detector can also monitor the backup battery to warn of a low battery condition. To conserve battery power, the power-fail detector comparator is turned off and PFO is forced when VCC is lower than VBATT input voltage. The internal oscillator is enabled when OSC SEL is floating. In this mode, OSC IN selects between the 1.6s and 100ms watchdog timeout periods. In either case, immediately after a reset the timeout period 1.6s. This gives the microprocessors time to reintialize the system. If OSC IN is low, then the 100ms watchdog period becomes effective after the first transition of WDI. The software should be written such that the I/O port driving WDI is left in its power-up reset state until the initialization routines are completed and the microprocessor is able to toggle WDI at the minimum watchdog timeout period of 70ms. Watchdog Timer and Oscillator The watchdog circuit monitors the activity of the microprocessor. If the microprocessor does not toggle the Watchdog Input (WDI) within the selected timeout period, a 50ms* RESET pulse is generated. Since many systems cannot service the watchdog timer immediately after a reset, the MAX691/MAX693/MAX695 has a longer timeout period after reset is issued. The normal timeout period becomes effective following the first transition of WDI after RESET has gone high. The watchdog timer is restarted *200ms for MAX694 PRESCALER WATCHDOG INPUT VCC Q6 2.7V + WATCHDOG TIMEOUT SELECT HI IF WATCHDOG INPUT IS FLOATING RESET COUNTER + 10.24 kHz FROM INTERNAL OSCILLATOR OR EXTERNALLY SET FREQUENCY FROM OSC IN PIN R Q10/12 WATCHDOG COUNTER Q11 Q13 R Q15 WATCHDOG TIMEOUT SELECTOR LOGIC 1.0V GOES HIGH AT THE END OF WATCHDOG TIMEOUT PERIOD TRANSACTION DETECTOR FOR EACH TRANSITION LOW LINE (HI IF VCC < 4.65V) S R RESET FLIP FLOP Q Q RESET RESET S Q LONG/SHORT FF R R LOW LINE S WATCHDOG FAULT FF Q WATCHDOG OUTPUT Figure 7. Watchdog Timer Block Diagram www.maximintegrated.com Maxim Integrated 11 MAX690-MAX695 Microprocessor Supervisory Circuits EXTERNAL CLOCK 8 EXTERNAL OSCILLATOR 8 OSC SEL OSC SEL MAX691 MAX693 MAX695 0 TO 250kHz 7 MAX691 MAX693 MAX695 7 OSC IN OSC IN COSC INTERNAL OSCILLATOR 1.6s WATCHDOG N.C. N.C. 8 7 INTERNAL OSCILLATOR 100ms WATCHDOG N.C. OSC SEL MAX691 MAX693 MAX695 8 7 OSC IN OSC SEL MAX691 MAX693 MAX695 OSC IN Figure 8. Oscillator Circuits Table 1. MAX691/MAX693/MAX695 Reset Pulse Width and Watchdog Timeout Selections WATCHDOG TIMEOUT PERIOD OSC SEL OSC IN Low External Clock Input Low External Capacitor Floating Low Floating Floating RESET TIMEOUT PERIOD NORMAL IMMEDIATELY AFTER REST MAX691/MAX693 MAX695 1024 clks 4096 clks 512 clks 2048 clks 400ms/47pF x C 1.6s/47pF x C 200ms/47pF x C 800ms/47pF x C 100ms 1.6s 50ms 200ms 1.6s 1.6s 50ms 200ms Note 1: The MAX690/MAX692/MAX694 watchdog timeout period is fixed at 1.6s nominal, the MAX690/692 reset pulse width is fixed at 50ms nominal and the MAX694 is 200ms nominal. Note 2: When the MAX691 OSC SEL pin is low, OSC IN can be driven by an external clock signal or an external capacitor can be connected between OSC IN and GND. The nominal internal oscillator frequency is 6.55kHz. The nominal oscillator frequency with capacitor is: 120,000 f OSC (Hz) = C(pF) Note 3: See Electrical Characteristics table for minimum and maximum timing values. www.maximintegrated.com Maxim Integrated 12 MAX690-MAX695 Microprocessor Supervisory Circuits Application Hints Adding Hysteresis to the Power Fail Comparator Other Uses of the Power-Fail Detector In Figure 9, the power-fail detector is used to initiate a system reset when VCC falls to 4.85V. Since the threshold of the power-fail detector is not as accurate as the onboard reset-voltage detector, a trimpot must be used to adjust the voltage detection threshold. Both the PFO and RESET outputs have high sink current capability and only 10A of source current drive. This allows the two outputs to be connected directly to each other in a wired OR fashion. The overvoltage detector circuit in Figure 10 resets the microprocessor whenever the nominal 5V VCC is above 5.5V. The battery monitor circuit (Figure 11) shows the status of the memory backup battery. If desired, the CE OUT can be used to apply a test load to the battery. Since CE OUT is forced high during the battery backup mode, the test load will not be applied to the battery while it is in use even if the microprocessor is not powered. 10k VCC VCC MAX690 MAX691 MAX692 MAX693 MAX694 MAX695 PFO GND Figure 9. Externally Adjustable VCC Reset Threshold www.maximintegrated.com The Watchdog feature can be enabled and disabled under program control by driving WDI with a three-state buffer (Figure 13). The drawback to this circuit is that a software fault may be erroneously three-state the buffer, thereby preventing the MAX690 from detecting that the microprocessor is no longer working. In most cases a better method is to extend the watchdog period rather than disabling the watchdog. See Figure 14. When the control input is high, the OSC SEL pin is low and the watchdog timeout is set by the external capacitor. A 0.01F capacitor sets a watchdog timeout delay of 100s. When the control input is low the OSC SEL pin is high, selecting the internal oscillator. The 100ms or the 1.6s period is chosen, depending on which diode in Figure 14 is used. +5V RESET PFI Alternate Watchdog Input Drive Circuits +5V 29.4k 2k Since the power fail comparator circuit is noninverting, hysteresis can be added by connecting a resistor between the PFO output and the PFI input as shown in Figure 12. When PFO is low, resistor R3 sinks current from the summing junction at the PFI pin. When PFO is high, the series combination of R3 and R4 source current into the PFI summing junction. TO P RESET INPUT 35.7k 2k 10k RESET PFI MAX690 MAX691 MAX692 MAX693 MAX694 MAX695 PFO TO P RESET INPUT N-CHANNEL GND Figure 10. Reset on Overvoltage or Undervoltage Maxim Integrated 13 MAX690-MAX695 Microprocessor Supervisory Circuits 7V TO 15V +5V 7805 VCC +5V PFO R1 75k VBATT 10M PFI 10M RL CE OUT VCC LOW BATTERY SIGNAL TO P I/O PIN PFO MAX690 MAX691 MAX692 MAX693 MAX694 MAX695 GND MAX690 MAX691 MAX692 MAX693 MAX694 MAX695 R4 10k PFI R2 13k CE IN LOW APPLIES LOAD TO BATTERY FROM P I/O PIN GND R3 300k TO P VH = 9.125V VL = 7.9V HYSTERESIS = 1.23V ( ) R1 (5V -1.3V) R1 V = 1.3V (1 + R2 1.3V (R3 + R4) ) VH = 1.3V 1 +R1 +R1 R2 R3 L HYSTERESIS 5V x R1 R3 ASSUMING R4 < < R3 Figure 11. Backup VBattery Monitor with Optional Test Load Figure 12. Adding Hysteresis to the Power-Fail Voltage Comparator +5V +5V VCC WATCHDOG STROBE EN WATCHDOG DISABLE WDI MAX690 MAX691 MAX692 MAX693 MAX694 MAX695 GND Figure 13. Disabling the Watchdog Under Program Control www.maximintegrated.com VCC LOW = INTERNAL WATCHDOG TIMEOUT OSC SEL MAX691 MAX693 HI = EXTERNAL WATCHDOG TIMEOUE CONNECT FOR 100ms TIMEOUT WHEN INTERNAL TIMEOUT IS SELECTED OSC IN GND CONNECT FOR 1.6s INTERNAL TIMEOUT Figure 14. Selecting Internal or External Watchdog Timeout Maxim Integrated 14 MAX690-MAX695 Microprocessor Supervisory Circuits Table 2. Input and Output Status In Battery Backup Mode VBATT, VOUT VBATT is connected to VOUT via internal MOSFET. RESET Logic-low RESET Logic-high. The open circuit output voltage is equal to VOUT. LOW LINE Logic-low BATT ON Logic-high WDI WDI is internally disconnected from its internal pullup and does not source or sink current as long as its input voltage is between GND and VOUT. The input voltage does not affect the source current. WDO Logic-high PFI The power-fail comparator is turned off and the power-fail input voltage has no effect on the power-fail output. PFO Logic-low CE IN CE IN is internally disconnected from its internal pullup and does not source or sink current as long as its input voltage is between GND and VOUT. The input voltage does not affect the source current. CE OUT Logic-high OSC IN OSC IN is ignored. OSC SEL OSC SEL is ignored. VCC Approximately 12A is drawn from the VBATT input when VCC is between VBATT +100mV and VBATT - 700mV. The supply current is 1A maximum when VCC is less than VBATT - 700mV. www.maximintegrated.com Maxim Integrated 15 MAX690-MAX695 Microprocessor Supervisory Circuits Ordering Information PART TEMP RANGE PIN-PACKAGE PART TEMP RANGE PIN-PACKAGE MAX690CPA 0C to +70C 8 Lead Plastic DIP MAX693CPE 0C to +70C 16 Lead Plastic DIP MAX690C/D 0C to +70C Dice* MAX693CWE 0C to +70C 16 Lead Wide SO MAX690EPA -40C to +85C 8 Lead Plastic DIP MAX693EPE -40C to +85C 16 Lead Plastic DIP MAX690EJA -40C to +85C 8 Lead CERDIP MAX693EJE -40C to +85C 16 Lead CERDIP MAX690MJA -55C to +125C 8 Lead CERDIP MAX693EWE -40C to +85C 16 Lead Wide SO MAX691CPE 0C to +70C 16 Lead Plastic DIP MAX693MJE -55C to +125C 16 Lead CERDIP MAX691CWE 0C to +70C 16 Lead Wide SO MAX694C/D 0C to +70C Dice MAX691C/D 0C to +70C Dice* MAX694CPA 0C to +70C 8 Lead Plastic DIP MAX691EPE -40C to +85C 16 Lead Plastic DIP MAX694EPA -40C to +85C 8 Lead Plastic DIP MAX691EWE -40C to +85C 16 Lead Wide SO MAX694EJA -40C to +85C 8 Lead CERDIP MAX691EJE -40C to +85C 16 Lead CERDIP MAX694MJA -55C to +125C 8 Lead CERDIP MAX691MJE -55C to +125C 16 Lead CERDIP MAX695C/D 0C to +70C Dice MAX692C/D 0C to +70C Dice MAX695CPE 0C to +70C 16 Lead Plastic DIP MAX692CPA 0C to +70C 8 Lead Plastic DIP MAX695CWE 0C to +70C 16 Lead Wide SO MAX692EPA -40C to +85C 8 Lead Plastic DIP MAX695EPE -40C to +85C 16 Lead Plastic DIP MAX692EJA -40C to +85C 8 Lead CERDIP MAX695EJE -40C to +85C 16 Lead CERDIP MAX692MJA -55C to +125C 8 Lead CERDIP MAX695EWE -40C to +85C 16 Lead Wide SO MAX693C/D 0C to +70C Dice MAX695MJE -55C to +125C 16 Lead CERDIP *Contact factory for dice specifications. Devices in PDIP and SO packages are available in both leaded and lead-free packaging. Specify lead free by adding the + symbol at the end of the part number when ordering. Lead free not available for CERDIP package. www.maximintegrated.com Maxim Integrated 16 MAX690-MAX695 Microprocessor Supervisory Circuits Package Information For the latest package outline information and land patterns (footprints), go to www.maximintegrated.com/packages. Note that a "+", "#", or "-" in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing pertains to the package regardless of RoHS status. PACKAGE TYPE PACKAGE CODE OUTLINE NO. LAND PATTERN NO. 8 PDIP P8-2 21-0043 -- 8 CEDIP J8-2 21-0045 -- 16 PDIP P16-1 21-0043 -- 16 Wide SO W16-1 21-0042 -- 16 CERDIP P16-1 21-0043 -- Chip Topography VCC VOUT VBATT RESET RESET 2 1 16 15 3 14 13 12 0.122" (3.098 mm) GND BATT ON WDO CE IN CE OUT 4 5 6 LOW LINE 7 8 9 OSC IN OSC SEL PFI 10 11 PFO WDI 0.086" (2.184 mm) www.maximintegrated.com Maxim Integrated 17 MAX690-MAX695 Microprocessor Supervisory Circuits Revision History REVISION NUMBER REVISION DATE 5 4/15 DESCRIPTION Revised Benefits and Features section PAGES CHANGED 1 For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim Integrated's website at www.maximintegrated.com. Maxim Integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim Integrated product. No circuit patent licenses are implied. Maxim Integrated reserves the right to change the circuitry and specifications without notice at any time. The parametric values (min and max limits) shown in the Electrical Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance. Maxim Integrated and the Maxim Integrated logo are trademarks of Maxim Integrated Products, Inc. (c) 2015 Maxim Integrated Products, Inc. 18 Mouser Electronics Authorized Distributor Click to View Pricing, Inventory, Delivery & Lifecycle Information: Maxim Integrated: MAX690CPA+ MAX690EPA+ MAX691CWE+ MAX691EWE+ MAX692CPA+ MAX693CPE+ MAX693CWE+ MAX694CPA+ MAX694EPA+ MAX695CPE+ MAX695CWE+ MAX690MJA/883B MAX691MJE/883B MAX692MJA/883B MAX693MJE/883B MAX694MJA/883B MAX695MJE/883B MAX691CPE+ MAX691CWE+T MAX691EPE+ MAX691EWE+T MAX692EPA+ MAX693CWE+T MAX693EPE+ MAX693EWE+ MAX693EWE+T MAX695CWE+T MAX695EPE+ MAX695EWE+ MAX695EWE+T MAX690MLP/883B MAX691MLP/883B MAX693EJE MAX690MJA MAX691EJE MAX691EWE MAX693MJE MAX194ACWE+T MAX194ACWE+ MAX690EJA