USER'S MANUAL ERRATA This document contains the corrections of errors, typos and omissions in the following document. Samsung 8-bit CMOS S3C8248/C8245/P8245/C8247/C8249/P8249 Microcontroller User's Manual Document Number: 22-S3-C8248/C8245/P8245/C8247/C8249/P8249 Publication: December 2000 S3C8248/C8245/P8245/C8247/C8249/P8249 USER'S MANUAL ERRATA ERRATA Samsung 8-bit CMOS S3C8248/C8245/P8245/C8247/C8249/P8249 Microcontroller User's Manual DocumentNumber: 22-S3-C8248/C8245/P8245/C8247/C8249/P8249 Publication: December 2000 REGISTER ARCHITECTURE In the S3C8248/C8245/C8247/C8249 implementation, the upper 64-byte area of register files is expanded two 64-byte areas, called set 1 and set 2. The upper 32-byte area of set 1 is further expanded two 32-byte register banks (bank 0 and bank 1), and the lower 32-byte area is a single 32-byte common area. In case of S3C8247/C8249/P8249 the total number of addressable 8-bit registers is 1122. Of these 1122 registers, 16 bytes are for CPU and system control registers, 16 bytes are for LCD data registers, 50 bytes are for peripheral control and data registers, 16 bytes are used as a shared working registers, and 1024 registers are for general-purpose use, page 0-page 4 (in case of S3C8248/C8245/P8245, page 0-page 4 except page 2, 3). You can always address set 1 register locations, regardless of which of the four register pages is currently selected. Set 1 locations, however, can only be addressed using register addressing modes. The extension of register space into separately addressable areas (sets, banks, and pages) is supported by various addressing mode restrictions, the select bank instructions, SB0 and SB1, and the register page pointer (PP). Specific register types and the area (in bytes) that they occupy in the register file are summarized in Table 2-1. Table 2-1. S3C8247/C8249/P8249 Register Type Summary Register Type Number of Bytes General-purpose registers (including the 16-byte common working register area, four 192-byte prime register area, and four 64-byte set 2 area) LCD data registers CPU and system control registers Mapped clock, peripheral, I/O control, and data registers 1,040 Total Addressable Bytes 1,122 16 16 50 Table 2-2. S3C8248/C8245/P8245 Register Type Summary Register Type Number of Bytes General-purpose registers (including the 16-byte common working register area, four 192-byte prime register area, and four 64-byte set 2 area) LCD data registers CPU and system control registers Mapped clock, peripheral, I/O control, and data registers 528 Total Addressable Bytes 610 16 16 50 DECEMBER 2000 USER'S MANUAL ERRATA S3C8248/C8245/P8245/C8247/C8249/P8249 FFH Set1 FFH FFH Bank 1 FFH 64 Bytes FFH Bank 0 and System Peripheral Control System and Registers Peripheral Control Registers (Register Addressing Mode) 32 Bytes E0H DFH Set 2 General-Purpose Data Registers E0H (Indirect Register, Indexed Mode, and Stack Operations) 256 Bytes C0H BFH General Purpose Register (Register Addressing Mode) Page 0 C0H ~ ~ Page 4 ~ 0FH 192 Bytes Prime Data Registers 16 Bytes Page 2 Page 1 Page 0 System Registers (Register Addressing Mode) D0H CFH Page3 ~ ~ Prime Data Registers ~ ~ ~ (All Addressing Modes) ~ (All addressing modes) LCD Display Reigster 00H 00H NOTE: In case of S3C8248/C8245/P8245, there are page 0, page 1, and page 4. Page 4 is for LCD display register, 16 bytes. Figure 2-2. Internal Register File Organization DECEMBER 2000