SN74AHC14-EP
HEX SCHMITT-TRIGGER INVERTER
SGDS027 – JULY 2002
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
D
Controlled Baseline
– One Assembly/Test Site, One Fabrication
Site
D
Extended Temperature Performance of
–55°C to 125°C
D
Enhanced Diminishing Manufacturing
Sources (DMS) Support
D
Enhanced Product Change Notification
D
Qualification Pedigree†
D
EPIC (Enhanced-Performance Implanted
CMOS) Process
†Component qualification in accordance with JEDEC and industry
standards to ensure reliable operation over an extended
temperature range. This includes, but is not limited to, Highly
Accelerated Stress Test (HAST) or biased 85/85, temperature
cycle, autoclave or unbiased HAST, electromigration, bond
intermetallic life, and mold compound life.
D
Operating Range 2-V to 5.5-V VCC
D
ESD Protection Exceeds 2000 V Per
MIL-STD-883, Method 3015; Exceeds 200 V
Using Machine Model (C = 200 pF, R = 0)
description
The SN74AHC14 contains six independent inverters. This device performs the Boolean function Y = A.
Each circuit functions as an independent inverter, but because of the Schmitt action, the inverters have different
input threshold levels for positive-going (VT+) and negative-going (VT–) signals.
ORDERING INFORMATION
TAPACKAGE‡ORDERABLE
PART NUMBER TOP-SIDE
MARKING
55°Cto125°C
SOIC – D Tape and reel SN74AHC14MDREP AHC14MEP
–
55°C
to
125°C
TSSOP – PW Tape and reel SN74AHC14MPWREP HA14MEP
‡Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines
are available at www.ti.com/sc/package.
FUNCTION TABLE
(each inverter)
INPUT
AOUTPUT
Y
H L
L H
logic diagram (positive logic)
YA
Copyright 2002, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
EPIC is a trademark of Texas Instruments.
1
2
3
4
5
6
7
14
13
12
11
10
9
8
1A
1Y
2A
2Y
3A
3Y
GND
VCC
6A
6Y
5A
5Y
4A
4Y
D OR PW PACKAGE
(TOP VIEW)
SN74AHC14-EP
HEX SCHMITT-TRIGGER INVERTER
SGDS027 – JULY 2002
2POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage range, VCC –0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage range, VI (see Note 1) –0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output voltage range, VO (see Note 1) –0.5 V to VCC + 0.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input clamp current, IIK (VI < 0) –20 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output clamp current, IOK (VO < 0 or VO > VCC) ±20 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous output current, IO (VO = 0 to VCC) ±25 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous current through VCC or GND ±50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Package thermal impedance, θJA (see Note 2): D package 86°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PW package 113°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, Tstg –65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
†Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only , and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may af fect device reliability.
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51-7.
recommended operating conditions (see Note 3)
MIN MAX UNIT
VCC Supply voltage 2 5.5 V
VIInput voltage 0 5.5 V
VOOutput voltage 0 VCC V
VCC = 2 V –50
m
A
IOH High-level output current VCC = 3.3 V ± 0.3 V –4
mA
VCC = 5 V ±0.5 V –8
mA
VCC = 2 V 50
m
A
IOL Low-level output current VCC = 3.3 V ± 0.3 V 4
mA
VCC = 5 V ±0.5 V 8
mA
TAOperating free-air temperature –55 125 °C
NOTE 3: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
SN74AHC14-EP
HEX SCHMITT-TRIGGER INVERTER
SGDS027 – JULY 2002
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
TEST CONDITIONS
VCC
TA = 25°C
MIN
MAX
UNIT
PARAMETER
TEST
CONDITIONS
V
CC MIN TYP MAX
MIN
MAX
UNIT
VT+
3 V 1.2 2.2 1.2 2.2
VT+
Positive-going 4.5 V 1.75 3.15 1.75 3.15 V
input threshold voltage 5.5 V 2.15 3.85 2.15 3.85
VT–
3 V 0.9 1.9 0.9 1.9
VT
–
Negative-going 4.5 V 1.35 2.75 1.35 2.75 V
input threshold voltage 5.5 V 1.65 3.35 1.65 3.35
∆V
3 V 0.3 1.2 0.3 1.2
∆VT
Hysteresis (VT+
–
VT)
4.5 V 0.4 1.4 0.4 1.4 V
Hysteresis
(VT
+ –
VT
–
)
5.5 V 0.5 1.6 0.5 1.6
2 V 1.9 2 1.9
IOH = –50
m
A3 V 2.9 3 2.9
VOH 4.5 V 4.4 4.5 4.4 V
IOH = –4 mA 3 V 2.58 2.48
IOH = –8 mA 4.5 V 3.94 3.8
2 V 0.1 0.1
IOL = 50
m
A3 V 0.1 0.1
VOL 4.5 V 0.1 0.1 V
IOL = 4 mA 3 V 0.36 0.5
IOL = 8 mA 4.5 V 0.36 0.5
IIVI = 5.5 V or GND 0 V to 5.5 V ±0.1 ±1
m
A
ICC VI = VCC or GND, IO = 0 5.5 V 2 20
m
A
CiVI = VCC or GND 5 V 2 10 pF
switching characteristics over recommended operating free-air temperature range,
VCC = 3.3 V ±0.3 V (unless otherwise noted) (see Figure 1)
PARAMETER
FROM TO LOAD TA = 25°C
MIN
MAX
UNIT
PARAMETER
(INPUT) (OUTPUT) CAPACITANCE MIN TYP MAX
MIN
MAX
UNIT
tPLH
A
Y
CL=15
p
F
8.3 12.8 1 15
ns
tPHL
A
Y
C
L =
15
pF
8.3 12.8 1 15
ns
tPLH
A
Y
CL=50
p
F
10.8 16.3 1 18.5
ns
tPHL
A
Y
C
L =
50
pF
10.8 16.3 1 18.5
ns
switching characteristics over recommended operating free-air temperature range,
VCC = 5 V ±0.5 V (unless otherwise noted) (see Figure 1)
PARAMETER
FROM TO LOAD TA = 25°C
MIN
MAX
UNIT
PARAMETER
(INPUT) (OUTPUT) CAPACITANCE MIN TYP MAX
MIN
MAX
UNIT
tPLH
A
Y
CL=15
p
F
5.5 8.6 1 10
ns
tPHL
A
Y
C
L =
15
pF
5.5 8.6 1 10
ns
tPLH
A
Y
CL=50
p
F
7 10.6 1 12
ns
tPHL
A
Y
C
L =
50
pF
7 10.6 1 12
ns
SN74AHC14-EP
HEX SCHMITT-TRIGGER INVERTER
SGDS027 – JULY 2002
4POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
noise characteristics, VCC = 5 V, CL = 50 pF, TA = 25°C (see Note 4)
PARAMETER MIN TYP MAX UNIT
VOL(P) Quiet output, maximum dynamic VOL 0.8 V
VOL(V) Quiet output, minimum dynamic VOL –0.4 V
VOH(V) Quiet output, minimum dynamic VOH 4.6 V
VIH(D) High-level dynamic input voltage 3.5 V
VIL(D) Low-level dynamic input voltage 1.5 V
NOTE 4: Characteristics are for surface-mount packages only.
operating characteristics, VCC = 5 V, TA = 25°C
PARAMETER TEST CONDITIONS TYP UNIT
Cpd Power dissipation capacitance No load, f = 1 MHz 9 pF
SN74AHC14-EP
HEX SCHMITT-TRIGGER INVERTER
SGDS027 – JULY 2002
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
50% VCC
VCC
VCC
0 V
0 V
th
tsu
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
Data Input
tPLH
tPHL
tPHL
tPLH
VOH
VOH
VOL
VOL
VCC
0 V
50% VCC
50% VCC
Input
Out-of-Phase
Output
In-Phase
Output
Timing Input
50% VCC
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
INVERTING AND NONINVERTING OUTPUTS
Output
Control
Output
W aveform 1
S1 at VCC
(see Note B)
Output
W aveform 2
S1 at GND
(see Note B)
VOL
VOH
tPZL
tPZH
tPLZ
tPHZ
≈VCC
0 V
50% VCC VOL + 0.3 V
50% VCC ≈0 V
VCC
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
tPLH/tPHL
tPLZ/tPZL
tPHZ/tPZH
Open Drain
Open
VCC
GND
VCC
TEST S1
VCC
0 V
50% VCC
tw
VOLTAGE WAVEFORMS
PULSE DURATION
Input
NOTES: A. CL includes probe and jig capacitance.
B. W aveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
W aveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, ZO = 50 Ω, tr ≤3 ns, tf ≤ 3 ns.
D. The outputs are measured one at a time with one input transition per measurement.
From Output
Under Test CL
(see Note A)
LOAD CIRCUIT FOR
3-STATE AND OPEN-DRAIN OUTPUTS
S1 VCC
RL = 1 kΩGND
From Output
Under Test CL
(see Note A)
Test
Point
LOAD CIRCUIT FOR
TOTEM-POLE OUTPUTS
Open
50% VCC
50% VCC 50% VCC
50% VCC
50% VCC 50% VCC
50% VCC 50% VCC
VOH – 0.3 V
Figure 1. Load Circuit and Voltage Waveforms
PACKAGE OPTION ADDENDUM
www.ti.com 31-May-2014
Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status
(1)
Package Type Package
Drawing Pins Package
Qty Eco Plan
(2)
Lead/Ball Finish
(6)
MSL Peak Temp
(3)
Op Temp (°C) Device Marking
(4/5)
Samples
SN74AHC14MDREP ACTIVE SOIC D 14 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -55 to 125 AHC14MEP
SN74AHC14MPWREP ACTIVE TSSOP PW 14 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -55 to 125 HA14MEP
V62/03605-01XE ACTIVE SOIC D 14 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -55 to 125 AHC14MEP
V62/03605-01YE ACTIVE TSSOP PW 14 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -55 to 125 HA14MEP
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
PACKAGE OPTION ADDENDUM
www.ti.com 31-May-2014
Addendum-Page 2
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF SN74AHC14-EP :
•Catalog: SN74AHC14
•Military: SN54AHC14
NOTE: Qualified Version Definitions:
•Catalog - TI's standard catalog product
•Military - QML certified for Military and Defense Applications
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
SN74AHC14MDREP SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1
SN74AHC14MPWREP TSSOP PW 14 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1
PACKAGE MATERIALS INFORMATION
www.ti.com 14-Jul-2012
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
SN74AHC14MDREP SOIC D 14 2500 333.2 345.9 28.6
SN74AHC14MPWREP TSSOP PW 14 2000 367.0 367.0 35.0
PACKAGE MATERIALS INFORMATION
www.ti.com 14-Jul-2012
Pack Materials-Page 2
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