09/21/10
www.irf.com 1
HEXFET® is a registered trademark of International Rectifier.
IRFZ44ZPbF
IRFZ44ZSPbF
IRFZ44ZLPbF
HEXFET® Power MOSFET
S
D
G
VDSS = 55V
RDS(on) = 13.9mΩ
ID = 51A
Features
l
Advanced Process Technology
l
Ultra Low On-Resistance
l
Dynamic dv/dt Rating
l
175°C Operating Temperature
l
Fast Switching
l
Repetitive Avalanche Allowed up to Tjmax
l
Lead-Free
Description
This HEXFET® Power MOSFET utilizes the latest
processing techniques to achieve extremely low
on-resistance per silicon area. Additional features
of this design are a 175°C junction operating
temperature, fast switching speed and improved
repetitive avalanche rating. These features
combine to make this design an extremely efficient
and reliable device for use in a wide variety of
applications.
D2Pak
IRFZ44ZSPbF
TO-220AB
IRFZ44ZPbF
TO-262
IRFZ44ZLPbF
Absolute Maximum Ratings
Parameter Units
ID @ TC = 25°C Continuous Drain Current, VGS @ 10V (Silicon Limited) A
ID @ TC = 100°C Continuous Drain Current, VGS @ 10V (See Fig. 9)
IDM Pulsed Drain Current
c
PD @TC = 25°C Maximum Power Dissipation W
Linear Derating Factor W/°C
VGS Gate-to-Source Voltage V
EAS Single Pulse Avalanche Energy (Thermally Limited)
d
mJ
EAS (tested) Single Pulse Avalanche Energy Tested Value
i
IAR Avalanche Current
c
A
EAR Repetitive Avalanche Energy
h
mJ
TJ Operating Junction and °C
TSTG Storage Temperature Range
Soldering Temperature, for 10 seconds
Mounting torque, 6-32 or M3 screw
Thermal Resistance
Parameter Typ. Max. Units
RθJC Junction-to-Case ––– 1.87 °C/W
RθCS Case-to-Sink, Flat, Greased Surface 0.50 –––
RθJA Junction-to-Ambient ––– 62
RθJA Junction-to-Ambient (PCB Mount, steady state)
j
––– 40
Max.
51
36
200
10 lbf•in (1.1N•m)
80
0.53
± 20
86
105
See Fig.12a,12b,15,16
300 (1.6mm from case )
-55 to + 175
PD - 95379A
IRFZ44Z/S/LPbF
2www.irf.com
Notes:
Repetitive rating; pulse width limited by
max. junction temperature. (See fig. 11).
Limited by TJmax, starting TJ = 25°C, L =0.18mH,
RG = 25Ω, IAS = 31A, VGS =10V. Part not
recommended for use above this value.
ISD ≤ 31A, di/dt ≤ 840A/µs, VDD ≤ V(BR)DSS,
TJ ≤ 175°C.
Pulse width ≤ 1.0ms; duty cycle ≤ 2%.
Coss eff. is a fixed capacitance that gives the same charging time
as Coss while VDS is rising from 0 to 80% VDSS .
Limited by TJmax , see Fig.12a, 12b, 15, 16 for typical repetitive
avalanche performance.
This value determined from sample failure population. 100%
tested to this value in production.
This is applied to D2Pak, when mounted on 1" square PCB
( FR-4 or G-10 Material ). For recommended footprint and
soldering techniques refer to application note #AN-994.
Rθ is rated at TJ of approximately 90°C.
S
D
G
S
D
G
Static @ TJ = 25°C (unless otherwise specified)
Parameter Min. T
y
p. Max. Units
V(BR)DSS Drain-to-Source Breakdown Volta
g
e55–––––– V
∆ΒVDSS
/
∆TJ Breakdown Volta
g
e Temp. Coefficien
t
––– 0.054 ––– V/°C
RDS(on) Static Drain-to-Source On-Resistanc
e
––– 11.1 13.9 mΩ
VGS(th) Gate Threshold Volta
g
e 2.0 ––– 4.0 V
g
fs Forward Transconductance 22 ––– ––– S
IDSS Drain-to-Source Leaka
g
e Current ––– ––– 20 µA
––– ––– 250
IGSS Gate-to-Source Forward Leaka
g
e ––– ––– 200 nA
Gate-to-Source Reverse Leaka
e ––– ––– -200
QgTotal Gate Char
g
e ––– 29 43 nC
Qgs Gate-to-Source Char
g
e ––– 7.2 11
Qgd Gate-to-Drain ("Miller") Char
g
e ––– 12 18
td(on) Turn-On Dela
y
Time ––– 14 ––– ns
trRise Time ––– 68 –––
td(off) Turn-Off Dela
y
Time ––– 33 –––
tfFall Time ––– 41 –––
LDInternal Drain Inductance ––– 4.5 ––– nH Between lead,
6mm (0.25in.)
LSInternal Source Inductance ––– 7.5 ––– from packa
g
e
and center of die contact
Ciss Input Capacitance ––– 1420 ––– pF
Coss Output Capacitance ––– 240 –––
Crss Reverse Transfer Capacitance ––– 130 –––
Coss Output Capacitance ––– 830 –––
Coss Output Capacitance ––– 190 –––
Coss eff. Effective Output Capacitance ––– 300 –––
Diode Characteristics
Parameter Min. T
y
p. Max. Units
ISContinuous Source Current ––– ––– 51
(Body Diode) A
ISM Pulsed Source Current ––– ––– 200
(Body Diode)
c
VSD Diode Forward Voltage ––– ––– 1.2 V
trr Reverse Recovery Time ––– 23 35 ns
Qrr Reverse Recover
y
Char
g
e ––– 17 26 nC
ton Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
VDS = 44V
VGS = 10V
f
ƒ = 1.0MHz, See Fig. 5
VGS = 0V, VDS = 1.0V, ƒ = 1.0MHz
VGS = 10V
f
MOSFET symbol
VGS = 0V
VDS = 25V
VGS = 0V, VDS = 44V, ƒ = 1.0MHz
Conditions
VGS = 0V, VDS = 0V to 44V
TJ = 25°C, IF = 31A, VDD = 28V
di/dt = 100A/µs
f
TJ = 25°C, IS = 31A, VGS = 0V
f
showing the
integral reverse
p-n junction diode.
VDS = VGS, ID = 250µA
VDS = 55V, VGS = 0V
VDS = 55V, VGS = 0V, TJ = 125°C
RG = 15Ω
ID = 31A
VDS = 25V, ID = 31A
VDD = 28V
ID = 31A
VGS = 20V
VGS = -20V
Conditions
VGS = 0V, ID = 250µA
Reference to 25°C, ID = 1mA
VGS = 10V, ID = 31A
f
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Fig 2. Typical Output Characteristics
Fig 1. Typical Output Characteristics
Fig 3. Typical Transfer Characteristics Fig 4. Typical Forward Transconductance
vs. Drain Current
0 1020304050
ID,Drain-to-Source Current (A)
0
10
20
30
40
50
60
Gfs, Forward Transconductance (S)
TJ = 25°C
TJ = 175°C
VDS = 10V
2 4 6 8 10 12
VGS, Gate-to-Source Voltage (V)
1.0
10
100
1000
ID, Drain-to-Source Current (Α)
TJ = 25°C
TJ = 175°C
VDS = 15V
≤60µs PULSE WIDTH
0.1 110 100
VDS, Drain-to-Source Voltage (V)
1
10
100
1000
ID, Drain-to-Source Current (A)
4.5V
VGS
TOP 15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM 4.5V
≤60µs PULSE WIDTH
Tj = 175°C
0.1 110 100
VDS, Drain-to-Source Voltage (V)
1
10
100
1000
ID, Drain-to-Source Current (A)
VGS
TOP 15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM 4.5V
≤60µs PULSE WIDTH
Tj = 25°C
4.5V
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Fig 8. Maximum Safe Operating Area
Fig 6. Typical Gate Charge vs.
Gate-to-Source Voltage
Fig 5. Typical Capacitance vs.
Drain-to-Source Voltage
Fig 7. Typical Source-Drain Diode
Forward Voltage
110 100
VDS, Drain-to-Source Voltage (V)
100
1000
10000
C, Capacitance(pF)
VGS = 0V, f = 1 MHZ
Ciss = Cgs + Cgd, C ds SHORTED
Crss = Cgd
Coss = Cds + Cgd
Coss
Crss
Ciss
0 5 10 15 20 25 30
QG Total Gate Charge (nC)
0.0
2.0
4.0
6.0
8.0
10.0
12.0
VGS, Gate-to-Source Voltage (V)
VDS= 44V
VDS= 28V
VDS= 11V
ID= 31A
0.0 0.5 1.0 1.5 2.0
VSD, Source-to-Drain Voltage (V)
0.01
0.10
1
10
100
1000
ISD, Reverse Drain Current (A)
TJ = 25°C
TJ = 175°C
VGS = 0V
1 10 100 1000
VDS, Drain-to-Source Voltage (V)
0.1
1
10
100
1000
ID, Drain-to-Source Current (A)
1msec
10msec
OPERATION IN THIS AREA
LIMITED BY R DS(on)
100µsec
Tc = 25°C
Tj = 175°C
Single Pulse
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Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
Fig 9. Maximum Drain Current vs.
Case Temperature
Fig 10. Normalized On-Resistance
vs. Temperature
25 50 75 100 125 150 175
TC , Case Temperature (°C)
0
5
10
15
20
25
30
35
40
45
50
55
ID, Drain Current (A)
-60 -40 -20 020 40 60 80 100 120 140 160 180
TJ , Junction Temperature (°C)
0.5
1.0
1.5
2.0
2.5
RDS(on) , Drain-to-Source On Resistance
(Normalized)
ID = 31A
VGS = 10V
1E-006 1E-005 0.0001 0.001 0.01 0.1 1
t1 , Rectangular Pulse Duration (sec)
0.001
0.01
0.1
1
10
Thermal Response ( Z thJC )
0.20
0.10
D = 0.50
0.02
0.01
0.05
SINGLE PULSE
( THERMAL RESPONSE ) Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
Ri (°C/W) τi (sec)
0.8487 0.00044
0.6254 0.00221
0.3974 0.01173
τJ
τJ
τ1
τ1
τ2
τ2τ3
τ3
R1
R1R2
R2R3
R3
τ
τC
Ci i/Ri
Ci= τi/Ri
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QG
QGS QGD
VG
Charge
10 V
Fig 13b. Gate Charge Test Circuit
Fig 13a. Basic Gate Charge Waveform
Fig 12c. Maximum Avalanche Energy
vs. Drain Current
Fig 12b. Unclamped Inductive Waveforms
Fig 12a. Unclamped Inductive Test Circuit
tp
V
(BR)DSS
I
AS
Fig 14. Threshold Voltage vs. Temperature
R
G
I
AS
0.01
Ω
t
p
D.U.T
L
VDS
+
-V
DD
DRIVER
A
15V
20V
VGS
1K
VCC
DUT
0
L
25 50 75 100 125 150 175
Starting TJ , Junction Temperature (°C)
0
50
100
150
200
250
300
350
400
EAS , Single Pulse Avalanche Energy (mJ)
ID
TOP 3.8A
5.5A
BOTTOM 31A
-75 -50 -25 025 50 75 100 125 150 175 200
TJ , Temperature ( °C )
1.0
2.0
3.0
4.0
VGS(th) Gate threshold Voltage (V)
ID = 250µA
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Fig 15. Typical Avalanche Current vs.Pulsewidth
Fig 16. Maximum Avalanche Energy
vs. Temperature
Notes on Repetitive Avalanche Curves , Figures 15, 16:
(For further info, see AN-1005 at www.irf.com)
1. Avalanche failures assumption:
Purely a thermal phenomenon and failure occurs at a
temperature far in excess of Tjmax. This is validated for
every part type.
2. Safe operation in Avalanche is allowed as long asTjmax is
not exceeded.
3. Equation below based on circuit and waveforms shown in
Figures 12a, 12b.
4. PD (ave) = Average power dissipation per single
avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for
voltage increase during avalanche).
6. Iav = Allowable avalanche current.
7. ∆T = Allowable rise in junction temperature, not to exceed
Tjmax (assumed as 25°C in Figure 15, 16).
tav = Average time in avalanche.
D = Duty cycle in avalanche = tav ·f
ZthJC(D, tav) = Transient thermal resistance, see figure 11)
PD (ave) = 1/2 ( 1.3·BV·Iav) = DT/ ZthJC
Iav = 2DT/ [1.3·BV·Zth]
EAS (AR) = PD (ave)·tav
1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01
tav (sec)
0.1
1
10
100
Avalanche Current (A)
0.05
Duty Cycle = Single Pulse
0.10
Allowed avalanche Current vs
avalanche pulsewidth, tav
assuming ∆Tj = 25°C due to
avalanche losses
0.01
25 50 75 100 125 150 175
Starting TJ , Junction Temperature (°C)
0
20
40
60
80
100
EAR , Avalanche Energy (mJ)
TOP Single Pulse
BOTTOM 1% Duty Cycle
ID = 31A
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Fig 17. Peak Diode Recovery dv/dt Test Circuit for N-Channel
HEXFET® Power MOSFETs
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
P.W. Period
di/dt
Diode Recovery
dv/dt
Ripple ≤5%
Body Diode Forward Drop
Re-Applied
Voltage
Reverse
Recovery
Current
Body Diode Forward
Current
VGS=10V
VDD
ISD
Driver Gate Drive
D.U.T. ISD Waveform
D.U.T. VDS Waveform
Inductor Curent
D = P. W .
Period
* VGS = 5V for Logic Level Devices
*
+
-
+
+
+
-
-
-
RGVDD
• dv/dt controlled by RG
• Driver same type as D.U.T.
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
D.U.T
VDS
90%
10%
VGS
t
d(on)
t
r
t
d(off)
t
f
VDS
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
RD
VGS
RG
D.U.T.
10V
+
-
VDD
Fig 18a. Switching Time Test Circuit
Fig 18b. Switching Time Waveforms
IRFZ44Z/S/LPbF
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TO-220AB packages are not recommended for Surface Mount Application.
TO-220AB Part Marking Information
TO-220AB Package Outline
Dimensions are shown in millimeters (inches)
LOT CODE 1789
EXAMPLE: THIS IS AN IRF1010
Note: "P" in as sembly line position
indi cates "L ead - F r ee"
IN THE ASSEMBLY LINE "C"
AS S EMBLED ON WW 19, 2000
INTERNATIONAL PART NUMBER
RECTIFIER
LOT CODE
ASSEMBLY
LOGO
YEAR 0 = 2000
DAT E CODE
WEEK 19
LINE C
Notes:
1. For an Automotive Qualified version of this part please seehttp://www.irf.com/product-info/auto/
2. For the most current drawing please refer to IR website at http://www.irf.com/package/
IRFZ44Z/S/LPbF
10 www.irf.com
D2Pak (TO-263AB) Part Marking Information
D2Pak (TO-263AB) Package Outline
Dimensions are shown in millimeters (inches)
DAT E CODE
YEAR 0 = 2000
WE E K 02
A = AS S E MB L Y S I T E CODE
RECTIFIER
INTERNATIONAL PART NUMBER
P = DE S IGNAT E S L E AD - F R E E
PRODUCT (OPTIONAL)
F530S
IN THE ASS EMBLY LINE "L"
AS SEMB LE D ON WW 02, 2000
THIS IS AN IRF530S WITH
LOT CODE 8024 INT E RNAT IONAL
LOGO
RECTIFIER
LOT CODE
AS S E MB L Y YEAR 0 = 2000
PART NUMBER
DATE CODE
LINE L
WE E K 02
OR
F530S
LOGO
ASSEMBLY
LOT CODE
Notes:
1. For an Automotive Qualified version of this part please seehttp://www.irf.com/product-info/auto/
2. For the most current drawing please refer to IR website at http://www.irf.com/package/
IRFZ44Z/S/LPbF
www.irf.com 11
TO-262 Part Marking Information
TO-262 Package Outline
Dimensions are shown in millimeters (inches)
LOGO
RECTIFIER
INTERNATIONAL
LOT CODE
ASSEMBLY
LOGO
RECTIFIER
INTERNAT IONAL
DAT E CODE
WEE K 19
YEAR 7 = 1997
PART NUMBER
A = AS S E MB L Y S I T E CODE
OR
PRODUCT (OPT IONAL)
P = DE S IGNAT E S L E AD- F R E E
EXAMPL E : T H IS IS AN IRL 3103L
LOT CODE 1789
ASSEMBLY
PART NUMBER
DATE CODE
WEEK 19
LINE C
LOT CODE
YEAR 7 = 1997
AS S E MBLE D ON WW 19, 1997
IN THE ASSEMBLY LINE "C"
Notes:
1. For an Automotive Qualified version of this part please seehttp://www.irf.com/product-info/auto/
2. For the most current drawing please refer to IR website at http://www.irf.com/package/
IRFZ44Z/S/LPbF
12 www.irf.com
Data and specifications subject to change without notice.
This product has been designed and qualified for the Industrial market.
Qualification Standards can be found on IR’s Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information. 09/2010
TO-220AB package is not recommended for Surface Mount Application.
D2Pak Tape & Reel Information
Dimensions are shown in millimeters (inches)
3
4
4
TRR
FEED DIRECTION
1.85 (.073)
1.65 (.065)
1.60 (.063)
1.50 (.059)
4.10 (.161)
3.90 (.153)
TRL
FEED DIRECTION
10.90 (.429)
10.70 (.421)
16.10 (.634)
15.90 (.626)
1.75 (.069)
1.25 (.049)
11.60 (.457)
11.40 (.449) 15.42 (.609)
15.22 (.601)
4.72 (.136)
4.52 (.178)
24.30 (.957)
23.90 (.941)
0.368 (.0145)
0.342 (.0135)
1.60 (.063)
1.50 (.059)
13.50 (.532)
12.80 (.504)
330.00
(14.173)
MAX.
27.40 (1.079)
23.90 (.941)
60.00 (2.362)
MIN.
30.40 (1.197)
MAX.
26.40 (1.039)
24.40 (.961)
NOTES :
1. COMFORMS TO EIA-418.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION MEASURED @ HUB.
4. INCLUDES FLANGE DISTORTION @ OUTER EDGE.