Si4831BDY Vishay Siliconix P-Channel 30-V (D-S) MOSFET with Schottky Diode FEATURES MOSFET PRODUCT SUMMARY RDS(on) () ID (A)a 0.042 at VGS = - 10 V - 6.6 0.065 at VGS = - 4.5 V - 5.3 VDS (V) - 30 * Halogen-free According to IEC 61249-2-21 Available * LITTLE FOOT(R) Plus Power MOSFET * 100 % Rg Tested Qg (Typ.) 7.8 APPLICATIONS SCHOTTKY PRODUCT SUMMARY VKA (V) VF (V) Diode Forward Voltage ID (A)a 30 0.53 V at 3 A 3.0 * HDD * Asynchronous Rectification SO-8 A A S G 8 K 2 7 K 3 6 D 4 5 D 1 S K D A G Top View Ordering Information: Si4831BDY-T1-E3 (Lead (Pb)-free) Si4831BDY-T1-GE3 (Lead (Pb)-free and Halogen-free) P-Channel MOSFET ABSOLUTE MAXIMUM RATINGS TA = 25 C, unless otherwise noted Parameter Drain-Source Voltage (MOSFET) Reverse Voltage (Schottky) Gate-Source Voltage (MOSFET) Continuous Drain Current (TJ = 150 C) (MOSFET) Symbol VDS VKA VGS TC = 25 C TC = 70 C TA = 25 C TA = 70 C TC = 25 C TA = 25 C - 5.1b, c - 3.9b, c - 30 - 2.7 IS - 1.6b, c - 3b - 20 3.3 2.1 IF Average Forward Current (Schottky) Pulsed Forward Current (Schottky) Maximum Power Dissipation (MOSFET and Schottky) ID IDM Pulsed Drain Current (MOSFET) Continuous Source Current (MOSFET Diode Conduction) Limit - 30 - 30 20 - 6.6 - 5.2 IFM TC = 25 C TC = 70 C TA = 25 C TA = 70 C PD 2.0b, c 1.2b, c - 55 to 150 TJ, Tstg Operating Junction and Storage Temperature Range Unit V A W C THERMAL RESISTANCE RATINGS Parameter Maximum Junction-to-Ambient (MOSFET and Schottky)b, c, d Maximum Junction-to-Foot (Drain) (MOSFET and Schottky) Notes: a. Based on TC = 25 C. b. Surface Mounted on FR4 board. c. t 10 s. d. Maximum under Steady State conditions is 110 C/W. Document Number: 70483 S09-0394-Rev. B, 09-Mar-09 Symbol RthJA RthJF Typical 53 30 Maximum 62.5 37 Unit C/W www.vishay.com 1 Si4831BDY Vishay Siliconix MOSFET SPECIFICATIONS TJ = 25 C, unless otherwise noted Parameter Symbol Test Conditions Min. VDS VDS = 0 V, ID = - 250 A - 30 Typ. Max. Unit Static Drain-Source Breakdown Voltage VDS/TJ VDS Temperature Coefficient VGS(th) Temperature Coefficient VGS(th)/TJ Gate Threshold Voltage Gate-Body Leakage mV/C 3.6 VDS = VGS, ID = - 250 A -3 V IGSS VDS = 0 V, VGS = 20 V 100 nA VDS = - 30 V, VGS = 0 V -1 VDS = - 30 V, VGS = 0 V, TJ = 75 C - 10 IDSS On-State Drain Currenta ID(on) Forward Transconductancea - 30 ID = 250 A VGS(th) Zero Gate Voltage Drain Current Drain-Source On-State Resistancea V RDS(on) gfs VDS - 5 V, VGS = - 10 V -1 - 10 A A VGS = - 10 V, ID = - 5 A 0.034 0.042 VGS = - 4.5 V, ID = - 3 A 0.052 0.065 VDS = - 15 V, ID = - 5 A 11 S b Dynamic Input Capacitance Ciss Output Capacitance Coss Reverse Transfer Capacitance Crss Total Gate Charge Qg Gate-Source Charge Qgs Gate-Drain Charge Qgd Gate Resistance Rg 625 VDS = - 15 V, VGS = 0 V, f = 1 MHz VDS = - 15 V, VGS = - 10 V, ID = - 5 A VDS = - 15 V, VGS = - 4.5 V, ID = - 5 A Turn-On Delay Time tr td(off) Turn-Off Delay Time Fall Time Turn-On Delay Time 1.6 nC 3.5 7 35 55 VDD = - 15 V, RL = 3 ID - 5 A, VGEN = - 4.5 V, Rg = 1 100 150 22 35 14 12 20 8 16 8 16 24 40 7 14 VDD = - 15 V, RL = 3 ID - 5 A, VGEN = - 10 V, Rg = 1 tf Fall Time 26 12 tf td(off) Turn-Off Delay Time 17 7.8 td(on) tr Rise Time pF 115 f = 1 MHz td(on) Rise Time 150 ns Drain-Source Body Diode Characteristics Continous Source-Drain Diode Current a IS Pulse Diode Forward Current ISM Body Diode Voltage VSD TC = 25 C - 3.3 - 30 IS = - 1.4 A, VGS = 0 V - 0.78 - 1.2 A V Body Diode Reverse Recovery Time trr 30 45 ns Body Diode Reverse Recovery Charge Qrr 15 25 nC Reverse Recovery Fall Time ta Reverse Recovery Rise Time tb IF = - 2 A, dI/dt = 100 A/s, TJ = 25 C 14 16 ns Notes: a. Pulse test; pulse width 300 s, duty cycle 2 %. b. Guaranteed by design, not subject to production testing. www.vishay.com 2 Document Number: 70483 S09-0394-Rev. B, 09-Mar-09 Si4831BDY Vishay Siliconix SCHOTTKY SPECIFICATIONS TJ = 25 C, unless otherwise noted Parameter Symbol Forward Voltage Drop VF Maximum Reverse Leakage Current Irm Junction Capacitance CT Test Conditions IF = 3 A IF = 3 A, TJ = 125 C VR = 30 V VR = 30 V, TJ = 75 C VR = 30 V, TJ = 125 C VR = 15 V Min. Typ. 0.485 0.42 0.008 0.4 6.5 102 Max. 0.53 0.47 0.1 5 20 Unit V mA pF Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Document Number: 70483 S09-0394-Rev. B, 09-Mar-09 www.vishay.com 3 Si4831BDY Vishay Siliconix MOSFET TYPICAL CHARACTERISTICS 25 C, unless otherwise noted 30 2.0 VGS = 10 thru 5 V 1.6 18 I D - Drain Current (A) I D - Drain Current (A) 24 4V 12 6 1.2 TJ = 25 C 0.8 TJ = 125 C 0.4 3V - 55 C 0 0.0 0.5 1.0 1.5 2.0 0.0 0.0 2.5 0.8 VDS - Drain-to-Source Voltage (V) 1000 0.08 800 C - Capacitance (pF) R DS(on) - On-Resistance () 3.2 4.0 Transfer Characteristics 0.10 VGS = 4.5 V VGS = 10 V 0.04 2.4 VGS - Gate-to-Source Voltage (V) Output Characteristics 0.06 1.6 Ciss 600 400 Coss 200 0.02 Crss 0 0.00 0 6 12 18 24 0 30 6 12 24 30 VDS - Drain-to-Source Voltage (V) ID - Drain Current (A) On-Resistance vs. Drain Current and Gate Voltage Capacitance 10 1.8 VDS = 10 V ID = 5 A ID = 5 A VGS = 10 V 8 VDS = 15 V R DS(on) - On-Resistance (Normalized) VGS - Gate-to-Source Voltage (V) 18 6 VDS = 20 V 4 1.5 1.2 VGS = 4.5 V 0.9 2 0 0 3.6 7.2 10.8 Qg - Total Gate Charge (nC) Gate Charge www.vishay.com 4 14.4 18.0 0.6 - 50 - 25 0 25 50 75 100 125 150 TJ - Junction Temperature (C) On-Resistance vs. Junction Temperature Document Number: 70483 S09-0394-Rev. B, 09-Mar-09 Si4831BDY Vishay Siliconix MOSFET TYPICAL CHARACTERISTICS 25 C, unless otherwise noted 0.20 100 RDS(on) - On-Resistance () I S - Source Current (A) ID = 5 A 10 TJ = 150 C TJ = 25 C 1 0.16 0.12 0.08 TA = 125 C 0.04 TA = 25 C 0 0 0.0 0.3 0.6 0.9 1.2 0 1.5 1 2 4 5 6 7 8 9 10 VGS - Gate-to-Source Voltage (V) VSD - Source-to-Drain Voltage (V) On-Resistance vs. Gate-to-Source Voltage Source-Drain Diode Forward Voltage 0.5 60 ID = 250 A 48 Power (W) 0.3 VGS(th) Variance (V) 3 ID = 5 mA 0.1 36 24 - 0.1 12 - 0.3 - 50 - 25 0 25 50 75 100 125 150 0 0.001 0.01 0.1 1 TJ - Temperature (C) Time (s) Threshold Voltage Single Pulse Power, Junction-to-Ambient 10 100 Limited by RDS(on)* I D - Drain Current (A) 10 1 ms 1 10 ms 100 ms 0.1 TA = 25 C Single Pulse 1s 10 s DC 0.01 0.1 * VGS 1 10 100 VDS - Drain-to-Source Voltage (V) minimum VGS at which RDS(on) is specified Safe Operating Area, Junction-to-Case Document Number: 70483 S09-0394-Rev. B, 09-Mar-09 www.vishay.com 5 Si4831BDY Vishay Siliconix MOSFET TYPICAL CHARACTERISTICS 25 C, unless otherwise noted 8 ID - Drain Current (A) 6 5 3 2 0 0 25 50 75 100 125 150 TC - Case Temperature (C) 4.0 1.5 3.2 1.2 Power Dissipation (W) Power Dissipation (W) Current Derating* 2.4 1.6 0.8 0.9 0.6 0.3 0.0 0.0 0 25 50 75 100 125 150 0 25 50 75 100 125 TC - Case Temperature (C) TA - Ambient Temperature (C) Power Derating, Junction-to-Foot Power Derating, Junction-to-Ambient 150 * The power dissipation PD is based on TJ(max) = 150 C, using junction-to-case thermal resistance, and is more useful in settling the upper dissipation limit for cases where additional heatsinking is used. It is used to determine the current rating, when this rating falls below the package limit. www.vishay.com 6 Document Number: 70483 S09-0394-Rev. B, 09-Mar-09 Si4831BDY Vishay Siliconix MOSFETS TYPICAL CHARACTERISTICS 25 C, unless otherwise noted 1 Normalized Effective Transient Thermal Impedance Duty Cycle = 0.5 0.2 Notes: 0.1 0.1 PDM 0.05 t1 0.02 t2 1. Duty Cycle, D = Single Pulse 3. TJM - TA = PDMZthJA(t) t1 t2 2. Per Unit Base = RthJA = 65 C/W 4. Surface Mounted 0.01 10-4 10-3 10-2 10-1 1 Square Wave Pulse Duration (s) 10 100 1000 Normalized Thermal Transient Impedance, Junction-to-Ambient Normalized Effective Transient Thermal Impedance 1 Duty Cycle = 0.5 0.2 0.1 0.1 0.05 0.02 Single Pulse 0.01 10-4 10-3 10-2 10-1 Square Wave Pulse Duration (s) 1 10 Normalized Thermal Transient Impedance, Junction-to-Foot Document Number: 70483 S09-0394-Rev. B, 09-Mar-09 www.vishay.com 7 Si4831BDY Vishay Siliconix SCHOTTKY TYPICAL CHARACTERISTICS 25 C, unless otherwise noted 100 10 30 V 1 I F - Forward Current (A) I R - Reverse Current (A) 10 10 V 0.1 0.01 TJ = 150 C TJ = 25 C 1 0.001 0.0001 0 25 50 75 100 125 0 0.0 150 0.1 0.2 0.4 0.5 0.6 VF - Forward Voltage Drop (V) TJ - Temperature (C) Reverse Current vs. Junction Temperature Forward Voltage Drop 500 C T - Capacitance (pF) 400 300 200 100 0 0 6 12 18 24 30 VKA - Reverse Voltage (V) Capacitance Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see www.vishay.com/ppg?70483. www.vishay.com 8 Document Number: 70483 S09-0394-Rev. B, 09-Mar-09 Package Information Vishay Siliconix SOIC (NARROW): 8-LEAD JEDEC Part Number: MS-012 8 6 7 5 E 1 3 2 H 4 S h x 45 D C 0.25 mm (Gage Plane) A e B All Leads q A1 L 0.004" MILLIMETERS INCHES DIM Min Max Min Max A 1.35 1.75 0.053 0.069 A1 0.10 0.20 0.004 0.008 B 0.35 0.51 0.014 0.020 C 0.19 0.25 0.0075 0.010 D 4.80 5.00 0.189 0.196 E 3.80 4.00 0.150 e 0.101 mm 1.27 BSC 0.157 0.050 BSC H 5.80 6.20 0.228 0.244 h 0.25 0.50 0.010 0.020 L 0.50 0.93 0.020 0.037 q 0 8 0 8 S 0.44 0.64 0.018 0.026 ECN: C-06527-Rev. I, 11-Sep-06 DWG: 5498 Document Number: 71192 11-Sep-06 www.vishay.com 1 VISHAY SILICONIX TrenchFET(R) Power MOSFETs Application Note 808 Mounting LITTLE FOOT(R), SO-8 Power MOSFETs Wharton McDaniel Surface-mounted LITTLE FOOT power MOSFETs use integrated circuit and small-signal packages which have been been modified to provide the heat transfer capabilities required by power devices. Leadframe materials and design, molding compounds, and die attach materials have been changed, while the footprint of the packages remains the same. See Application Note 826, Recommended Minimum Pad Patterns With Outline Drawing Access for Vishay Siliconix MOSFETs, (http://www.vishay.com/ppg?72286), for the basis of the pad design for a LITTLE FOOT SO-8 power MOSFET. In converting this recommended minimum pad to the pad set for a power MOSFET, designers must make two connections: an electrical connection and a thermal connection, to draw heat away from the package. 0.288 7.3 0.050 1.27 0.196 5.0 0.027 0.69 0.078 1.98 0.2 5.07 Figure 1. Single MOSFET SO-8 Pad Pattern With Copper Spreading Document Number: 70740 Revision: 18-Jun-07 0.050 1.27 0.088 2.25 0.088 2.25 0.027 0.69 0.078 1.98 0.2 5.07 Figure 2. Dual MOSFET SO-8 Pad Pattern With Copper Spreading The minimum recommended pad patterns for the single-MOSFET SO-8 with copper spreading (Figure 1) and dual-MOSFET SO-8 with copper spreading (Figure 2) show the starting point for utilizing the board area available for the heat-spreading copper. To create this pattern, a plane of copper overlies the drain pins. The copper plane connects the drain pins electrically, but more importantly provides planar copper to draw heat from the drain leads and start the process of spreading the heat so it can be dissipated into the ambient air. These patterns use all the available area underneath the body for this purpose. Since surface-mounted packages are small, and reflow soldering is the most common way in which these are affixed to the PC board, "thermal" connections from the planar copper to the pads have not been used. Even if additional planar copper area is used, there should be no problems in the soldering process. The actual solder connections are defined by the solder mask openings. By combining the basic footprint with the copper plane on the drain pins, the solder mask generation occurs automatically. A final item to keep in mind is the width of the power traces. The absolute minimum power trace width must be determined by the amount of current it has to carry. For thermal reasons, this minimum width should be at least 0.020 inches. The use of wide traces connected to the drain plane provides a low impedance path for heat to move away from the device. www.vishay.com 1 APPLICATION NOTE In the case of the SO-8 package, the thermal connections are very simple. Pins 5, 6, 7, and 8 are the drain of the MOSFET for a single MOSFET package and are connected together. In a dual package, pins 5 and 6 are one drain, and pins 7 and 8 are the other drain. For a small-signal device or integrated circuit, typical connections would be made with traces that are 0.020 inches wide. Since the drain pins serve the additional function of providing the thermal connection to the package, this level of connection is inadequate. The total cross section of the copper may be adequate to carry the current required for the application, but it presents a large thermal impedance. Also, heat spreads in a circular fashion from the heat source. In this case the drain pins are the heat sources when looking at heat spread on the PC board. 0.288 7.3 Application Note 826 Vishay Siliconix RECOMMENDED MINIMUM PADS FOR SO-8 0.172 (4.369) 0.028 0.022 0.050 (0.559) (1.270) 0.152 (3.861) 0.047 (1.194) 0.246 (6.248) (0.711) Recommended Minimum Pads Dimensions in Inches/(mm) Return to Index APPLICATION NOTE Return to Index www.vishay.com 22 Document Number: 72606 Revision: 21-Jan-08 Legal Disclaimer Notice www.vishay.com Vishay Disclaimer ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE. 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