Preliminary Data
CoolSET™-II
Off-Line SMPS Current Mode
Controller with 650V/800V
CoolMOS™ on board
Never stop thinking.
Power Management & Supply
Datasheet, Version 2.2, February 2001
Editio n 2001-02-27
Published by Infineon Technologies AG,
St.-Martin-Strasse 53,
D-81541 München
© Infineon Technologies AG 1999.
All Ri ghts Rese rved.
Attention ple ase !
The information herein is given to describe certain components and shall not be considered as warranted char-
acteristics.
Ter m s of deliver y and rights to technica l change reserved.
We hereby disclaim any and all warranties, including but not limited to warranties of non-infringement, regarding
circuits, descriptions and charts stated herein.
Infin eon Technolog ies is an ap proved CECC manufacturer.
Information
For further inf ormation on technology, delivery terms and conditions and prices please contact your nearest Infin-
eon Technologies Off ice in Germany or our In fineon Techn ologies Rep r esentatives worldwide (see ad dress list).
Warnings
Due to technical requirements comp onents may contain dange rous substanc es. For informatio n on the types in
ques tion please contac t your ne arest Inf ineon Technologies Off i ce.
Infineon Technologies Components ma y only be used in lif e-support devices or systems with the express written
approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure
of that life-support device or system, or to aff e ct t he saf ety or effectiveness of that device or system. Lif e support
devices or systems are intended to be implanted in the human body, or to support an d/or maintain and sustain
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be endangered.
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CoolSET™-II
Revision History: 2001-02-27 Datasheet
Previous Version: First One
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Datasheet 3 February 2001
Preliminary Data
Type Sales Code Package UDS RDSon 230VAC ±15%1)
1) Maximum practical continous power in an open frame design at 50°C ambient with copper area on PCB = 6cm²
85-265 VAC1)
ICE2A165 P-DIP-8-6 650V 3,0Ω39W 21W
ICE2A265 P-DIP-8-6 650V 1,1Ω53W 34W
ICE2A365 P-DIP-8-6 650V 0,5Ω60W 47W
ICE2A180 P-DIP-8-6 800V 3,0Ω39W 21W
ICE2A280 P-DIP-8-6 800V 0,9Ω55W 37W
CoolSET™-II
ICE2A165/265/365
ICE2A180/280
P-DIP-8-6
Preliminary Specification
C
So ft S ta rt
C
VCC
R
Start-up
VCC
-
Converter
DC O utput
+
CoolSET™-II
Snubber
Power
Management
Protection Unit
S oft-Sta rt Co ntr o l P WM Co n tro ller
Current Mode
FB
8 5 ... 27 0 V A C
Drain
Feedback
Feedback
T y p ic a l A p plic a tio n
CoolMOS™
PWM-Controller
Low P ower
StandBy
P re c is e low to lera n c e
Peak Current Lim itation
R
Sense
Isense
GND
SoftS
Off-Line SMPS Current Mode Controller with
650V/800V CoolMOS™ on board
Product H ighlights
• Best of Class in DIP8 Package
• No Heatsink required
• High Sophisticated Protection Unit
• Auto Rest art Mode
• Low Power Standby Mode
Features
• 650V/80 0V Avalanche Rugged CoolMOS™
• Only few external Components required
• Input Undervoltage Lockout
• 100kHz Switching Frequency
• Max Duty Cycle 72%
• Low Power Standby Mode to support
“Blue Angle” No rm
• Thermal Shut Down with Auto Restart
• Ove r l oad and Open Loop Protect io n
• Overvoltage Protect ion during Au to Restart
• Adjustable Peak Curre nt Limitation via
External Resistor
• Overall Tolerance of Current Limiting <=±5%
• Internal Leading Edge Blanking
• User defined Soft Start
• Soft Switching for Low EMI
Description
The second generation COOLSET™-II provides several
special enhancements to satisfy the needs for low power
standby and protection features. In standby mode
frequency reduction is used to lower the power
consumption and support a stable output voltage in this
mode. The frequency reduction is limited to 21 kHz to avoid
audible noise. In case of failure modes like open loop,
overvoltage or overload due to short circuit the device
switches in Auto Restart Mode which is controlled by the
internal protection unit. By means of the internal precise
peak current limitation the dimension of the transformer and
the secondary diode can be lower which leads to more cost
efficiency.
CoolSET™-II
Table of Contents Page
Preliminary Spec ification
Datasheet 4 February 2001
Preliminary Data
1 Pin Configuration and Functionality . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5
1.1 Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5
1.2 Pin Functionality . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5
2 Representative Blockdiagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6
3 Fun ct i o nal Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7
3.1 Power Management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7
3.2 Improved Current Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7
3.2.1 PWM-OP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8
3.2.2 PWM-Comparator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8
3.3 Soft-Start . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9
3.4 Oscillator and Frequency Reduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
3.4.1 Oscillator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10
3.4.2 Frequency Reduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10
3.5 Current Limiting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 0
3.5.1 Leading Edge Blanking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10
3.5.2 Propagation Delay Compensation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11
3.6 PWM-Latch . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11
3.7 Driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11
3.8 Protection Unit (Auto Restart Mode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12
3.8.1 Overload & Open loop with normal load . . . . . . . . . . . . . . . . . . . . . . . . .12
3.8.2 Overvoltage due to open loop with no load . . . . . . . . . . . . . . . . . . . . . . .13
3.8.3 Thermal shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13
4 Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14
4.1 Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14
4.2 Operating Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14
4.3 Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 5
4.3.1 Supply Section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15
4.3.2 Internal Voltage Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15
4.3.3 Control Section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15
4.3.4 Protection Unit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16
4.3.5 Current Limiting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16
4.3.6 CoolMOS™ Section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17
5 Typical Performance Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . .18
6 Outline Dimension . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .22
Datasheet 5 February 2001
Preliminary Data
Preliminary Specification
CoolSET™-II
ICE2A165/265/365
ICE2A180/280
Pin Configuration and Fu nctionality
1.1 Pin Configuration
Figure 1 Pin Configuration (top view)
1.2 Pin Functionality
SoftS Pin (Soft Start & Auto Restart Control)
This pin co mbines the function of Soft Start i n case of
Start Up an d Auto Rest art Mode an d the cont rolling of
the Auto Restart Mode in case of an error detection.
FB Pin (Feedback)
The information about the regulation is provided by the
FB Pin to the internal Protection Unit and to the internal
PWM-Comparator to control the duty cycle.
Isense Pin (Current Sense)
The Current Sense pin senses the voltage developed
on the series resistor inserted in the source of the
integrated CoolMOS™. When Isense reaches the
internal thresho ld of the Curre nt Limi t Co mpara tor, the
Driver output is disabled. By this means the Over
Current Detecti on is realized.
Furthermore the current information is provide d for the
PWM-Comparator to realize the Current Mode.
Drain (Drain of integrated CoolMOS™)
Pin Drain is the connection to the Drain of the internal
CoolMOSTM.
VCC (Power su ppl y)
This pin is the positiv supply of the IC. The operating
range is bet ween 8.5V and 21V.
To provide overvoltage protection the driver gets
disabled when the voltage becomes higher than 16.5V
during Start Up Phase.
GND (Ground)
This pin is the ground of the primary side of the SMPS.
Pin Symbol Function
1 SoftS Soft-Start
2 FB Feedback
3 Isens e Contr oller Current Sen s e Input,
CoolMOS™ Source Output
4Drain
650V1)/800V CoolMOS™ Drain
1) at Tj = 110°C
5Drain
650V1)/800V CoolMOS™ Drain
6 N.C. Not connected
7 VCC Controller Sup ply Voltage
8 GND Controller Ground
1
6
7
8
4
3
2
5
VCCFB
Isense
Drain
SoftS
N.C
GND
Drain
Package P-DIP-8-6
1 Pin Co nfiguration and Functionality
CoolSET™-II
ICE2A165/265/365
ICE2A180/280
Representative Blockdiagram
Preliminary Specification
Datasheet 6 February 2001
Preliminary Data
2 Representative Bloc kdiagram
Figur e 2 Repre s entati v e Block di agram
Thermal
Shutdown
T
j
>140°C
Internal
Bias
Voltage
Reference
6.5V
4.8V
Leading Edge
Blanking
200ns
Undervoltage
Lockout
Oscillator
Duty Cycle
max
Current-Limit
Comparator
x3.65
Soft-Start
Comparator
Current Limiting
PWM O P
Improved Current Mode
So ft Start
13.5V
8.5V
6.5V C2
C1
16.5V
4.0V
R
FB
6.5V
Protection Unit
Power-Down
Reset
Power-Up
Reset
Power Managem ent
C
Soft-Start
C
VCC
R
Start-up
85 ... 270 V AC C
Line
VCC
GND
+
-
Converter
DC Output
V
OUT
21.5-100kHz
CoolSET™-II
Optocoupler
Snubber
Spike
Blanking
5
µ
s
PWM
Comparator
R
SQ
Q
Error-Latch
C4
5.3V
C3
4.8V
R
Soft-Start
Gate
Driver
G3
G2
G1
G4
SoftS
5.3V
T1
V
csth
Propagation-Delay
Compensation
R
S
Q
Q
PWM-Latch
0.72
Clock
U
FB
f
osc
100kHz
21.5kHz
Standby Unit
FB
4.0V
R
Sense
Drain
Isense
0.8V
C5
0.3V
10k
Ω
D1
5.6V
CoolMOS™
Datasheet 7 February 2001
Preliminary Data
Preliminary Specification
CoolSET™-II
ICE2A165/265/365
ICE2A180/280
Functional Descript ion
3.1 Power Management
Figure 3 Power Management
The Undervoltage Lockout monitors the external
supply voltage VVCC. In case the IC is inactive the
current consumption is max. 55µA. When the SMPS is
plugged to the main line the current through RStart-up
charges the external Capacitor CVCC. When VVCC
exceeds the on-threshold VCCon=13.5V the internal bias
circuit and the voltage reference are switched on. After
it the internal bandgap generates a reference voltage
VREF=6.5V to supply the internal circuits. To avoid
uncontrolled ringing at switch-on a hysteresis is
implemented wh ich means that switch-of f is only after
active mode when Vcc falls below 8.5V.
In case of switch-on a Power Up Reset is done by
reseting the internal error-l atch in the prot ection unit.
When VVCC falls below the off-threshold VCCoff=8.5V the
intern al refe ren ce is swit ched of f and the Po we r Down
reset let T1 discharging the soft-start capacitor CSoft-Start
at pin SoftS. Thus it is ensured that at every switch-on
the voltage ramp at pin SoftS starts at zero.
3.2 Improved Curre nt Mode
Figure 4 Current Mode
Current Mode means that the duty cycle is controlled
by the slope of the primary current. This is done by
comparison the FB signal with the amplified current
sense sig nal.
Figure 5 Pulse Widt h Mo d ul a tion
In case the amplified current sense signal exceeds the
FB signal the on-time Ton of the driver is finished by
reseting the PWM-Latch (see Figure 5).
Internal
Bias
Voltage
Reference
6.5V
4.8V
Undervoltage
Lockout
13.5V
8.5V
Power-Down
Reset
Power-Up
Reset
Power Management
5.3V
4.0V
T1
PWM-Latch
R
S
Q
Q
Error-Latch
SoftS
6.5V
Error-Detection
VCC
M ain Line (100V-380V)
Primary Winding
S oft-Sta rt Comp a rator
C
VCC
R
Soft-Start
R
Start-Up
C
Soft-Start
x3.65
PW M OP
Improved
Current M ode
0.8V
PWM C om parator
PWM-Latch
Isense
FB
R
S
Q
Q
Driver
Soft-Start C om parator
t
FB
Am plified Current Signal
T
on
t
0.8V
Driver
3 Functional Description
Datasheet 8 February 2001
Preliminary Data
Preliminary Specification
CoolSET™-II
ICE2A165/265/365
ICE2A180/280
Functional Descript ion
The primary current is sensed by the external series
resistor RSense inserted in the source of the integrated
CoolMOS™. By means of Current Mode the regulation
of the secondary voltage is insensitive on line
variations. Line variation causes varition of the
increasin g curren t slope which controls the duty cycle.
The external RSense all ows an in dividual adjust ment of
the maximum source current of the integrated
CoolMOS™.
Figure 6 Improved Current Mode
To improve the Current Mode during light load
conditions the amplified current ramp of the PWM-OP
is superimposed on a voltage ramp, which is built by
the switch T2, the voltag e source V1 and the 1st order
low pass filter composed of R1 and C1(see Figure 6,
Figure 7). Every time the oscillator shuts down for max.
duty cycle limitation the switch T2 is closed by VOSC.
When the oscillator triggers the Gate Driver T2 is
opened so that the voltage ramp can start.
In case of light load the amplified current ramp is to
small to ensure a stable regulation. In that case the
Voltage Ramp is a well defined signal for the
comparison with the FB-signal. The duty cycle is then
controlled by the slope of th e Voltage Ramp.
By means of the C5 Comparator the Gate Driver is
switched-off until the voltage ramp exceeds 0.3V. It
allows the d uty cycle to be reduced contin ously till 0 %
by dec reasing VFB below that threshold.
Figure 7 Light Load Conditions
3.2.1 PWM-OP
The input of the PWM-OP is applied over the internal
leading edge blanking to the external sense resistor
RSense connected to pin ISense. RSense converts the
source current into a sense voltage. The sense voltage
is amplified with a gain of 3.65 by PWM OP. The output
of the PWM-OP is connected to the voltage source V1.
The voltage ramp with the superimposed amplified
current singal is fed into the positive inputs of the PWM-
Comparator, C5 and th e Soft-Start -C omparator.
3.2.2 PWM-Comparator
The PWM-Comparator compares the sensed current
signal o f the integra ted Co olMOSTM with the f eedback
signal VFB (see Figure 8). VFB is created by an external
optocoupler or external transistor in combination with
the internal pullup resistor RFB and provides the load
information of the feedback circuitry. When the
amplified current signal of the integrated CoolMOS™
exceeds the signal VFB the PW M-Comp arator switch es
off the Gate Driver.
x3.65
PW M OP
0.8V
10k
Ω
Oscillator
PWM C om parator
20pF
T
2
R
1
C
1
FB
PWM-Latch
V
1
C5
0.3V
Ga te Dr iv e r
V oltage R am p
V
OSC
S o ft-S ta rt Co mp a ra to r
t
t
V
OSC
0.8V
FB
Ga te Dr ive r
Voltage Ram p
t
max.
Duty Cycle
0.3V
Datasheet 9 February 2001
Preliminary Data
Preliminary Specification
CoolSET™-II
ICE2A165/265/365
ICE2A180/280
Functional Descript ion
Figure 8 PWM Controlling
3.3 Soft-Start
Figure 9 Soft-Start Pha se
The Sof t- S ta r t is r e al ized by the intern al pu ll u p r es i s to r
RSoft-Start and the external Capacitor CSoft-Start (see
Figure 2) . The Soft - Start voltag e VSoftS is generated by
charging the external capacitor CSoft-Start by the internal
pullup resistor RSoft-Start. The Soft-Start-Comparator
compares the voltage at pin SoftS at the negative input
with the ramp signal of the PWM-OP at the positive
input. When Soft-Start voltage VSoftS is less than
Feedback voltage VFB the Soft-Start-Comparator limits
the pulse width by reseting the PWM-Latch (see Figure
9). In a ddition to Start- Up, Soft-Start is a lso activated at
each resta rt att empt duri ng A uto Re sta rt. By mean s of
the above mentioned CSoft-Start the Soft-Start can be
defined by the user. The Soft-Start is finished when
VSoftS exceeds 5.3V . At that time the Protection Unit is
activated by Comparator C4 and senses the FB by
Comparator C3 wether the voltage is below 4.8V which
means that the voltage on the secondary side of the
SMPS is settled. The internal Zener Diode at SoftS with
breaktrough voltage of 5.6V is to prevent the internal
circuit from saturation (see F igure 10).
Figure 10 Activation of Protection Unit
The Start-Up time TStart-Up within the converter output
voltage VOUT is settled must be shorter than the Soft-
Start Phase TSoft-Start (see Figure 11).
By means of Soft-Start there is an effective
minimization of current and voltage stresses on the
integrated CoolMOS™, the clamp circuit and the output
overshoot and prevents saturation of the transformer
during Start-Up.
x3.65
PW M OP
Improved
Current M ode
PWM C om parator
Isense
S o ft-Sta rt Co mp a ra to r
6.5V
PWM-Latch
0.8V
FB
Optocoupler
R
FB
t
5.3V
V
SoftS
Gate Driver
t
T
Soft-Start
5.6V
6.5V
R
FB
6.5V
Power-Up Reset
C4
5.3V
C3
4.8V
R
Soft-Start
FB
R
S
Q
Q
Error-Latch
R
S
Q
Q
PWM-Latch
G2
Clock
Gate
Driver
5.6V
SoftS
69,1×
=−
−
−StartSoft
StartSoft
StartSoft R
T
C
Datasheet 10 February 2001
Preliminary Data
Preliminary Specification
CoolSET™-II
ICE2A165/265/365
ICE2A180/280
Functional Descript ion
Figur e 11 Start Up Phase
3.4 Oscillator and Frequency
Reduction
3.4.1 Oscillator
The oscillator generates a frequency fswitch = 100kHz. A
resistor, a capacitor and a current source and current
sink which determine the frequency are integrated. The
charging and discharging current of the implemented
oscillator capacitor are internally trimmed, in order to
achieve a very accurate switching frequency. The ratio
of controlled charge to discharge current is adjusted to
reach a max. duty cycle limitation of Dmax=0.72.
3.4.2 Frequency Reduction
The frequency of the oscillator is depending on the
voltag e at pin FB. T he d epend ence is shown i n F igure
12. This feature allows a power supply to operate at
lower frequency at light loads thus lowering the
switching losses while maintaining good cross
regulation performance and low output ripple. In case
of low power the power consumption of the whole
SMPS can now be reduced very effective. The minimal
reachable frequency is limited to 21.5 kHz to avoid
audible noise in any case.
Figure 12 Freque ncy Depende nce
3.5 Current Limiting
There is a cycle by cycle current limiting realised by the
Current-Limit Comparator to provide a overcurrent
detection. The source current of the integrated
CoolMOSTM is sensed via an external sense resistor
RSense . By means of RSense the source current is
transformed to a sense voltage VSense. When the
voltage VSense exceeds the internal threshold voltage
Vcsth the Current-Limit-Comparator immediately turns
off the gate drive. To prevent the Current Limiting from
distortions caused by leading edge spikes a Leading
Edge Blanking is integrated at the Current Sense.
Furthermore a Propagation Delay Compensation is
added to support the immedeate shut down of the
CoolMOS™ in case of overcu rrent.
3.5.1 Leading Edge Blanking
Figure 13 Leading Edge Blanking
Each time when CoolMOS™ is switched on a leading
spike is generated due to the primary-side
capacitances and secondary-side rectifier reverse
recovery time. To avoid a premature termination of the
switching pulse this spike is blanked out with a time
constant of tLEB = 220ns. Duri ng that time t he output of
the Current-Limit Comparator cannot switch off the
gat e dr i v e.
t
t
V
SoftS
t
5.3V
4.8V
T
Soft-Start
V
OUT
V
FB
V
OUT
T
Start-Up
0,9
21,5
65
100
1,0 1,1 1,2 1,3 1,4 1,5 1,6 1,7 1,8 1,9 2
FB
VV
kHz
OSC
f
t
V
Sense
V
csth
t
LEB
= 220ns
Datasheet 11 February 2001
Preliminary Data
Preliminary Specification
CoolSET™-II
ICE2A165/265/365
ICE2A180/280
Functional Descript ion
3.5.2 Propagation Delay Compensation
In case of overcurren t detecti on by ILimit the shut dow n
of C o olMOS™ is delayed due to the propagation delay
of the circuit. This delay causes an overshoot of the
peak current Ipeak which depends on the ratio of dI/dt of
the peak c urr ent (se e Fig u r e 14 ) .
.
Figure 1 4 Cu rrent Limiting
The overshoot of Signal2 is bigger than of Signal1 due
to the steeper rising waveform.
A propagation delay compensation is integrated to
bound t he tolera nce of the d epend ence on dI/ dt of th e
internal current limiting at ± 5%. That means the
propagation delay time between exceeding the current
sense threshold Vcsth and the switch off of CoolMOS™
is compensat ed over temperature wit hin a range of at
least.
So current limiting is now capable in a very accurate
way (see Figure 16).
Figure 15 Dynamic Voltage Threshold Vcsth
The propagation delay compensation is done by
means of an dynamic voltage threshold Vcsth (see
Figure 1 5). In case o f a s te eper sl ope the swi tc h off of
the driver is earlier to compensate the delay.
E.g. Ipeak = 0.5A with RSense = 2 . Without propagation
delay compe nsati on th e current se nse th reshold is set
to a stat ic volt age level Vcsth=1V. A current ramp of
dI/dt = 0.4A/µs, that means dVSense/dt = 0.8V/µs, and a
propagation delay time of i.e. tPropagation Delay =180ns
leads then to a Ipeak overshoot of 12%. By means of
propagat ion delay compe nsation th e overshoot is onl y
about 2% (see Figure 16).
Figure 16 Overcurren t Sh utdown
3.6 PWM-Latch
The oscillator clock output applies a set pulse to the
PWM-Latch when initiating CoolMOS™ conduction.
After setting the PWM-Latch can be reset by the PWM-
OP, the Soft-Start-Comparator, the Current-Limit-
Comparator, Comparator C3 or the Error-Latch of the
Protection Unit. In case of reseting the driver is shut
down immediately.
3.7 Driver
The driver-stage drives the gate of the CoolMOS™
and is optimized to minimize EMI and to provide high
circuit efficiency. This is done by reducing the switch on
slope when reaching the CoolMOS™ threshol d. Thi s is
achieved by a slope control of the rising edge at the
driver’s ou t put (see Figure 17).
Thus the leading switch on spike is minimized. When
CoolMOS™ is switched off, the falling shape of the
driver i s slowed d own when reaching 2V to prevent an
overshoot below ground. Furthermore the driver circuit
is designed to eliminate cross conduction of the output
stage. At voltages below the undervoltage lockout
threshold VVCCoff the gate drive is active low.
t
I
Sense
I
Limit
t
Propagation Delay
I
Overshoot1
I
peak1
Signal1Signal2
I
Overshoot2
I
peak2
dt
dV
dt
dI
RSense
peak
Sense 10 ≤×≤
t
V
csth
V
OSC
Signal1 Signal2
V
Sense
Propagation Delay
0,9
0,95
1
1,05
1,1
1,15
1,2
1,25
1,3
0 0,2 0,4 0,6 0,8 1 1,2 1,4 1,6 1,8 2
with compensat ion without compensation
dt
dVSense s
V
µ
Sense
V
V
± 5% Tolerance
Datasheet 12 February 2001
Preliminary Data
Preliminary Specification
CoolSET™-II
ICE2A165/265/365
ICE2A180/280
Functional Descript ion
Figure 17 Gate Rising Slope
3.8 Protection Unit (Auto Restart Mode)
An overload, open loop and overvoltage detection is
integrated within the Protection Unit. These three
failure modes are latched by an Error-Latch. Additional
thermal shutdown is latched by the Error-Latch. In case
of those failure modes the Error-Latch is set after a
blank ing time of 5µs and the C ool MOS™ is shut down.
That bla nking pr eve nts the Err or-L atc h fr om di sto rti ons
caused by spi k es during operat ion mode.
3.8.1 Overload & Open loop with normal
load
Figure 18 shows the Auto Restart Mode in case of
overload o r op en l oop w ith normal loa d. T he d etect ion
of open loop or overload is provided by the Comparator
C3, C4 and the AND-gate G2 (see Figure19). The
detection is activated by C4 when the voltage at pin
SoftS exceeds 5.3V. Till this time the IC operates in the
Soft-Start Phase. After this phase the comparator C3
can set the Error-Latch in case of open loop or overload
which leads the feedback voltage VFB to exceed the
threshold of 4.8V. After latching VCC decreases till
8.5V and inactivates the IC. At this time the external
Soft-Start capacitor is discharged by the internal
transist or T1 due to Power Dow n Reset. When the I C
is inactive VVCC increases till VCCon = 13.5V by charging
the Capacitor CVCC by means of the Start-Up Resistor
RStart-Up. Then the Error-Latch is reset by Power Up
Reset an d the external Soft -Start capacitor CSoft-Start is
charged by the internal pullup resistor RSoft-Start . During
the Soft-Start Phase which ends when the voltage at
pin Sof tS exce eds 5.3V the detection of overload and
open loop by C3 and G2 is inactive. In this way the Start
Up Phas e is not dete cted as an overload.
Figure 18 Auto Resta r t Mode
Figure 19 FB-Detection
t
V
Gate
5V
ca. t = 130ns
Ov e r lo ad & Op e n lo op /n or mal lo a d
FB
t
4.8V
5.3V
SoftS
5µs B la nking
Failure
Detection
S oft-Start P ha se
VCC
13.5V
8.5V
t
Driver
t
T
Restart
T
Burst1
t
R
Soft-Start
6.5V
C
Soft-Start
C4
5.3V
C3
4.8V
G2
T1
Error-Latch
Power Up Reset
R
FB
6.5V
FB
SoftS
Datasheet 13 February 2001
Preliminary Data
Preliminary Specification
CoolSET™-II
ICE2A165/265/365
ICE2A180/280
Functional Descript ion
But the Soft-Start Phase must be finished within the
Start Up Phase to force the voltage at pin FB below the
failure detection t hreshold of 4. 8V.
3.8.2 Overvoltage due to open loop with
no load
Figure 20 Auto Restart Mode
Figure 20 shows the Auto Restart Mode for open loop
and no load condi tion. In ca se of t his fail ure mod e th e
converter output voltage increases and also VCC. An
additional protection by the comparators C1, C2 and
the AND-gate G1 is implemented to consider this
failure mode (see Figure 21).The overvoltage detection
is provided by Comparator C1 only in the first time
during the Soft-Start Phase till the Soft-Start voltage
exceeds the threshold of the Comparator C2 at 4.0V
and the voltage at pin FB is above 4.8V. When VCC
exceed s 16 .5V durin g the ov er volt ag e dete cti on ph ase
C1 ca n s e t the Er r or- L atch an d the Bu r s t P h as e during
Auto Restart Mode is finished earlier. In that case
TBurst2 is shorter than TSoft-Start . By means of C2 the
normal o peration mo de is pr evented from overvoltage
detection due to varying of VCC concerning the
regulation of the converter output. When the voltage
VSoftS is above 4.0V the overvoltage detection by C1 is
deactivated.
Figure 21 Over voltage Detection
3.8.3 Thermal Shut Down
Thermal Shut Down is latched by the Error-Latch when
junction temperature Tj of the pwm controller is
exceeding an intern al threshol d of 140°C. In that case
the IC switches in Auto Rest art Mode.
Note: All the values which are mentioned in the
functional description are typical. Please look
in Electrical Characteristics for min/max limit
values.
Open loop & no load condition
t
Driver
13.5V
16.5V
FB
4.8V
5µs Blanking
Failure
Detection
5.3V
SoftS
4.0V Overvoltage
Detection Phase
Soft-Start Phase
t
t
T
Restart
T
Burst2
VCC
8.5V
O vervoltage Detection
t
6.5V
C
Soft-Start
VCC
R
Soft-Start
C1
16.5V
C2
4.0V
T1
SoftS
G1 Error Latch
Power Up Reset
CoolSET™-II
ICE2A165/265/365
ICE2A180/280
Electrical Characteristics
Preliminary Specification
Datasheet 14 February 2001
Preliminary Data
4 Electrical Characteristics
4.1 Absolute Maximum Ratings
Note: Absolute maxi mum ratings are define d as ratings, which when being exceeded may le ad to destruct ion
of the integrated circuit. For the same reason make sure, that any capacitor that will be connected to pin 6
(VCC) is dis c harged before assembling the appli c ation circuit.
4.2 Operati ng Range
Note: Within the operating range the IC operates as described in the functio nal description.
Parameter Symbol Limit Values Uni t Remarks
min. max.
VCC Supply Voltage VCC -0.3 21 V
Drain Source Voltage
ICE2A165/265/365 VDS - 650 V Tj=110°C
Drain Source Voltage
ICE2A180/280 VDS - 800 V
FB Voltage VFB -0.3 6.5 V
SoftS Voltage VSoftS -0.3 6.5 V
ISense ISense -0.3 3 V
Junctio n Temperature Tj-40 150 °C Controller & CoolMOS™
Stor ag e Temperature TS-50 150 °C
Thermal Resistance
Junction-Ambient RthJA - 90 K/W P-DIP-8-6
Parameter Symbol Limit Values Unit Remarks
min. max.
VCC Supply Voltage VCC VCCoff 21 V
Junctio n Temperat ure of
Controller TJCon -25 130 °C limited due to thermal shut down of
controller
Junctio n Temperat ure of
CoolMOS™TJCoolMOS -25 150 °C
Ambient Tempe rature TA-25 100 °C
CoolSET™-II
ICE2A165/265/365
ICE2A180/280
Electrical Characteristics
Datasheet 15 February 2001
Preliminary Data
Preliminary Specification
4.3 Characteristics
4.3.1 Supply Section
Note: The electrical characteristics involve the spread of values guaranteed within the specified supply voltage
and am bient tempe rature ra nge TA from – 25 °C to 100 °C.Typical value s represent th e median values,
which are related to 25°C. If not otherwise stated, a supply voltage of VCC = 14 V is assumed.
4.3.2 Internal Voltage Reference
4.3.3 Control Section
Parameter Symbol Limit Values Unit Test Condition
min. typ. max.
Start Up Current IVCC1 - 2755µAV
CC=VCCon -0.1V
Supply Current with Inactiv
Gate IVCC2 -5.37mAV
SoftS = 0
IFB = 0
Supply Current
with Activ Gate ICE2A165 IVCC3 -6.5-mAV
SoftS = 5V
IFB = 0
ICE2A265 IVCC3 -6.7-mAV
SoftS = 5V
IFB = 0
ICE2A365 IVCC3 -8.5-mAV
SoftS = 5V
IFB = 0
ICE2A180 IVCC3 -6.5-mAV
SoftS = 5V
IFB = 0
ICE2A280 IVCC3 -7.7-mAV
SoftS = 5V
IFB = 0
VCC Turn-On Threshold
VCC Turn-Off Threshold
VCC Turn-On/Off Hysteresis
VCCon
VCCoff
VCCHY
13
-
4.5
13.5
8.5
5
14
-
5.5
V
V
V
Parameter Symbol Limit Values Unit Test Condition
min. typ. max.
Trimmed Reference Volt age VREF 6.37 6.50 6.63 V me a s ur e d at pin FB
Parameter Symbol Limit Values Unit Test Condition
min. typ. max.
Oscillator Frequency fOSC1 93 100 107 kHz VFB = 4V
Reduced Osc. Frequency fOSC2 -21.5-kHzV
FB = 1V
Frequency Ratio fosc1/fosc2 4.5 4.65 4.9
Max Duty Cycle Dmax 0.67 0.72 0.77
Min Duty Cycle Dmin 0- - V
FB < 0.3V
CoolSET™-II
ICE2A165/265/365
ICE2A180/280
Electrical Characteristics
Preliminary Specification
Datasheet 16 February 2001
Preliminary Data
4.3.4 Protection Unit
4.3.5 Current Limitin g
PWM-OP Gain AV3.45 3.65 3.85
Max. Level of Voltage Ramp VMax-Ramp -0.80-V
VFB Operating Range Min Level VFBmin 0.3--V
VFB Operating Range Max level VFBmax --4.6V
Feedback Resistance RFB 3.0 3.7 4.9 kΩ
Soft-Start Resistance RSoft-Start 42 50 62 kΩ
Parameter Symbol Limit Values Unit Test Condition
min. typ. max.
Over Load & Open Loop
Detection Limit VFB2 4.65 4.8 4.95 V VSoftS > 5.5V
Activation Limit of Overload &
Open Loop Detection VSoftS1 5.15 5.3 5.46 V VFB > 5V
Deactivation Limit of
Overvoltage Detection VSoftS2 3.88 4.0 4.12 V VFB > 5V
VCC > 17.5V
Overvoltage Detection Limit VVCC1 16 16.5 17.2 V VSoftS < 3.8V
VFB > 5V
Latched Therma l Shutdown TjSD 130 140 150 °C guaranteed by design
Spike Blanking tSpike -5-µs
Parameter Symbol Limit Values Unit Test Condition
min. typ. max.
Peak Current Limitation (incl.
Propagat ion Delay Time)
(see Figure 7)
Vcsth 0.95 1.00 1.05 V
Leading Edge Blanking tLEB -220-ns
CoolSET™-II
ICE2A165/265/365
ICE2A180/280
Electrical Characteristics
Datasheet 17 February 2001
Preliminary Data
Preliminary Specification
4.3.6 CoolMOS™ Section
Parameter Symbo l Limit Values Unit T es t Cond ition
min. typ. max.
Drai n So urc e B reak dow n Vo l tage
ICE2A165/265/365 V(BR)DSS 600
650 -
--
-V
VTj=25°C
Tj=110°C
Drai n So urc e B reak dow n Vo l tage
ICE2A180/280 V(BR)DSS 800
870 - -
-V
VTj=25°C
Tj=110°C
Drain Source Avalanche
Brea k do wn Voltage
ICE2A165/265/365
V(BR)DS -700-VT
j=25°C
Drain Source Avalanche
Brea k do wn Voltage
ICE2A180/280
V(BR)DS -870-VT
j=25°C
Drain Source
On-Resistance ICE2A165 RDSon -
-3
--
-Ω
ΩTj=25°C
Tj=125°C
ICE2A265 RDSon -
-1.1
--
-Ω
ΩTj=25°C
Tj=125°C
ICE2A365 RDSon -
-0.5
--
-Ω
ΩTj=25°C
Tj=125°C
ICE2A180 RDSon -
-3
--
-Ω
ΩTj=25°C
Tj=125°C
ICE2A280 RDSon -
-0.9
--
-Ω
ΩTj=25°C
Tj=125°C
Zero Gate Voltage Drain Current IDSS -0.5-µAV
VCC=0V
Rise Time trise -50
1)
1) Measured in a Typical Flyback Converter Application
-ns
Fall Time tfall -30
1) -ns
Datasheet 18 February 2001
Preliminary Data
Preliminary Specification
CoolSET™-II
ICE2A165/265/365
ICE2A180/280
Typical Performance Characteristics
Figure 22 Start Up Cu rrent IVCC1 vs. Tj
Figure 23 Static Supply Current IVCC2 vs. Tj
Figure 24 Supply Current IVCC3 vs. Tj
Figure 25 VCC Turn-On Threshold VVCCon vs. Tj
Figure 26 VCC Turn-Off Threshold VVCCoff vs. Tj
Figure 27 VCC Turn-On/Off HysteresisVVCCHY vs. Tj
Junction Temperature [°C]
Start Up Current I
VCC1
[µA]
PI-001-190101
22
24
26
28
30
32
34
36
38
40
-25-15-5 5 152535455565758595105115125
Junction Temperature [°C]
Supply Current I
VCC2
[mA]
PI-003-190101
4,5
4,7
4,9
5,1
5,3
5,5
5,7
5,9
-25 -15 -5 5 15 25 35 45 55 65 75 85 95 105 115 125
Junction Tem p erature [°C]
Supply Current IVCC3 [mA]
PI-002-190101
5,4
5,8
6,2
6,6
7,0
7,4
7,8
8,2
8,6
9,0
-25 -15 -5 5 15 25 35 45 55 65 75 85 95 105 115 125
ICE2A165
ICE2A180
ICE2A365
ICE2A280
ICE2A265
Junction Tem p erature [°C]
VCC Turn-On Threshol d VCCon [V]
PI-004-190101
13,42
13,44
13,46
13,48
13,50
13,52
13,54
13,56
13,58
-25 -15 -5 5 15 25 35 45 55 65 75 85 95 105 115 125
Junction Temperature [°C]
VCC Turn-Of f Threshol d VVCCoff [V]
PI-005-190101
8,40
8,43
8,46
8,49
8,52
8,55
8,58
8,61
8,64
8,67
-25-15-5 5 152535455565758595105115125
Junction Temperature [°C]
VCC Turn-On/Off Hysteresis V
CCHY
[V]
PI-006-190101
4,83
4,86
4,89
4,92
4,95
4,98
5,01
5,04
5,07
5,10
-25 -15 -5 5 15 25 35 45 55 65 75 85 95 105 115 125
5 T ypical Performance Characteristics
Datasheet 19 February 2001
Preliminary Data
Preliminary Specification
CoolSET™-II
ICE2A165/265/365
ICE2A180/280
Typical Performance Characteristics
Figure 28 Trimmed Reference VREF vs. Tj
Figure 29 Oscillator Frequency fOSC1 vs. Tj
Figure 3 0 Re duced Osc. Freq uency fOSC2 vs. Tj
Figure 31 Frequency Rati o fOSC1 / fOSC2 vs. Tj
Figure 32 Max. Duty Cycle vs. Tj
Figure 33 PWM-OP Gain AV vs. Tj
Junction Temperature [°C]
Trimmed Reference V ol tage V
REF
[V]
PI-007-190101
6,45
6,46
6,47
6,48
6,49
6,50
6,51
6,52
6,53
6,54
6,55
-25 -15 -5 5 15 25 35 45 55 65 75 85 95 105 115 125
Junction Temperature [°C]
Oscillator Frequency f
OSC1
[kHz]
PI-008-190101
97,0
97,5
98,0
98,5
99,0
99,5
100,0
100,5
101,0
101,5
102,0
-25 -15 -5 5 15 25 35 45 55 65 75 85 95 105 115 125
Junction Temperature [°C]
Reduced Osc. Frequency f
OSC2
[kHz]
PI-009-190101
20,8
20,9
21,0
21,1
21,2
21,3
21,4
21,5
21,6
21,7
21,8
-25-15-5 5 152535455565758595105115125
Junction Temperature [°C]
Frequency Ratio f
OSC1
/f
OSC2
PI-010-190101
4,50
4,52
4,54
4,56
4,58
4,60
4,62
4,64
4,66
4,68
4,70
-25-15-5 5 152535455565758595105115125
Junction Temperature [°C]
Max. Duty Cycle
PI-011-190101
0,710
0,712
0,714
0,716
0,718
0,720
0,722
0,724
0,726
0,728
0,730
-25-15-5 5 152535455565758595105115125
Junction Temperature [°C]
PWM-OP Gain A
V
PI-012-190101
3,60
3,61
3,62
3,63
3,64
3,65
3,66
3,67
3,68
3,69
3,70
-25-15-5 5 152535455565758595105115125
Datasheet 20 February 2001
Preliminary Data
Preliminary Specification
CoolSET™-II
ICE2A165/265/365
ICE2A180/280
Typical Performance Characteristics
Figure 34 Feedback Resistance RFB vs. Tj
Figure 35 Soft-Start Resistance RSoft-Start vs. Tj
Figur e 36 Detec tion Lim i t V FB2 vs. Tj
Figure 37 Detectio n Limit VSoft-Start1 vs. Tj
Figure 38 Detectio n Limit VSoft-Start2 vs. Tj
Figure 39 Over voltage Detection Limit VVCC1 vs. Tj
Junction Temperature [°C]
Feedback Resistance R
FB
[kOhm]
PI-013-190101
3,50
3,55
3,60
3,65
3,70
3,75
3,80
3,85
3,90
3,95
4,00
-25-15-5 5 152535455565758595105115125
Junction Tem p erature [°C]
Soft-Start Resistance R
Soft-Start
[kOhm]
PI-014-190101
40
42
44
46
48
50
52
54
56
58
-25-15-5 5 152535455565758595105115125
Junction Tem p erature [°C]
Detection Limit V
FB2
[V]
PI-015-190101
4,75
4,76
4,77
4,78
4,79
4,80
4,81
4,82
4,83
4,84
4,85
-25 -15 -5 5 15 25 35 45 55 65 75 85 95 105 115 125
Junction Tem p erature [°C]
Detecti on Limit V
Soft-Start1
[V]
PI-016-190101
5,25
5,26
5,27
5,28
5,29
5,30
5,31
5,32
5,33
5,34
5,35
-25-15-5 5 152535455565758595105115125
Junction Tem p erature [°C]
Detection Limit V
Soft-Start2
[V]
PI-017-190101
3,95
3,96
3,97
3,98
3,99
4,00
4,01
4,02
4,03
4,04
4,05
-25-15-5 5 152535455565758595105115125
Junction Tem p erature [°C]
Overvoltage Detection Limit V
VCC1
[V]
PI-018-190101
16,20
16,25
16,30
16,35
16,40
16,45
16,50
16,55
16,60
16,65
16,70
16,75
16,80
-25 -15 -5 5 15 25 35 45 55 65 75 85 95 105 115 125
Datasheet 21 February 2001
Preliminary Data
Preliminary Specification
CoolSET™-II
ICE2A165/265/365
ICE2A180/280
Typical Performance Characteristics
Figur e 40 Peak Cu r r en t Limitation Vcsth vs. Tj
Figure 41 Leading Edge Blanking VVCC1 vs. Tj
Junction Tem p erature [°C]
Peak Current Limitation V
csth
[V]
PI-019-190101
0,990
0,992
0,994
0,996
0,998
1,000
1,002
1,004
1,006
1,008
1,010
-25 -15 -5 5 15 25 35 45 55 65 75 85 95 105 115 125
Junction Tem p erature [°C]
Leading Edge Bl anki ng t
LEB
[ns]
PI-020-190101
180
190
200
210
220
230
240
250
260
270
280
-25-15-5 5 152535455565758595105115125
CoolSET™-II
ICE2A165/265/365
ICE2A180/280
Outline Dimension
Preliminary Specification
Datasheet 22 February 2001
Preliminary Data
6 Outline Dimension
Figure 42
Dimensions in mm
P-DIP-8-6
(Plastic Dual In-line
Package)
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