Parameter Max. Units
ID @ TC = 25°C Continuous Drain Current, VGS @ 10V (Silicon limited) 61
ID @ TC = 100°C Continuous Drain Current, VGS @ 10V (See Fig.9) 43 A
ID @ TC = 25°C Continuous Drain Current, VGS @ 10V (Package limited) 30
IDM Pulsed Drain Current 240
PD @TC = 25°C Power Dissipation 120 W
Linear Derating Factor 0.77 W/°C
VGS Gate-to-Source Voltage ± 16 V
EAS Single Pulse Avalanche Energy200 mJ
EAS (6 sigma) Single Pulse Avalanche Energy Tested Value600
IAR Avalanche CurrentSee Fig.12a, 12b, 15, 16 A
EAR Repetitive Avalanche EnergymJ
TJOperating Junction and -55 to + 175
TSTG Storage Temperature Range
Soldering Temperature, for 10 seconds 300 (1.6mm from case )
°C
IRLR3915PbF
IRLU3915PbF
HEXFET® Power MOSFET
Absolute Maximum Ratings
Parameter Typ. Max. Units
RθJC Junction-to-Case ––– 1.3
RθJA Junction-to-Ambient (PCB mount)––– 50 °C/W
RθJA Junction-to-Ambient––– 110
Thermal Resistance
VDSS = 55V
RDS(on) = 14m
ID = 30A
12/7/04
www.irf.com 1
AUTOMOTIVE MOSFET
PD - 95090A
HEXFET(R) is a registered trademark of International Rectifier.
Description
Specifically designed for Automotive applications,
this HEXFET® Power MOSFET utilizes the latest
processing techniques to achieve extremely low
on-resistance per silicon area. Additional features
of this product are a 175°C junction operating
temperature, fast switching speed and improved
repetitive avalanche rating. These features com-
bine to make this design an extremely efficient and
reliable device for use in Automotive applications
and a wide variety of other applications.
S
D
G
Features
lAdvanced Process Technology
lUltra Low On-Resistance
l175°C Operating Temperature
lFast Switching
lRepetitive Avalanche Allowed up to Tjmax
D-Pak
IRLR3915PbF
I-Pak
IRLU3915PbF
lLead-Free
IRLR/U3915PbF
2www.irf.com
Parameter Min. Typ. Max. Units Conditions
ISContinuous Source Current MOSFET symbol
(Body Diode) ––– ––– showing the
ISM Pulsed Source Current integral reverse
(Body Diode) ––– ––– p-n junction diode.
VSD Diode Forward Voltage ––– ––– 1.3 V TJ = 25°C, IS = 30A, VGS = 0V
trr Reverse Recovery Time ––– 62 93 ns TJ = 25°C, IF = 30A, VDD = 25xjkl V
Qrr Reverse Recovery Charge ––– 110 170 nC di/dt = 100A/µs
ton Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Parameter Min. Typ. Max. Units Conditions
V(BR)DSS Drain-to-Source Breakdown Voltage 55 –– –– V VGS = 0V, ID = 250µA
V(BR)DSS/TJBreakdown Voltage Temp. Coefficient ––– 0.057 ––– V/°C Reference to 25°C, ID = 1mA
RDS(on) Static Drain-to-Source On-Resistance ––– 12 14 VGS = 10V, ID = 30A
––– 14 17 VGS = 5.0V, ID = 26A
VGS(th) Gate Threshold Voltage 1.0 ––– 3.0 V VDS = 10V, ID = 250µA
gfs Forward Transconductance 42 ––– ––– S VDS = 25V, ID = 30A
––– ––– 20 µA VDS = 55V, VGS = 0V
––– ––– 250 VDS = 55V, VGS = 0V, TJ = 125°C
Gate-to-Source Forward Leakage ––– –– 200 VGS = 16V
Gate-to-Source Reverse Leakage ––– ––– -200 nA VGS = -16V
QgTotal Gate Charge –– 61 92 ID = 30A
Qgs Gate-to-Source Charge ––– 9.0 14 nC VDS = 44V
Qgd Gate-to-Drain ("Miller") Charge ––– 17 25 VGS = 10V
td(on) Turn-On Delay Time ––– 7.4 ––– VDD = 28V
trRise Time ––– 51 ––– ID = 30A
td(off) Turn-Off Delay Time ––– 83 ––– RG = 8.5
tfFall Time ––– 100 ––– VGS = 10V
Between lead,
––– ––– nH 6mm (0.25in.)
from package
and center of die contact
Ciss Input Capacitance ––– 1870 ––– VGS = 0V
Coss Output Capacitance ––– 390 ––– VDS = 25V
Crss Reverse Transfer Capacitance ––– 74 ––– pF ƒ = 1.0MHz, See Fig. 5
Coss Output Capacitance ––– 2380 ––– VGS = 0V, VDS = 1.0V, ƒ = 1.0MHz
Coss Output Capacitance ––– 290 ––– VGS = 0V, VDS = 44V, ƒ = 1.0MHz
Coss eff. Effective Output Capacitance ––– 540 ––– VGS = 0V, VDS = 0V to 44V
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
LDInternal Drain Inductance
LSInternal Source Inductance ––– –––
S
D
G
IGSS
ns
4.5
7.5
IDSS Drain-to-Source Leakage Current
S
D
G
Source-Drain Ratings and Characteristics
61
240
A
m
IRLR/U3915PbF
www.irf.com 3
Fig 2. Typical Output CharacteristicsFig 1. Typical Output Characteristics
Fig 3. Typical Transfer Characteristics
0.1 110 100 1000
VDS, Drain-to-Source Voltage (V)
0.001
0.01
0.1
1
10
100
1000
10000
ID, Drain-to-Source Current (A)
2.0V
20µs PULSE WIDTH
Tj = 25°C
VGS
TOP 15V
10V
5.0V
3.0V
2.7V
2.5V
2.25V
BOTTOM 2.0V
0.1 110 100 1000
VDS, Drain-to-Source Voltage (V)
0.1
1
10
100
1000
ID, Drain-to-Source Current (A)
2.0V
20µs PULSE WIDTH
Tj = 175°C
VGS
TOP 15V
10V
5.0V
3.0V
2.7V
2.5V
2.25V
BOTTOM 2.0V
1.0 3.0 5.0 7.0 9.0 11.0 13.0 15.0
VGS, Gate-to-Source Voltage (V)
0.10
1.00
10.00
100.00
1000.00
ID, Drain-to-Source Current (Α)
TJ = 25°C
TJ = 175°C
VDS = 25V
20µs PULSE WIDTH
Fig 4. Typical Forward Transconductance
vs. Drain Current
0 102030405060
ID,Drain-to-Source Current (A)
0
10
20
30
40
50
60
70
Gfs, Forward Transconductance (S)
TJ = 25°C
TJ = 175°C
IRLR/U3915PbF
4www.irf.com
Fig 8. Maximum Safe Operating Area
Fig 6. Typical Gate Charge vs.
Gate-to-Source Voltage
Fig 5. Typical Capacitance vs.
Drain-to-Source Voltage
Fig 7. Typical Source-Drain Diode
Forward Voltage
110 100
VDS, Drain-to-Source Voltage (V)
10
100
1000
10000
100000
C, Capacitance(pF)
VGS
= 0V, f = 1 MHZ
Ciss
= C
gs
+ C
gd, C
ds
SHORTED
Crss
= C
gd
Coss
= C
ds
+ C
gd
Coss
Crss
Ciss
010 20 30 40 50 60 70
0
2
4
6
8
10
12
Q , Total Gate Charge (nC)
V , Gate-to-Source Voltage (V)
G
GS
I=
D30A
V = 11V
DS
V = 27V
DS
V = 44V
DS
0.1
1
10
100
1000
0.0 0.5 1.0 1.5 2.0
V ,Source-to-Drain Voltage (V)
I , Reverse Drain Current (A)
SD
SD
V = 0 V
GS
T = 175 C
J°
T = 25 C
J°
1 10 100 1000
VDS, Drain-to-Source Voltage (V)
1
10
100
1000
ID, Drain-to-Source Current (A)
Tc = 25°C
Tj = 175°C
Single Pulse
1msec
10msec
OPERATION IN THIS AREA
LIMITED BY R DS(on)
100µsec
IRLR/U3915PbF
www.irf.com 5
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
Fig 9. Maximum Drain Current vs.
Case Temperature
25 50 75 100 125 150 175
0
10
20
30
40
50
60
70
T , Case Temperature ( C)
I , Drain Current (A)
°
C
D
LIMITED BY PACKAGE
0.01
0.1
1
10
0.00001 0.0001 0.001 0.01 0.1 1
Notes:
1. Duty factor D = t / t
2. Peak T = P x Z + T
1 2
JDM thJC C
P
t
t
DM
1
2
t , Rectangular Pulse Duration (sec)
Thermal Response (Z )
1
thJC
0.01
0.02
0.05
0.10
0.20
D = 0.50
SINGLE PULSE
(THERMAL RESPONSE)
Fig 10. Normalized On-Resistance
vs. Temperature
-60 -40 -20 020 40 60 80 100 120 140 160 180
0.0
0.5
1.0
1.5
2.0
2.5
T , Junction Temperature ( C)
R , Drain-to-Source On Resistance
(Normalized)
J
DS(on)
°
V =
I =
GS
D
10V
61A
IRLR/U3915PbF
6www.irf.com
Q
G
Q
GS
Q
GD
V
G
Charge
D.U.T. V
DS
I
D
I
G
3mA
V
GS
.3µF
50K
.2µF
12V
Current Regulator
Same Type as D.U.T.
Current Sampling Resistors
+
-
10 V
Fig 13b. Gate Charge Test Circuit
Fig 13a. Basic Gate Charge Waveform
Fig 12c. Maximum Avalanche Energy
vs. Drain Current
Fig 12b. Unclamped Inductive Waveforms
Fig 12a. Unclamped Inductive Test Circuit
tp
V
(BR)DSS
I
AS
Fig 14. Threshold Voltage vs. Temperature
R
G
I
AS
0.01
t
p
D.U.T
L
VDS
+
-V
DD
DRIVER
A
15V
20V
VGS
25 50 75 100 125 150 175
0
100
200
300
400
500
Starting Tj, Junction Temperature ( C)
E , Single Pulse Avalanche Energy (mJ)
AS
°
ID
TOP
BOTTOM
12A
21A
30A
-75 -50 -25 025 50 75 100 125 150 175 200
TJ , Temperature ( °C )
0.5
1.0
1.5
2.0
VGS(th) Gate threshold Voltage (V)
ID = 250µA
IRLR/U3915PbF
www.irf.com 7
Fig 15. Typical Avalanche Current vs.Pulsewidth
Fig 16. Maximum Avalanche Energy
vs. Temperature
Notes on Repetitive Avalanche Curves , Figures 15, 16:
(For further info, see AN-1005 at www.irf.com)
1. Avalanche failures assumption:
Purely a thermal phenomenon and failure occurs at a
temperature far in excess of Tjmax. This is validated for
every part type.
2. Safe operation in Avalanche is allowed as long asTjmax is
not exceeded.
3. Equation below based on circuit and waveforms shown in
Figures 12a, 12b.
4. PD (ave) = Average power dissipation per single
avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for
voltage increase during avalanche).
6. Iav = Allowable avalanche current.
7. T = Allowable rise in junction temperature, not to exceed
Tjmax (assumed as 25°C in Figure 15, 16).
tav = Average time in avalanche.
D = Duty cycle in avalanche = tav ·f
ZthJC(D, tav) = Transient thermal resistance, see figure 11)
PD (ave) = 1/2 ( 1.3·BV·Iav) = DT/ ZthJC
Iav = 2DT/ [1.3·BV·Zth]
EAS (AR) = PD (ave)·tav
1.0E-08 1.0E-07 1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01
tav (sec)
0.1
1
10
100
1000
Avalanche Current (A)
0.05
Duty Cycle = Single Pulse
0.10
Allowed avalanche Current vs
avalanche pulsewidth, tav
assuming Tj = 25°C due to
avalanche losses
0.01
25 50 75 100 125 150 175
Starting TJ , Junction Temperature (°C)
0
20
40
60
80
100
120
140
160
180
200
220
EAR , Avalanche Energy (mJ)
TOP Single Pulse
BOTTOM 10% Duty Cycle
ID = 30A
IRLR/U3915PbF
8www.irf.com
Fig 17. Peak Diode Recovery dv/dt Test Circuit for N-Channel
HEXFET® Power MOSFETs
Circuit Layout Considerations
Low Stray Inductance
Ground Plane
Low Leakage Inductance
Current Transformer
P.W. Period
di/dt
Diode Recovery
dv/dt
Ripple 5%
Body Diode Forward Drop
Re-Applied
Voltage
Reverse
Recovery
Current
Body Diode Forward
Current
V
GS
=10V
V
DD
I
SD
Driver Gate Drive
D.U.T. I
SD
Waveform
D.U.T. V
DS
Waveform
Inductor Curent
D = P. W .
Period
* VGS = 5V for Logic Level Devices
*
+
-
+
+
+
-
-
-
RGVDD
dv/dt controlled by RG
Driver same type as D.U.T.
ISD controlled by Duty Factor "D"
D.U.T. - Device Under Test
D.U.T
V
DS
90%
10%
V
GS
t
d(on)
t
r
t
d(off)
t
f
VDS
Pulse Width 1 µs
Duty Factor ≤ 0.1 %
RD
VGS
RG
D.U.T.
10V
+
-
VDD
Fig 18a. Switching Time Test Circuit
Fig 18b. Switching Time Waveforms
IRLR/U3915PbF
www.irf.com 9
D-Pak (TO-252AA) Part Marking Information
D-Pak (TO-252AA) Package Outline
Dimensions are shown in millimeters (inches)
12
IN THE ASSEMBLY LINE "A"
ASS EMBLED ON WW 16, 1999
EXAMPLE:
WITH ASSEMBLY
THIS IS AN IRFR120
LOT CODE 1234
YEAR 9 = 1999
DAT E CODE
WE E K 16
PART NUMBER
LOGO
INTERNATIONAL
RECTIFIER
ASSEMBLY
LOT CODE
916A
IRFU120
34
YEAR 9 = 1999
DAT E CODE
OR
P = DE S IGN AT E S L E AD- F R E E
PRODUCT (OPT IONAL)
Note: "P" in as sembly line position
i ndicates "L ead-F r ee"
12 34
WEEK 16
A = ASSEMBLY SITE CODE
PART NUMBER
IRFU120
LINE A
LOGO
LOT CODE
ASSEMBLY
INT ERNAT IONAL
RECT IF IER
IRLR/U3915PbF
10 www.irf.com
I-Pak (TO-251AA) Package Outline
Dimensions are shown in millimeters (inches)
I-Pak (TO-251AA) Part Marking Information
ASSEMBLY
EXAMPLE:
WITH ASSEMBLY
THIS IS AN IRFU120
YEAR 9 = 1999
DAT E CODE
LINE A
WEEK 19
IN THE ASSEMBLY LINE "A"
AS S EMBLED ON WW 19, 1999
LOT CODE 5678
PART NUMBER
56
IRF U120
INTERNATIONAL
LOGO
RECTIFIER
LOT CODE
919A
78
Note: "P" in assembly line
position indicates "Lead-Free"
OR
56 78
ASSEMBLY
LOT CODE
RECT IFIER
LOGO
INTERNATIONAL
IRFU120
PART NUMBER
WE EK 19
DAT E CODE
YEAR 9 = 1999
A = ASSEMBLY SITE CODE
P = DE S IGN AT E S L E AD- F R E E
PRODUCT (OPTIONAL)
IRLR/U3915PbF
www.irf.com 11
Data and specifications subject to change without notice.
This product has been designed and qualified for the Automotive [Q101] market.
Qualification Standards can be found on IR’s Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information. 12/04
Repetitive rating; pulse width limited by
max. junction temperature. (See fig. 11).
Limited by TJmax, starting TJ = 25°C,
L = 0.45mH, RG = 25, IAS = 30A, VGS =10V.
Part not recommended for use above this
value.
ISD 30A, di/dt 280A/µs, VDD V(BR)DSS,
TJ 175°C.
Pulse width 1.0ms; duty cycle 2%.
Notes:
Coss eff. is a fixed capacitance that gives the same charging time
as Coss while VDS is rising from 0 to 80% VDSS .
Limited by TJmax , see Fig.12a, 12b, 15, 16 for typical repetitive
avalanche performance.
This value determined from sample failure population. 100%
tested to this value in production.
When mounted on 1" square PCB ( FR-4 or G-10 Material ).
For recommended footprint and soldering techniques refer to
application note #AN-994.
D-Pak (TO-252AA) Tape & Reel Information
Dimensions are shown in millimeters (inches)
TR
16.3 ( .641 )
15.7 ( .619 )
8.1 ( .318 )
7.9 ( .312 )
12.1 ( .476 )
11.9 ( .469 ) FEED DIRECTION FEED DIRECTION
16.3 ( .641 )
15.7 ( .619 )
TRR TRL
NOTES :
1. CONTROLLING DIMENSION : MILLIMETER.
2. ALL DIMENSIONS ARE SHOWN IN MILLIMETERS ( INCHES ).
3. OUTLINE CONFORMS TO EIA-481 & EIA-541.
NOTES :
1. OUTLINE CONFORMS TO EIA-481.
16 mm
13 INCH