1
®
FN7387.9
EL5160, EL5161, EL5260, EL5261, EL5360
200MHz Low-Power Current Feedback
Amplifiers
The EL5160, EL5161, EL5260, EL5261, and EL5360 are
current feedback amplifiers with a bandwidth of 200MHz and
operate from just 0.75mA supply current. This makes these
amplifiers ideal for today’s high speed video and monitor
applications.
With the ability to run from a single supply voltage from
5V to 10V, these amplifiers are ideal for handheld, portable,
or battery-powered equipment.
The EL5160 also incorporates an enable and disable
function to reduce the supply current to 14µA typical per
amplifier. Allowing the CE pin to float or applying a low logic
level will enable the amplifier.
The EL5160 is available in the 6 Ld SOT-23 and 8 Ld SOIC
packages, the EL5161 in 5 Ld SOT -23 and SC-70 packages,
the EL5260 in the 10 Ld MSOP package, the EL5261 in
8 Ld SOIC and MSOP packages, the EL5360 in 16 Ld SOIC
and QSOP packages. All operate over the industrial
temperature range of -40°C to +85°C.
Features
200MHz -3dB bandwidth
0.75mA supply current
1700V/µs slew rate
Single and dual supply operation, from 5V to 10V supply
span
Fast enable/disable (EL5160, EL5260 and EL5360 only)
Available in SOT-23 packages
Pb-Free plus anneal available (RoHS compliant)
Applications
Battery-powered equipment
Handheld, portable devices
Video amplifiers
Cable drivers
RGB amplifiers
Test equipment
Instrumentation
Current-to-voltage converters
Pinouts EL5160
(8 LD SOIC)
TOP VIEW
EL5160
(6 LD SOT-23)
TOP VIEW
EL5161
(5 LD SOT-23, SC-70)
TOP VIEW
EL5260
(10 LD MSOP)
TOP VIEW
EL5261
(8 LD SOIC, MSOP)
TOP VIEW
EL5360
(16 LD SOIC, QSOP)
TOP VIEW
1
2
3
4
8
7
6
5
-
+
NC
IN-
IN+
VS-
CE
VS+
OUT
NC
1
2
3
6
4
5
-+
OUT
VS-
IN+
VS+
IN-
CE
1
2
3
5
4
-+
OUT
VS-
IN+
VS+
IN-
1
2
3
4
10
9
8
7
5 6
OUT
IN-
IN+
VS-
VS+
OUT
IN-
IN+
CE CE
-
+
7
-
+
1
2
3
4
8
7
6
5
-
+
-
+
OUTA
INA-
INA+
VS+
INB-
OUTB
VS- INB+
1
2
3
4
16
15
14
13
5
6
7
12
11
10
8 9
-
+
-
+
-
+
INA+
CEA
VS-
CEB
INB+
NC
CEC
INC+
INA-
OUTA
VS+
OUTB
INB-
NC
OUTC
INC-
Data Sheet May 7, 2007
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 |Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2004, 2005, 2007. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
2FN7387.9
May 7, 2007
Ordering Information
PART NUMBER PART MARKING TAPE & REEL PACKAGE PKG.
DWG. #
EL5160IS 5160IS - 8 Ld SOIC (150 mil) MDP0027
EL5160IS-T7 5160IS 7” 8 Ld SOIC (150 mil) MDP0027
EL5160IS-T13 5160IS 13” 8 Ld SOIC (150 mil) MDP0027
EL5160ISZ (Note) 5160ISZ - 8 Ld SOIC (150 mil) (Pb-Free) MDP0027
EL5160ISZ-T7 (Note) 5160ISZ 7” 8 Ld SOIC (150 mil) (Pb-Free) MDP0027
EL5160ISZ-T13 (Note) 5160ISZ 13” 8 Ld SOIC (150 mil) (Pb-Free) MDP0027
EL5160IW-T7 m 7” (3k pcs) 6 Ld SOT-23 MDP0038
EL5160IW-T7A m 7” (250 pcs) 6 Ld SOT-23 MDP0038
EL5160IWZ-T7 (Note) BAAN 7” (3k pcs) 6 Ld SOT-23 (Pb-Free) MDP0038
EL5160IWZ-T7A (Note) BAAN 7” (250 pcs) 6 Ld SOT-23 (Pb-Free) MDP0038
EL5161IW-T7 e 7” (3k pcs) 5 Ld SOT-23 MDP0038
EL5161IW-T7A e 7” (250 pcs) 5 Ld SOT-23 MDP0038
EL5161IWZ-T7 (Note) BAJA 7” (3k pcs) 5 Ld SOT-23 (Pb-Free) MDP0038
EL5161IWZ-T7A (Note) BAJA 7” (250 pcs) 5 Ld SOT-23 (Pb-Free) MDP0038
EL5161IC-T7 D 7” (3k pcs) 5 Ld SC-70 (1.25mm) P5.049
EL5161IC-T7A D 7” (250 pcs) 5 Ld SC-70 (1.25mm) P5.049
EL5260IY BNAAA - 10 Ld MSOP (3.0mm) MDP0043
EL5260IY-T7 BNAAA 7” 10 Ld MSOP (3.0mm) MDP0043
EL5260IY-T13 BNAAA 13” 10 Ld MSOP (3.0mm) MDP0043
EL5260IYZ (Note) BAAAK - 10 Ld MSOP (3.0mm) (Pb-free) MDP0043
EL5260IYZ-T7 (Note) BAAAK 7” 10 Ld MSOP (3.0mm) (Pb-free) MDP0043
EL5260IYZ-T13 (Note) BAAAK 13” 10 Ld MSOP (3.0mm) (Pb-free) MDP0043
EL5261IY BKAAA - 8 Ld MSOP (3.0mm) MDP0043
EL5261IY-T7 BKAAA 7” 8 Ld MSOP (3.0mm) MDP0043
EL5261IY-T13 BKAAA 13” 8 Ld MSOP (3.0mm) MDP0043
EL5261IS 5261IS - 8 Ld SOIC (150 mil) MDP0027
EL5261IS-T7 5261IS 7” 8 Ld SOIC (150 mil) MDP0027
EL5261IS-T13 5261IS 13” 8 Ld SOIC (150 mil) MDP0027
EL5261ISZ (Note) 5261ISZ - 8 Ld SOIC (150 mil) (Pb-free) MDP0027
EL5261ISZ-T7 (Note) 5261ISZ 7” 8 Ld SOIC (150 mil) (Pb-free) MDP0027
EL5261ISZ-T13 (Note) 5261ISZ 13” 8 Ld SOIC (150 mil) (Pb-free) MDP0027
EL5360IS EL5360IS - 16 Ld SOIC (150 mil) MDP0027
EL5360IS-T7 EL5360IS 7” 16 Ld SOIC (150 mil) MDP0027
EL5360IS-T13 EL5360IS 13” 16 Ld SOIC (150 mil) MDP0027
EL5360ISZ (Note) EL5360ISZ - 16 Ld SOIC (150 mil) (Pb-Free) MDP0027
EL5360ISZ-T7 (Note) EL5360ISZ 7” 16 Ld SOIC (150 mil) (Pb-Free) MDP0027
EL5360ISZ-T13 (Note) EL5360ISZ 13” 16 Ld SOIC (150 mil) (Pb-Free) MDP0027
EL5360IU 5360IU - 16 Ld QSOP (150 mil) MDP0040
EL5360IU-T7 5360IU 7” 16 Ld QSOP (150 mil) MDP0040
EL5160, EL5161, EL5260, EL5261, EL5360
3FN7387.9
May 7, 2007
EL5360IU-T13 5360IU 13” 16 Ld QSOP (150 mil) MDP0040
EL5360IUZ (Note) 5360IUZ - 16 Ld QSOP (150 mil) (Pb-Free) MDP0040
EL5360IUZ-T7 (Note) 5360IUZ 7” 16 Ld QSOP (150 mil) (Pb-Free) MDP0040
EL5360IUZ-T13 (Note) 5360IUZ 13” 16 Ld QSOP (150 mil) (Pb-Free) MDP0040
NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate
termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL
classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
Ordering Information (Continued)
PART NUMBER PART MARKING TAPE & REEL PACKAGE PKG.
DWG. #
EL5160, EL5161, EL5260, EL5261, EL5360
4FN7387.9
May 7, 2007
3
Absolute Maximum Ratings (TA = +25°C) Thermal Information
Supply Voltage between VS+ and VS-. . . . . . . . . . . . . . . . . . . 13.2V
Maximum Continuous Output Current . . . . . . . . . . . . . . . . . . . 50mA
Slew Rate of VS+ to VS- . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1V/µs
Pin Voltages. . . . . . . . . . . . . . . . . . . . . . . . VS- - 0.5V to VS+ + 0.5V
Operating Junction Temperature . . . . . . . . . . . . . . . . . . . . . .+125°C
Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Curves
Storage Temperature. . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C
Ambient Operating Temperature . . . . . . . . . . . . . . . .-40°C to +85°C
Pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . .see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typical values are for information purposes only. Unless otherwise noted, all tests
are at the specified temperature and are pulsed tests, therefore: TJ = TC = TA
Electrical Specifications VS+ = +5V, VS- = -5V, RF = 750Ω for AV = 1, RL = 150Ω, VCE, H = VS+, VCE, L = (VS+) -3V, TA = +25°C,
Unless Otherwise Specified.
PARAMETER DESCRIPTION CONDITIONS MIN TYP MAX UNIT
AC PERFORMANCE
BW -3dB Bandwidth AV = +1, RL = 500Ω200 MHz
AV = +2, RL = 150 Ω125 MHz
BW1 0.1dB Bandwidth RL = 100Ω10 MHz
SR Slew Rate VO = -2.5V to +2.5V , A V = +2, RF = RG = 1kΩ,
RL = 100Ω900 1700 2500 V/µs
EL5260, EL5261 800 1300 2500 V/µs
SR 500Ω Load 1360 V/µs
tS0.1% Settling Time VOUT = -2.5V to +2.5V, AV = +2 35 ns
eNInput Voltage Noise 4nV/Hz
iN- IN- Input Current Noise 7pA/Hz
iN+ IN+ Input Current Noise 8pA/Hz
HD2 5MHz, 2.5VP-P, RL = 150Ω, AV = +2 -74 dBc
HD3 5MHz, 2.5VP-P, RL = 150Ω, AV = +2 -50 dBc
dG Differential Gain Error (Note 1) AV = +2 0.1 %
dP Differential Phase Error (Note 1) AV = +2 0.1 °
DC PERFORMANCE
VOS Offset Voltage -5 1.6 +5 mV
TCVOS Input Offset Voltage Temperature
Coefficient Measured from TMIN to TMAX V/°C
ROL Transimpedance ±2.5VOUT into 150Ω800 2000 kΩ
INPUT CHARACTERISTICS
CMIR Common Mode Input Range Guaranteed by CMRR test ±3 ±3.3 V
CMRR Common Mode Rejection Ratio VIN = ±3V 506275dB
-ICMR - Input Current Common Mode Rejection -1 +1 µA/V
+IIN + Input Current -4 +4 µA
-IIN - Input Current -5 +5 µA
RIN Input Resistance 1.5 4 15 MΩ
CIN Input Capacitance 1pF
EL5160, EL5161, EL5260, EL5261, EL5360
5FN7387.9
May 7, 2007
OUTPUT CHARACTERISTICS
VOOutput Voltage Swing RL = 150Ω to GND ±3.1 ±3.4 ±3.8 V
RL = 1kΩ to GND ±3.8 ±4.0 ±4.2 V
IOUT Output Current RL = 10Ω to GND 40 70 140 mA
SUPPLY
ISON Supply Current - Enabled, per Amplifier No load, VIN = 0V (EL5160, EL5161,
EL5260, EL5261) 0.6 0.75 0.85 mA
No load, VIN = 0V (EL5360) 0.6 0.8 0.92 mA
ISOFF+ Supply Current - Disabled, per Amplifier 0 10 25 µA
ISOFF- Supply Current - Disabled, per Amplifier No load, VIN = 0V -25 -14 0 µA
PSRR Power Supply Rejection Ratio DC, VS = ±4.75V to ±5.25V 65 74 dB
-IPSR - Input Current Power Supply Rejection DC, VS = ±4.75V to ±5.25V -0.5 0.1 0.5 µA/V
ENABLE (EL5160, EL5260, EL5360 ONLY)
tEN Enable Time 600 ns
tDIS Disable Time 800 ns
ICE, H CE Pin Input High Current CE = VS+1525µA
ICE, L CE Pin Input Low Current CE = (VS+) - 5V -1 0 1 µA
NOTE:
1. Standard NTSC test, AC signal amplitude = 286mVP-P, f = 3.58MHz
Electrical Specifications VS+ = +5V, VS- = -5V, RF = 750Ω for AV = 1, RL = 150Ω, VCE, H = VS+, VCE, L = (VS+) -3V, TA = +25°C,
Unless Otherwise Specified. (Continued)
PARAMETER DESCRIPTION CONDITIONS MIN TYP MAX UNIT
Typical Performance Curves
FIGURE 1. FREQUENCY RESPONSE FIGURE 2. FREQUENCY RESPONSE
VCC=+5V
VEE=-5V
RL=150Ω
AV=2
RF=806Ω
RG=806Ω
100K 1M 10M 100M 1G
3
1
-1
-3
-5
-7
NORMALIZED GAIN (dB)
FREQUENCY (Hz)
VCC=+5V
VEE=-5V
AV=1
RL=500Ω
RF=2800Ω
100K 1M 10M 100M 1G
FREQUENCY (Hz)
4
2
0
-2
-4
-6
NORMALIZED GAIN (dB)
EL5160, EL5161, EL5260, EL5261, EL5360
6FN7387.9
May 7, 2007
FIGURE 3. FREQUENCY RESPONSE FOR VARIOUS
VCC, VEE
FIGURE 4. FREQUENCY RESPONSE FOR VARIOUS
VCC, VEE
FIGURE 5. FREQUENCY RESPONSE FIGURE 6. ROL
FIGURE 7. RISE TIME FIGURE 8. FAL L TIME
Typical Performance Curves (Continued)
RL=500Ω
RF=2.7k6Ω
AV=1
100K 1M 10M 100M 1G
5
3
1
-1
-3
-5
NORMALIZED GAIN (dB)
FREQUENCY (Hz)
±2.5V
±6V
±5V
±4V
±3V
AV= 2
RL=150Ω
RF=RG=762Ω
100K 1M 10M 100M 1G
4
2
0
-2
-4
-6
NORMALIZED GAIN (dB)
FREQUENCY (Hz)
±2.5V
±6V
±5V
±3V
±4V
VCC=+5V
VEE=-5V
AV=10
RL=500Ω
RF=560Ω
100K 1M 10M 100M 1G
4
2
0
-2
-4
-6
NORMALIZED GAIN (dB)
FREQUENCY (Hz)
1K 10K 100K 10M 1G
100M
10M
1M
100K
10K
100
FREQUENCY (Hz)
1M 100M
1K
VCC=+5V
VEE=-5V
AV=2
RL=150Ω
RF=RG=422Ω
INPUT
1V/DIV OUTPUT
500mV/DIV
4ns/DIV
VCC=+5V
VEE=-5V
AV=2
RL=150Ω
RF=RG=422Ω
INPUT
1V/DIV OUTPUT
500mV/DIV
4ns/DIV
EL5160, EL5161, EL5260, EL5261, EL5360
7FN7387.9
May 7, 2007
FIGURE 9. DISABLE DELAY TIME FIGURE 10. ENABLE DELAY TIME
FIGURE 11. PSSR FIGURE 12. CLOSED LOOP OUTPUT IMPEDANCE
FIGURE 13. FREQUENCY RESPONSE FOR VARIOUS GAIN
SETTINGS FIGURE 14. FREQUENCY RESPONSE FOR V ARIOUS
FEEDBACK RESISTORS, AV=-1
Typical Performance Curves (Continued)
5V/DIV
400ns/DIV
VCC=+5V
VEE=-5V
200mV/DIV
VOUT
CE
VCC=+5V
VEE=-5V
5V/DIV
200mV/DIV VOUT
CE
400ns/DIV
VCC
VEE
VCC=+5V
VEE=-5V
1K 10K 10M 100M 1G
0
-20
-40
-60
-80
-100
PSRR (dB)
FREQUENCY (Hz)
1M100K
VCC=+5V
VEE=-5V
10K 100K 100M
1K
100
10
1
100m
10m
OUTPUT IMPEDANCE (Ω)
FREQUENCY (Hz)
10M1M
VS=±5V
RF=1.5kΩ
RG=750Ω
RL=150Ω
AV=+2
AV=-2
AV=-5
100K 1M 1G
4
2
0
-2
-4
-6
NORMALIZED GAIN (dB)
FREQUENCY (Hz)
100M10M
VS=±5V
AV=-1
RG=768Ω
RL=150Ω
100K 1M 1G
4
2
0
-2
-4
-6
NORMALIZED GAIN (dB)
FREQUENCY (Hz)
100M10M
RF=768Ω
RF=1kΩ
RF=1.5kΩ
RF=1.2kΩ
EL5160, EL5161, EL5260, EL5261, EL5360
8FN7387.9
May 7, 2007
FIGURE 15. FREQUENCY RESPONSE FOR VARIOUS GAIN
SETTINGS FIGURE 16. FREQUENCY RESPONSE FOR V ARIOUS
FEEDBACK RESISTORS, AV=+1
FIGURE 17. P ACKAGE POWER DISSIPATION vs AMBIENT
TEMPERATURE FIGURE 18. P ACKAGE POWER DISSIPA TION vs AMBIENT
TEMPERATURE
FIGURE 19. P ACKAGE POWER DISSIPATION vs AMBIENT
TEMPERATURE FIGURE 20. P ACKAGE POWER DISSIPA TION vs AMBIENT
TEMPERATURE
Typical Performance Curves (Continued)
VS=±5V
RF=RG=768Ω
RL=500Ω
AV=-1
100K 1M 1G
4
2
0
-2
-4
-6
NORMALIZED GAIN (dB)
FREQUENCY (Hz)
100M10M
AV=+10
AV=-5
AV=+5
VS=±5V
AV=+1
RL=150Ω
100K 1M 1G
5
3
1
-1
-3
-5
NORMALIZED GAIN (dB)
FREQUENCY (Hz)
100M10M
RF=750Ω
RF=1kΩ
RF=2.8kΩ
1.250W
909mW
SO16 (0.150”)
θJA=80°C/W
0 25 150
1.4
1.2
0.8
0.4
0.2
0
POWER DISSIPATION (W)
FREQUENCY (Hz)
10050 12575
1
0.6
85
SO8
θJA=110°C/W
435mW
SOT23-5/6
θJA=110°C/W
JEDEC JESD51-7 HIGH EFFECTIVE THERMAL
CONDUCTIVITY TEST BOARD JEDEC JESD51-7 HIGH EFFECTIVE THERMAL
CONDUCTIVITY TEST BOARD
0 25 150
1.4
1.2
0.8
0.4
0.2
0
POWER DISSIPATION (W)
FREQUENCY (Hz)
10050 12575
1
0.6
85
893mW
QSOP16
θJA=112°C/W
870mW
MSOP8/10
θJA=115°C/W
JEDEC JESD51-3 LOW EFFECTIVE THERMAL
CONDUCTIVITY TEST BOARD
0 25 150
1
0.8
0.4
0.2
0.1
0
POWER DISSIPATION (W)
FREQUENCY (Hz)
10050 12575
0.6
0.3
85
0.9
0.7
0.5
909mW SO16 (0.150 ”)
θJA=110°C/W
625mW
391mW
SOT23-5/6
θJA=256°C/W
SO8
θJA=160°C/W
0 25 150
1.2
0.8
0.4
0.2
0
POWER DISSIPATION (W)
FREQUENCY (Hz)
10050 12575
0.6
85
1
633mW QSOP16
θJA=158°C/W
486mW
MSOP8/10
θJA=206°C/W
JEDEC JESD51-3 LOW EFFECTIVE THERMAL
CONDUCTIVITY TEST BOARD
EL5160, EL5161, EL5260, EL5261, EL5360
9FN7387.9
May 7, 2007
Applications Information
Product Descr iption
The EL5160, EL5161, EL5260, EL5261, and EL5360 are low
power, current-feedback operational amplifiers that offer a
wide -3dB bandwidth of 200MHz and a low supply current of
0.75mA per amplifier. The EL5160, EL5161, EL5260,
EL5261, and EL5360 work with supply voltages ranging from
a single 5V to 10V and they are also capable of swinging to
within 1V of either supply on the output. Because of their
current-feedback topology, the EL5160, EL5161, EL5260,
EL5261, and EL5360 do not have the normal gain-
bandwidth product associated with voltage-feedback
operational amplifiers. Instead, their -3dB bandwidth to
remain relatively constant as closed-loop gain is increased.
This combination of high bandwidth and low power, together
with aggressive pricing make the EL5160, EL5161, EL5260,
EL5261, and EL5360 ideal choices for many low-
power/high-bandwidth applications such as portable,
handheld, or battery-powered equipment.
Power Supply Bypassing and Printed Circuit
Board Layout
As with any high frequency device, good printed circuit
board layout is necessary for optimum performance. Low
impedance ground plane construction is essential. Surface
mount components are recommended, but if leaded
components are used, lead lengths should be as short as
possible. The power supply pins must be well bypassed to
reduce the risk of oscillation. The combination of a 4.7µF
tantalum capacito r in parallel with a 0.01µF ca pacitor has
been shown to work well when placed at each supply pin.
For good AC performance, parasitic capacitance should be
kept to a minimum, especially at the inverting input. (See the
Capacitance at the Inverting Input section) Even when
ground plane construction is used, it should be removed
from the area near the inverting input to minimize any stray
capacitance at that node. Carbon or Metal-Film resistors are
acceptable with the Metal-Film resistors giving slightly less
peaking and bandwidth because of additio nal series
inductance. Use of sockets, particularly for the SO package,
should be avoided if possible. Sockets add parasitic
inductance and capacitance which will result in additional
peaking and overshoot.
Pin Descriptions
EL5160
(8 Ld SOIC) EL5160
(6 Ld SOT-23) EL5161
(5 Ld SOT-23) PIN NAME FUNCTION EQUIVALENT CIRCUIT
1, 5 NC Not connected
2 4 4 IN- Inverting input
Circuit 1
3 3 3 IN+ Non-inverting input (See circuit 1)
4 2 2 VS- Negative supply
6 1 1 OUT Output
Circuit 2
7 6 5 VS+ Positive supply
85 CE
Chip enable
Circuit 3
IN-IN+
V
S+
VS-
V
S+
VS-
OUT
V
S+
VS-
CE
EL5160, EL5161, EL5260, EL5261, EL5360
10 FN7387.9
May 7, 2007
Disable/Power-Down
The EL5160 amplifier can be disabled placing its output in a
high impedance state. When disabled, the ampli fie r supply
current is reduced to < 15µA. The EL5160 is disabled when
its CE pin is pulled up to within 1V of the positive supply.
Similarly, the amplifier is enabled by floating or pulling its CE
pin to at least 3V below the positive supply. For ±5V supply,
this means that an EL5160 amplifier will be enabled when
CE is 2V or less, and disabled when CE is above 4V.
Although the logic levels are not standard TTL, this choice of
logic voltages allows the EL5160 to be enabled by tying CE
to ground, even in 5V single supply applications. The CE pin
can be driven from CMOS outputs.
Capacitance at the Inverting Input
Any manufacturer’s high-speed voltage- or current-feedback
amplifier can be affected by stray capacitance at the
inverting input. For inverting gains, this parasitic capacitance
has little effect because the inverting input is a virtual
ground, but for non-inverting gains, this capacitance (in
conjunction with the feedback and gain resistors) creates a
pole in the feedback path of the amplifie r. This pole, if low
enough in frequency, has the same destabilizing effect as a
zero in the forward open-loop response. The use of large-
value feedback and gain resistors exacerbates the problem
by further lowering the pole frequency (increasing the
possibility of oscillation.)
The EL5160, EL5161, EL5260, EL5261, and EL5360 have
been optimized with a TBDΩ feedback resistor. With the high
bandwidth of these amplifiers, these resistor values might
cause stability problems when combined with parasitic
capacitance, thus ground plane is not recommended around
the inverting input pin of the amplifie r.
Feedback Resistor Values
The EL5160, EL5161, EL5260, EL5261, and EL5360 have
been designed and specified at a gain of +2 with RF
approximately 806Ω. Th is value of fee dback resistor gives
200MHz of -3dB bandwidth at AV = 2 with TBDdB of
peaking. With AV = -2, an RF of approximately TBDΩ gives
200MHz of bandwidth with 1dB of peaking. Since the
EL5160, EL5161, EL5260, EL5261, and EL5360 are current-
feedback amplifiers, it is also possible to change the value of
RF to get more bandwidth. As seen in the curve of
Frequency Response for Various RF and RG, bandwidth and
peaking can be easily modified by varying the value of the
feedback resistor.
Because the EL5160, EL5161, EL5260, EL5261, and
EL5360 are current-feedback amplifiers, their gain-
bandwidth product is not a constant for different closed-loop
gains. This feature actually allows the EL5160, EL5161,
EL5260, EL5261, and EL536 0 to maintain about the same -
3dB bandwidth. As gain is increased, bandwidth decreases
slightly while stability increases. Since the loop stability is
improving with higher closed-loop gains, it becomes possible
to reduce the value of RF below the specified TBDΩ and still
retain stability, resulting in only a slight loss of bandwidth
with increased closed-loop gain.
Supply Voltage Range and Single-Supply
Operation
The EL5160, EL5161, EL5260, EL5261, and EL5360 have
been designed to operate with supply voltages having a
span of greater than 5V and less than 10V. In practical
terms, this means that they will operate on dual supplies
ranging from ±2.5V to ±5V. With single-supply, the EL5160,
EL5161, EL5260, EL5261, and EL5360 will operate from 5V
to 10V.
As supply voltages continue to decrease, it becomes
necessary to provide input and output voltage ranges that
can get as close as possible to the supply voltages. The
EL5160, EL5161, EL5260, EL5261, and EL5 360 have an
input range which extends to with in 2V of either supply. So,
for example, on +5V supplies, the EL5160, EL5161, EL5260,
EL5261, and EL5360 have an input range which spans ±3V.
The output range of the EL5160, EL5161, EL5260, EL5261,
and EL5360 is also quite large, extending to within 1V of the
supply rail. On a ±5V supply, the output is therefore capable
of swinging from -4V to +4V. Single-supply output range is
larger because of the increased negative swing due to the
external pull-down resistor to ground .
Video Performance
For good video performance, an amplifier is required to
maintain the same output impedance and the same
frequency response as DC levels are changed at the output.
This is especially difficult when driving a standard video load
of 150Ω, because of the change in outpu t curren t with DC
level. Previously, good differential gain could only be
achieved by running high idle currents through the output
transistors (to reduce variations in output impedance.)
These currents were typically comparable to the entire 1mA
supply current of each EL5160, EL5161, EL5260, EL5261,
and EL5360 amplifier. Sp ecial circuitry has been
incorporated in the EL5160, EL5161, EL5260, EL5261, and
EL5360 to reduce the variation of output impedance with
current output. This results in dG and dP specifications of
0.1% and 0.1°, while driving 150Ω at a gain of 2.
Video performance has also been measured with a 500Ω
load at a gain of +1. Under these conditions, the EL5160 has
dG and dP specifications of 0.1% and 0.1°.
Output Drive Capability
In spite of their low 1mA of supply current, the EL5160,
EL5161, EL5260, EL5261, and EL5360 are capable of
providing a minimum of ±50mA of output current. With a
minimum of ±50mA of output drive, the EL5160 is capable of
driving 50Ω loads to both rails, making it an excellent choice
for driving isolation transformers in telecommunications
applications.
EL5160, EL5161, EL5260, EL5261, EL5360
11 FN7387.9
May 7, 2007
Driving Cables and Capacitive Loads
When used as a cable driver, double termination is always
recommended for reflection-free performance. For those
applications, the back-termination series resistor will
decouple the EL5160, EL5161, EL5260, EL5261, and
EL5360 from the cable and allow extensive capacitive drive.
However, other applications may have high capacitive loads
without a back-termination resistor. In these applications, a
small series resistor (usually between 5Ω and 50Ω) can be
placed in series with the output to eliminate most peaking.
The gain resistor (RG) can then be chosen to make up for
any gain loss which may be created by this additional
resistor at the output. In many cases it is also possible to
simply increase the value of the feedback resistor (RF) to
reduce the peaking.
Current Limiting
The EL5160, EL5161, EL5260, EL5261, and EL5360 have
no internal current-limiting circuitry. If the output is shorted, it
is possible to exceed the Absolute Maximum Rating for
output current or power dissipation, potentially resultin g in
the destruction of the device.
Power Dissipation
With the high output drive capability of the EL5160, EL5161,
EL5260, EL5261, and EL536 0, it is possibl e to exceed the
+125°C Absolute Maximum junction temperature under
certain very high load current conditions. Generally speaking
when RL falls below about 25Ω, it is important to calculate
the maximum junction temperature (TJMAX) for the
application to determine if power supply voltages, load
conditions, or package type need to be modified for the
EL5160, EL5161, EL5260, EL5261, and EL5360 to remain in
the safe operating area. These parameters are calculated as
follows:
where:
•T
MAX = Maximum ambient te mp era ture
θJA = Thermal resistance of the package
n = Number of amplifiers in the package
•PD
MAX = Maximum power dissipation of each amplifier in
the package
PDMAX for each amplifier can be calculated as follows:
where:
•V
S = Supply voltage
•I
SMAX = Maximum supply current of 0.75mA
•V
OUTMAX = Maximum output voltage (required)
•R
L = Load resistance
Typical Application Circuits
FIGURE 22. FAST-SETTLING PRECISION AMPLIFIER
TJMAX TMAX θJA nPD
MAX
××()+=
PDMAX 2(VSISMAX)VS
(VOUTMAX)VOUTMAX
RL
----------------------------
×+××=
IN+
IN-
VS+
VS-
OUT
IN+
IN-
VS+
VS-
OUT
0.1µF
+5V
0.1µF
-5V
500Ω5Ω
5Ω
500Ω500Ω
VOUT
VIN
0.1µF
0.1µF
+5V
-5V
FIGURE 21. INVERTING 200mA OUTPUT CURRENT
DISTRIBUTION AMPLIFIER
IN+
IN-
VS+
VS-
OUT
IN+
IN-
VS+
VS-
OUT
0.1µF
+5V
0.1µF
-5V
0.1µF
0.1µF
500Ω500Ω
500Ω
500Ω
VOUT
VIN
+5V
-5V
EL5160, EL5161, EL5260, EL5261, EL5360
12 FN7387.9
May 7, 2007
IN+
IN-
VS+
VS-
OUT
IN+
IN-
VS+
VS-
OUT
0.1µF
+5V
0.1µF
-5V
500Ω250Ω
250Ω
500Ω500Ω
VOUT+
VIN
0.1µF
0.1µF
+5V
-5V
VOUT-
IN+
IN-
VS+
VS-
OUT
IN+
IN-
VS+
VS-
OUT
0.1µF
+5V
0.1µF
-5V
500Ω
500Ω500Ω
VOUT
0.1µF
0.1µF
+5V
-5V
500Ω
1kΩ
1kΩ
240Ω
0.1µF
0.1µF
RECEIVERTRANSMITTER
FIGURE 23. DIFFERENTIAL LINE DRIVER/RECEIVER
EL5160, EL5161, EL5260, EL5261, EL5360
13 FN7387.9
May 7, 2007
EL5160, EL5161, EL5260, EL5261, EL5360
Small Outline Package Family (SO)
GAUGE
PLANE
A2
A1 L
L1
DETAIL X 4° ±4°
SEATING
PLANE
eH
b
C
0.010 BMCA
0.004 C
0.010 BMCA
B
D
(N/2)
1
E1
E
NN (N/2)+1
A
PIN #1
I.D. MARK
h X 45°
A
SEE DETAIL “X”
c
0.010
MDP0027
SMALL OUTLINE PACKAGE FAMILY (SO)
SYMBOL
INCHES
TOLERANCE NOTESSO-8 SO-14
SO16
(0.150”)
SO16 (0.300”)
(SOL-16)
SO20
(SOL-20)
SO24
(SOL-24)
SO28
(SOL-28)
A 0.068 0.068 0.068 0.104 0.104 0.104 0.104 MAX -
A1 0.006 0.006 0.006 0.007 0.007 0.007 0.007 ±0.003 -
A2 0.057 0.057 0.057 0.092 0.092 0.092 0.092 ±0.002 -
b 0.017 0.017 0.017 0.017 0.017 0.017 0.017 ±0.003 -
c 0.009 0.009 0.009 0.011 0.011 0.011 0.011 ±0.001 -
D 0.193 0.341 0.390 0.406 0.504 0.606 0.704 ±0.004 1, 3
E 0.236 0.236 0.236 0.406 0.406 0.406 0.406 ±0.008 -
E1 0.154 0.154 0.154 0.295 0.295 0.295 0.295 ±0.004 2, 3
e 0.050 0.050 0.050 0.050 0.050 0.050 0.050 Basic -
L 0.025 0.025 0.025 0.030 0.030 0.030 0.030 ±0.009 -
L1 0.041 0.041 0.041 0.056 0.056 0.056 0.056 Basic -
h 0.013 0.013 0.013 0.020 0.020 0.020 0.020 Reference -
N 8 14 16 16 20 24 28 Reference -
Rev. M 2/07
NOTES:
1. Plastic or metal protrusions of 0.006” maximum per side are not included.
2. Plastic interlead protrusions of 0.010” maximum per side are not included.
3. Dimensions “D” and “E1” are measured at Datum Plane “H”.
4. Dimensioning and tolerancing per ASME Y14.5M-1994
14 FN7387.9
May 7, 2007
EL5160, EL5161, EL5260, EL5261, EL5360
SOT-23 Package Family
e1
N
A
D
E
4
321
E1
0.15 DC
2X 0.20 C
2X
e
B0.20 MDC A-B
b
NX
6
2 3
5
SEATING
PLANE
0.10 C
NX
1 3
C
D
0.15 A-BC
2X
A2
A1
H
c
(L1)
L
0.25
+3°
-0°
GAUGE
PLANE
A
MDP0038
SOT-23 PACKAGE FAMILY
SYMBOL
MILLIMETERS
TOLERANCESOT23-5 SOT23-6
A 1.45 1.45 MAX
A1 0.10 0.10 ±0.05
A2 1.14 1.14 ±0.15
b 0.40 0.40 ±0.05
c 0.14 0.14 ±0.06
D 2.90 2.90 Basic
E 2.80 2.80 Basic
E1 1.60 1.60 Basic
e 0.95 0.95 Basic
e1 1.90 1.90 Basic
L 0.45 0.45 ±0.10
L1 0.60 0.60 Reference
N 5 6 Reference
Rev. F 2/07
NOTES:
1. Plastic or metal protrusions of 0.25mm maximum per side are not
included.
2. Plastic interlead protrusions of 0.25mm maximum per side are not
included.
3. This dimension is measured at Datum Plane “H”.
4. Dimensioning and tolerancing per ASME Y14.5M-1994.
5. Index area - Pin #1 I.D. will be located within the indicated zone
(SOT23-6 only).
6. SOT23-5 version has no center lead (shown as a dashed line).
15 FN7387.9
May 7, 2007
EL5160, EL5161, EL5260, EL5261, EL5360
Mini SO Package Family (MSOP)
1(N/2)
(N/2)+1
N
PLANE
SEATING
N LEADS
0.10 C
PIN #1
I.D.
E1E
b
DETAIL X
3° ±3°
GAUGE
PLANE
SEE DETAIL "X"
c
A
0.25
A2
A1 L
0.25 C A B
D
A
M
B
e
C
0.08 C A B
M
H
L1
MDP0043
MINI SO PACKAGE FAMILY
SYMBOL
MILLIMETERS
TOLERANCE NOTESMSOP8 MSOP10
A1.101.10 Max. -
A1 0.10 0.10 ±0.05 -
A2 0.86 0.86 ±0.09 -
b 0.33 0.23 +0.07/-0.08 -
c0.180.18 ±0.05 -
D 3.00 3.00 ±0.10 1, 3
E4.904.90 ±0.15 -
E1 3.00 3.00 ±0.10 2, 3
e0.650.50 Basic -
L0.550.55 ±0.15 -
L1 0.95 0.95 Basic -
N 8 10 Reference -
Rev. D 2/07
NOTES:
1. Plastic or metal protrusions of 0.15mm maximum per side are not
included.
2. Plastic interlead protrusions of 0.25mm maximum per side are
not included.
3. Dimensions “D” and “E1” are measured at Datum Plane “H”.
4. Dimensioning and tolerancing per ASME Y14.5M-1994.
16 FN7387.9
May 7, 2007
EL5160, EL5161, EL5260, EL5261, EL5360
Small Outline Transistor Plastic Packages (SC70-5)
D
e1
E
E1
C
L
C
C
L
eb
C
L
A2
AA1
C
L
0.20 (0.008) M
0.10 (0.004) C
C
-C-
SEATING
PLANE
45
123
VIEW C
VIEW C
L
R1
R
4X θ1
4X θ1
GAUGE PLANE
L1
SEATING
αL2
C
PLANE
c
BASE METAL
WITH
c1
b1
PLATING
b
P5.049
5 LEAD SMALL OUTLINE TRANSISTOR PLASTIC PACKAGE
SYMBOL
INCHES MILLIMETERS
NOTESMIN MAX MIN MAX
A 0.031 0.043 0.80 1.10 -
A1 0.000 0.004 0.00 0.10 -
A2 0.031 0.039 0.80 1.00 -
b 0.006 0.012 0.15 0.30 -
b1 0.006 0.010 0.15 0.25
c 0.003 0.009 0.08 0.22 6
c1 0.003 0.009 0.08 0.20 6
D 0.073 0.085 1.85 2.15 3
E 0.071 0.094 1.80 2.40 -
E1 0.045 0.053 1.15 1.35 3
e 0.0256 Ref 0.65 Ref -
e1 0.0512 Ref 1.30 Ref -
L 0.010 0.018 0.26 0.46 4
L1 0.017 Ref. 0.420 Ref. -
L2 0.006 BSC 0.15 BSC
α0o8o0o8o-
N5 55
R 0.004 - 0.10 -
R1 0.004 0.010 0.15 0.25
Rev. 2 9/03
NOTES:
1. Dimensioning and tolerances per ASME Y14.5M-1994.
2. Package conforms to EIAJ SC70 and JEDEC MO-203AA.
3. Dimensions D and E1 are exclusive of mold flash, protrusions,
or gate burrs.
4. Footlength L measured at reference to gauge plane.
5. “N” is the number of terminal positions.
6. These Dimensions apply to the flat section of the lead between
0.08mm and 0.15mm from the lead tip.
7. Controlling dimension: MILLIMETER. Converted inch dimen-
sions are for reference only.
17
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FN7387.9
May 7, 2007
EL5160, EL5161, EL5260, EL5261, EL5360
Quarter Size Outline Plastic Packages Family (QSOP)
0.010 CAB
SEATING
PLANE
DETAIL X
EE1
1(N/2)
(N/2)+1
N
PIN #1
I.D. MARK
b
0.004 C
c
A
SEE DETAIL "X"
A2
4°±4°
GAUGE
PLANE
0.010
L
A1
D
B
H
C
e
A
0.007 CAB
L1
MDP0040
QUARTER SIZE OUTLINE PLASTIC PACKAGES FAMILY
SYMBOL
INCHES
TOLERANCE NOTESQSOP16 QSOP24 QSOP28
A 0.068 0.068 0.068 Max. -
A1 0.006 0.006 0.006 ±0.002 -
A2 0.056 0.056 0.056 ±0.004 -
b 0.010 0.010 0.010 ±0.002 -
c 0.008 0.008 0.008 ±0.001 -
D 0.193 0.341 0.390 ±0.004 1, 3
E 0.236 0.236 0.236 ±0.008 -
E1 0.154 0.154 0.154 ±0.004 2, 3
e 0.025 0.025 0.025 Basic -
L 0.025 0.025 0.025 ±0.009 -
L1 0.041 0.041 0.041 Basic -
N 16 24 28 Reference -
Rev. F 2/07
NOTES:
1. Plastic or metal protrusions of 0.006” maximum per side are not
included.
2. Plastic interlead protrusions of 0.010” maximum per side are not
included.
3. Dimensions “D” and “E1” are measured at Datum Plane “H”.
4. Dimensioning and tolerancing per ASME Y14.5M-1994.