LMV7235, LMV7239 www.ti.com SNOS532M - SEPTEMBER 2000 - REVISED FEBRUARY 2013 LMV7235/LMV7239/LMV7239Q 75 nsec, Ultra Low Power, Low Voltage, Rail-to-Rail Input Comparator with Open-Drain/Push-Pull Output Check for Samples: LMV7235, LMV7239 FEATURES DESCRIPTION * * * * * * * The LMV7235/LMV7239/LMV7239Q are ultra low power, low voltage, 75 nsec comparators. They are guaranteed to operate over the full supply voltage range of 2.7V to 5.5V. These devices achieve a 75 nsec propagation delay while consuming only 65A of supply current at 5V. 1 2 * * (VS = 5V, TA = 25C Typical values unless otherwise specified) Propagation delay 75 nsec Low supply current 65A Rail-to-Rail input Open drain and push-pull output Ideal for 2.7V and 5V single supply applications Available in space saving packages - 5-pin SOT-23 - 5-pin SC70 LMV7239Q is an automotive grade product that is AECQ grade 1 qualified and is manufactured on an automotive grade flow. APPLICATIONS * * * * * * * * Portable and battery powered systems Scanners Set top boxes High speed differential line receiver Window comparators Zero-crossing detectors High speed sampling circuits Automotive The LMV7235/LMV7239/LMV7239Q have a greater than rail-to-rail common mode voltage range. The input common mode voltage range extends 200mV below ground and 200mV above supply, allowing both ground and supply sensing. The LMV7235 features an open drain output. By connecting an external resistor, the output of the comparator can be used as a level shifter. The LMV7239/LMV7239Q features a push-pull output stage. This feature allows operation without the need of an external pull-up resistor. The LMV7235/LMV7239/LMV7239Q are available in the 5-Pin SC70 and 5-Pin SOT-23 packages, which are ideal for systems where small size and low power is critical. 1 2 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. All trademarks are the property of their respective owners. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright (c) 2000-2013, Texas Instruments Incorporated LMV7235, LMV7239 SNOS532M - SEPTEMBER 2000 - REVISED FEBRUARY 2013 www.ti.com Typical Application VCC 100K Crystal 100K VOUT 0.1uF 100K Figure 1. Crystal Oscillator Connection Diagram 1 5 VOUT V- Non-Inverting Input 2 3 V+ SC70 SOT-23 4 Inverting Input Figure 2. 5-Pin SC70/SOT-23 (Top View) Simplified Schematic 2 Submit Documentation Feedback Copyright (c) 2000-2013, Texas Instruments Incorporated Product Folder Links: LMV7235 LMV7239 LMV7235, LMV7239 www.ti.com SNOS532M - SEPTEMBER 2000 - REVISED FEBRUARY 2013 These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. Absolute Maximum Ratings ESD Tolerance (1) (2) (3) Human Model Body 1000V Machine Body 100V Differential Input Voltage Supply Voltage (4) Output Short Circuit Duration Supply Voltage (V+ - V-) 6V Soldering Information Infrared or Convection (20 sec) 235C Wave Soldering (10 sec) 260C (lead temp) (V+) +0.3V, (V-) -0.3V Voltage at Input/Output Pins Current at Input Pin (1) (5) 10mA Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is intended to be functional, but specific performance is not guaranteed. For guaranteed specifications and the test conditions, see the Electrical Characteristics. If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office / Distributors for availability and specifications. Human Body Model, applicable std. MIL-STD-883, Method 3015.7. Machine Model, applicable std. JESD22-A115-A (ESD MM std. of JEDEC)Field-Induced Charge-Device Model, applicable std. JESD22-C101-C (ESD FICDM std. of JEDEC). Applies to both single-supply and split-supply operation. Continuous short circuit operation at elevated ambient temperature can result in exceeding the maximum allowed junction temperature of 150C. Output currents in excess of 30mA over long term may adversely affect reliability. Limiting input pin current is only necessary for input voltages that exceed absolute maximum input voltage ratings. (2) (3) (4) (5) Operating Ratings Supply Voltages (V+ - V-) Temperature Range 2.7V to 5.5V (1) -40C to +85C LMV7235/LMV7239 -40C to +125C LMV7239Q -65C to +150C Storage Temperature Range Package Thermal Resistance 5-Pin SC70 478C/W 5-Pin SOT-23 265C/W (1) The maximum power dissipation is a function of TJ(MAX), JA. The maximum allowable power dissipation at any ambient temperature is PD = (TJ(MAX) - TA) / JA. All numbers apply for packages soldered directly onto a PC Board. 2.7V Electrical Characteristics Unless otherwise specified, all limits guaranteed for TA = 25C, VCM = V+/2, V+ = 2.7V, V- = 0V-. Boldface limits apply at the temperature extremes. Symbol Parameter VOS Input Offset Voltage IB Input Bias Current IOS Input Offset Current (1) (2) Conditions Min (1) Typ (2) Max (1) Units 0.8 6 8 mV 30 400 600 nA 5 200 400 nA All limits are guaranteed by testing or statistical analysis. Typical values represent the most likely parametric norm as determined at the time of characterization. Actual typical values may vary over time and will also depend on the application and configuration. The typical values are not tested and are not guaranteed on shipped production material. Copyright (c) 2000-2013, Texas Instruments Incorporated Product Folder Links: LMV7235 LMV7239 Submit Documentation Feedback 3 LMV7235, LMV7239 SNOS532M - SEPTEMBER 2000 - REVISED FEBRUARY 2013 www.ti.com 2.7V Electrical Characteristics (continued) Unless otherwise specified, all limits guaranteed for TA = 25C, VCM = V+/2, V+ = 2.7V, V- = 0V-. Boldface limits apply at the temperature extremes. Symbol Parameter Conditions Min (1) Typ (2) Max (1) Units CMRR Common Mode Rejection Ratio 0V < VCM < 2.7V PSRR Power Supply Rejection Ratio V+ = 2.7V to 5V 65 85 VCM Input Common-Mode Voltage Range CMRR > 50dB V- -0.1V- -0.2 to 2.9 IL = 4mA, VID = 500mV V+ -0.35 V+ -0.26 V IL = 0.4mA, VID = 500mV V+ -0.02 V IL = -4mA, VID = -500mV 230 Output Swing High (LMV7239 only) VO Output Swing Low (LMV7235/LMV7239/LMV7239Q) (3) 52 IL = -0.4mA, VID = -500mV Output Short Circuit Current Supply Current Propagation Delay Propagation Delay Skew (LMV7239 only) mA Sinking, VO = 2.7V (LMV7235, RL = 10k) 20 mA 52 No load Output Rise Time Output Fall Time ILEAKAGE Output Leakage Current (LMV7235 only) (3) (4) (5) (6) 4 A 96 ns Overdrive = 50mV CLOAD = 15pF 87 ns Overdrive = 100mV CLOAD = 15pF 85 ns 2 ns 1.7 ns LMV7235 10% to 90% 112 ns 90% to 10% 1.7 ns 3 nA (5) Overdrive = 20mV (6) (5) tf 85 100 Overdrive = 20mV CLOAD = 15pF LMV7239/LMV7239Q 10% to 90% tr mV 15 (5) tSKEW 350 450 V Sourcing, VO = 0V (LMV7239 only) (5) tPD dB V+ +0.1V+ mV (4) IS dB 15 (4) ISC 62 CMRR is not linear over the common mode range. Limits are guaranteed over the worst case from 0 to VCC/2 or VCC/2 to VCC. Applies to both single-supply and split-supply operation. Continuous short circuit operation at elevated ambient temperature can result in exceeding the maximum allowed junction temperature of 150C. Output currents in excess of 30mA over long term may adversely affect reliability. A 10k pull-up resistor was used when measuring the LMV7235. The rise time of the LMV7235 is a function of the R-C time constant. Propagation Delay Skew is defined as the absolute value of the difference between tPDLH and tPDHL. Submit Documentation Feedback Copyright (c) 2000-2013, Texas Instruments Incorporated Product Folder Links: LMV7235 LMV7239 LMV7235, LMV7239 www.ti.com SNOS532M - SEPTEMBER 2000 - REVISED FEBRUARY 2013 5V Electrical Characteristics Unless otherwise specified, all limits guaranteed for TA = 25C, VCM = V+/2, V+ = 5V, V- = 0V. Boldface limits apply at the temperature extremes. Symbol Parameter Conditions Min (1) Typ 30 400 600 nA 5 200 400 nA Input Bias Current IOS Input Offset Current CMRR Common Mode Rejection Ratio 0V < VCM < 5V 52 67 PSRR Power Supply Rejection Ratio V+ = 2.7V to 5V 65 85 Input Common-Mode Voltage Range CMRR > 50dB IL = 4mA, VID = 500mV Output Swing High (LMV7239 only) VO Output Swing Low (LMV7235/LMV7239/LMV7239Q) Output Short Circuit Current Supply Current V -0.25 IL = -4mA, VID = -500mV 230 IL = -0.4mA, VID = -500mV 10 Sourcing, VO = 0V (LMV7239 only) 25 15 55 Sinking, VO = 5V (LMV7235, RL = 10k) 30 20 60 Output Fall Time ILEAKAGE Output Leakeage Current (LMV7235 only) (1) (2) (3) (4) (5) mA mA 65 95 110 A Overdrive = 50mV CLOAD = 15pF 82 ns Overdrive = 100mV CLOAD = 15pF 75 ns 1 ns 1.2 ns LMV7235 10% to 90% 100 ns 90% to 10% 1.2 ns 3 nA (5) (4) tf mV ns Overdrive = 20mV Output Rise Time mV 89 LMV7239 10% to 90% tr 350 450 Overdrive = 20mV CLOAD = 15pF (4) Propagation Delay Skew (LMV7239 only) V V (4) tSKEW V +0.1V + V+ -0.01 No load Propagation Delay + IL = 0.4mA, VID = 500mV (4) tPD -0.2 to 5.2 dB + V (3) IS + dB V -0.15 (3) ISC V -0.1V Units mV IB VCM (1) 6 8 Input Offset Voltage - Limits 1 VOS - (2) All limits are guaranteed by testing or statistical analysis. Typical values represent the most likely parametric norm as determined at the time of characterization. Actual typical values may vary over time and will also depend on the application and configuration. The typical values are not tested and are not guaranteed on shipped production material. Applies to both single-supply and split-supply operation. Continuous short circuit operation at elevated ambient temperature can result in exceeding the maximum allowed junction temperature of 150C. Output currents in excess of 30mA over long term may adversely affect reliability. A 10k pull-up resistor was used when measuring the LMV7235. The rise time of the LMV7235 is a function of the R-C time constant. Propagation Delay Skew is defined as the absolute value of the difference between tPDLH and tPDHL. Copyright (c) 2000-2013, Texas Instruments Incorporated Product Folder Links: LMV7235 LMV7239 Submit Documentation Feedback 5 LMV7235, LMV7239 SNOS532M - SEPTEMBER 2000 - REVISED FEBRUARY 2013 www.ti.com TYPICAL PERFORMANCE CHARACTERISTICS (Unless otherwise specified, VS = 5V, CL = 10pF, TA = 25C). Supply Current vs. Supply Voltage Sourcing Current vs. Output Voltage 100 -40C 25C 85C 125C 100 VS = 5V 80 10 ISOURCE (mA) SUPPLY CURRENT ( A) 120 60 40 1 20 0 0 1 2 3 4 SUPPLY VOLTAGE (V) .1 .01 5 .1 + OUTPUT VOLTAGE REFERENCED TO V (V) Figure 3. Figure 4. Sourcing Current vs. Output Voltage Sinking Current vs. Output Voltage 100 100 VS = 2.7V VS = 5V 10 ISINK (mA) ISOURCE (mA) 10 1 1 .1 .01 6 10 1 .1 1 10 .1 .01 .1 1 10 OUTPUT VOLTAGE REFERENCED TO V+ (V) OUTPUT VOLTAGE REFERENCED TO GND (V) Figure 5. Figure 6. Submit Documentation Feedback Copyright (c) 2000-2013, Texas Instruments Incorporated Product Folder Links: LMV7235 LMV7239 LMV7235, LMV7239 www.ti.com SNOS532M - SEPTEMBER 2000 - REVISED FEBRUARY 2013 TYPICAL PERFORMANCE CHARACTERISTICS (continued) (Unless otherwise specified, VS = 5V, CL = 10pF, TA = 25C). Sinking Current vs. Output Voltage Input Bias Current vs. Input Voltage 50 100 40 INPUT BIAS CURRENT (nA) VS = 2.7V ISINK (mA) 10 1 VS = 5V 30 IBIAS+ 20 10 0 -10 IBIAS- -20 -30 -40 .1 .01 .1 1 -50 -0.2 10 2 1 OUTPUT VOLTAGE REFERENCED TO GND (V) Figure 7. Input Bias Current vs. Input Voltage Propagation Delay vs. Temperature 160 VS = 2.7V 50 40 30 PROPAGATION DELAY (ns) INPUT BIAS CURRENT (nA) 5 4 Figure 8. 70 60 IBIAS+ 20 10 0 -10 -20 -30 -40 IBIAS- -50 -60 VS=2.7V VOD=20mV CLOAD=15pF 150 140 130 Falling Edge 120 110 100 90 Rising Edge 80 0 2 1 2.7 -40 -20 0 20 40 60 80 100 120 140 TEMPERATURE (C) VIN (V) Figure 9. Figure 10. Propagation Delay vs. Temperature Propagation Delay vs. Capacitive Load 106 VS=5V VOD=20mV CLOAD=15pF 130 120 Falling Edge 110 100 90 PROPAGATION DELAY (ns) 140 PROPAGATION DELAY (ns) 3 VIN (V) VS= 2.7V VOD=20mV 104 102 Falling Edge 100 98 96 Rising Edge Rising Edge 80 94 -40 -20 0 20 40 60 80 100 120 140 TEMPERATURE (C) 0 Figure 11. 20 40 60 80 CAPACITANCE (pF) 100 Figure 12. Copyright (c) 2000-2013, Texas Instruments Incorporated Product Folder Links: LMV7235 LMV7239 Submit Documentation Feedback 7 LMV7235, LMV7239 SNOS532M - SEPTEMBER 2000 - REVISED FEBRUARY 2013 www.ti.com TYPICAL PERFORMANCE CHARACTERISTICS (continued) (Unless otherwise specified, VS = 5V, CL = 10pF, TA = 25C). Propagation Delay vs. Capacitive Load Propagation Delay vs. Input Overdrive 100 VS= 5V VOD=20mV PROPAGATION DELAY (ns) PROPAGATION DELAY (ns) 96 94 Falling Edge 92 90 VS= 2.7V CLOAD=15pF 95 Rising Edge 90 85 Rising Edge Falling Edge 88 80 0 20 40 60 80 CAPACITANCE (pF) 100 20 Figure 13. Figure 14. Propagation Delay vs. Input Overdrive Propagation Delay vs. Common Mode Voltage 90 120 VS= 5V CLOAD=15pF PROPAGATION DELAY (ns) PROPAGATION DELAY (ns) 30 40 50 60 70 80 90 100 INPUT OVERDRIVE (mV) 85 Rising Edge 80 75 Falling Edge 70 VS= 2.7V VOD=20mV CLOAD=15pF 115 110 105 100 95 90 85 Rising Edge Falling Edge 80 20 40 60 80 INPUT OVERDRIVE (mV) 100 0.0 0.5 1.0 1.5 2.0 2.5 3.0 INPUT COMMON MODE VOLTAGE (V) Figure 15. Figure 16. Propagation Delay vs. Common Mode Voltage PROPAGATION DELAY (ns) 110 VS= 5V VOD=20mV CLOAD=15pF 100 Falling Edge Rising Edge 90 80 0 1 2 3 4 5 INPUT COMMON MODE VOLTAGE (V) Figure 17. 8 Submit Documentation Feedback Copyright (c) 2000-2013, Texas Instruments Incorporated Product Folder Links: LMV7235 LMV7239 LMV7235, LMV7239 www.ti.com SNOS532M - SEPTEMBER 2000 - REVISED FEBRUARY 2013 APPLICATION INFORMATION The LMV7235/LMV7239/LMV7239Q are single supply comparators with 75ns of propagation delay and only 65A of supply current. The LMV7235/LMV7239/LMV7239Q are rail-to-rail input and output. The typical input common mode voltage range of -0.2V below the ground to 0.2V above the supply. The LMV7235/LMV7239/LMV7239Q use a complimentary PNP and NPN input stage in which the PNP stage senses common mode voltage near V- and the NPN stage senses common mode voltage near V+. If either of the input signals falls below the negative common mode limit, the parasitic PN junction formed by the substrate and the base of the PNP will turn on resulting in an increase of input bias current. If one of the input goes above the positive common mode limit, the output will still maintain the correct logic level as long as the other input stays within the common mode range. However, the propagation delay will increase. When both inputs are outside the common mode voltage range, current saturation occurs in the input stage, and the output becomes unpredictable. The propagation delay does not increase significantly with large differential input voltages. However, large differential voltages greater than the supply voltage should be avoided to prevent damage to the input stage. The LMV7239 has a push-pull output. When the output switches, there is a direct path between VCC and ground, causing high output sinking or sourcing current during the transition. After the transition, the output current decreases and the supply current settles back to about 65A at 5V, thus conserving power consumption. The LMV7235 has an open drain that requires a pull-up resistor to a positive supply voltage for the output to switch properly. When the internal output transistor is off, the output voltage will be pulled up to the external positive voltage. CIRCUIT LAYOUT AND BYPASSING The LMV7235/LMV7239/LMV7239Q require high speed layout. Follow these layout guidelines: 1. Use printed circuit board with a good, unbroken low-inductance ground plane. 2. Place a decoupling capacitor (0.1F ceramic surface mount capacitor) as close as possible to VCC pin. 3. On the inputs and the output, keep lead lengths as short as possible to avoid unwanted parasitic feedback around the comparator. Keep inputs away from output. 4. Solder the device directly to the printed circuit board rather than using a socket. 5. For slow moving input signals, take care to prevent parasitic feedback. A small capacitor (1000pF or less) placed between the inputs can help eliminate oscillations in the transition region. This capacitor causes some degradation to tPD when the source impedance is low. 6. The topside ground plane runs between the output and inputs. 7. Ground trace from the ground pin runs under the device up to the bypass capacitor, shielding the inputs from the outputs. COMPARATOR WITH HYSTERESIS The basic comparator configuration may oscillate or produce a noisy output if the applied differential input voltage is near the comparator's offset voltage. This usually happens when the input signal is moving very slowly across the comparator's switching threshold. This problem can be prevented by the addition of hysteresis or positive feedback. INVERTING COMPARATOR WITH HYSTERESIS The inverting comparator with hysteresis requires a three resistor network that is referenced to the supply voltage VCC of the comparator, as shown in Figure 18. When VIN at the inverting input is less than VA, the voltage at the non-inverting node of the comparator (VIN < VA), the output voltage is high (for simplicity assume VO switches as high as VCC). The three network resistors can be represented as R1||R3 in series with R2. The lower input trip voltage VA1 is defined as: VA1 = VCCR2 / [(R1||R3) + R2] (1) Copyright (c) 2000-2013, Texas Instruments Incorporated Product Folder Links: LMV7235 LMV7239 Submit Documentation Feedback 9 LMV7235, LMV7239 SNOS532M - SEPTEMBER 2000 - REVISED FEBRUARY 2013 www.ti.com When VIN is greater than VA (VIN > VA), the output voltage is low, very close to ground. In this case the three network resistors can be presented as R2 || R3 in series with R1. The upper trip voltage VA2 is defined as: VA2 = VCC (R2||R3) / [(R1)+ (R2||R3)] (2) The total hysteresis provided by the network is defined as: Delta VA = VA1- VA2 (3) To assure that the comparator will always switch fully to VCC and not be pulled down by the load the resistors, values should be chosen as follows: RPULL-UP << RLOAD (4) Figure 18. Inverting Comparator with Hysteresis NON-INVERTING COMPARATOR WITH HYSTERESIS A non inverting comparator with hysteresis requires a two resistor network, and a voltage reference (VREF) at the inverting input. When VIN is low, the output is also low. For the output to switch from low to high, VIN must rise up to VIN1 where VIN1 is calculated by: VIN1 = R1*(VREF / R2) + VREF (5) When VIN is high, the output is also high, to make the comparator switch back to it's low state, VIN must equal VREF before VA will again equal VREF. VIN can be calculated by: VIN2 = [VREF (R1+ R2) - VCC R1] / R2 (6) The hysteresis of this circuit is the difference between VIN1 and VIN2. Delta VIN = VCC R1 / R2 10 Submit Documentation Feedback (7) Copyright (c) 2000-2013, Texas Instruments Incorporated Product Folder Links: LMV7235 LMV7239 LMV7235, LMV7239 www.ti.com SNOS532M - SEPTEMBER 2000 - REVISED FEBRUARY 2013 Figure 19. Non-Inverting Comparator with Hysteresis ZERO-CROSSING DETECTOR The inverting input is connected to ground and the non-inverting input is connected to 100mVp-p signal. As the signal at the non-inverting input crosses 0V, the comparator's output changes state. + OUT - Figure 20. Zero-Crossing Detector THRESHOLD DETECTOR Instead of tying the inverting input to 0V, the inverting input can be tied to a reference voltage. The non-inverting input is connected to the input. As the input passes the VREF threshold, the comparator's output changes state. Figure 21. Threshold Detector Copyright (c) 2000-2013, Texas Instruments Incorporated Product Folder Links: LMV7235 LMV7239 Submit Documentation Feedback 11 LMV7235, LMV7239 SNOS532M - SEPTEMBER 2000 - REVISED FEBRUARY 2013 www.ti.com CRYSTAL OSCILLATOR A simple crystal oscillator using the LMV7239 is shown below. Resistors R1 and R2 set the bias point at the comparator's non-inverting input. Resistors R3, R4 and C1 sets the inverting input node at an appropriate DC average level based on the output. The crystal's path provides resonant positive feedback and stable oscillation occurs. The output duty cycle for this circuit is roughly 50%, but it is affected by resistor tolerances and to a lesser extent by the comparator offset. Figure 22. Crystal Oscillator IR RECEIVER The LMV7239 is an ideal candidate to be used as an infrared receiver. The infrared photo diode creates a current relative to the amount of infrared light present. The current creates a voltage across RD. When this voltage level cross the voltage applied by the voltage divider to the inverting input, the output transitions. Figure 23. IR Receiver 12 Submit Documentation Feedback Copyright (c) 2000-2013, Texas Instruments Incorporated Product Folder Links: LMV7235 LMV7239 LMV7235, LMV7239 www.ti.com SNOS532M - SEPTEMBER 2000 - REVISED FEBRUARY 2013 REVISION HISTORY Changes from Revision L (February 2013) to Revision M * Page Changed layout of National Data Sheet to TI format .......................................................................................................... 12 Copyright (c) 2000-2013, Texas Instruments Incorporated Product Folder Links: LMV7235 LMV7239 Submit Documentation Feedback 13 PACKAGE OPTION ADDENDUM www.ti.com 11-Mar-2021 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (C) Device Marking (3) (4/5) (6) LMV7235M5 ACTIVE SOT-23 DBV 5 1000 Non-RoHS & Green Call TI Call TI -40 to 85 C21A LMV7235M5/NOPB ACTIVE SOT-23 DBV 5 1000 RoHS & Green SN Level-1-260C-UNLIM -40 to 85 C21A LMV7235M5X ACTIVE SOT-23 DBV 5 3000 Non-RoHS & Green Call TI Call TI -40 to 85 C21A LMV7235M5X/NOPB ACTIVE SOT-23 DBV 5 3000 RoHS & Green SN Level-1-260C-UNLIM -40 to 85 C21A LMV7235M7 ACTIVE SC70 DCK 5 1000 Non-RoHS & Green Call TI Call TI -40 to 85 C21 LMV7235M7/NOPB ACTIVE SC70 DCK 5 1000 RoHS & Green SN Level-1-260C-UNLIM -40 to 85 C21 LMV7235M7X/NOPB ACTIVE SC70 DCK 5 3000 RoHS & Green SN Level-1-260C-UNLIM -40 to 85 C21 LMV7239M5 NRND SOT-23 DBV 5 1000 Non-RoHS & Green Call TI Call TI -40 to 85 C20A LMV7239M5/NOPB ACTIVE SOT-23 DBV 5 1000 RoHS & Green SN Level-1-260C-UNLIM -40 to 85 C20A LMV7239M5X NRND SOT-23 DBV 5 3000 Non-RoHS & Green Call TI Call TI -40 to 85 C20A LMV7239M5X/NOPB ACTIVE SOT-23 DBV 5 3000 RoHS & Green SN Level-1-260C-UNLIM -40 to 85 C20A LMV7239M7 NRND SC70 DCK 5 1000 Non-RoHS & Green Call TI Call TI -40 to 85 C20 LMV7239M7/NOPB ACTIVE SC70 DCK 5 1000 RoHS & Green SN Level-1-260C-UNLIM -40 to 85 C20 LMV7239M7X NRND SC70 DCK 5 3000 Non-RoHS & Green Call TI Call TI -40 to 85 C20 LMV7239M7X/NOPB ACTIVE SC70 DCK 5 3000 RoHS & Green SN Level-1-260C-UNLIM -40 to 85 C20 LMV7239QDBVRQ1 ACTIVE SOT-23 DBV 5 3000 RoHS & Green SN Level-1-260C-UNLIM -40 to 125 ZBMX LMV7239QM7/NOPB ACTIVE SC70 DCK 5 1000 RoHS & Green SN Level-1-260C-UNLIM -40 to 125 C42 LMV7239QM7X/NOPB ACTIVE SC70 DCK 5 3000 RoHS & Green SN Level-1-260C-UNLIM -40 to 125 C42 Addendum-Page 1 Samples PACKAGE OPTION ADDENDUM www.ti.com 11-Mar-2021 (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. OTHER QUALIFIED VERSIONS OF LMV7239, LMV7239-Q1 : * Catalog: LMV7239 * Automotive: LMV7239-Q1 NOTE: Qualified Version Definitions: Addendum-Page 2 PACKAGE OPTION ADDENDUM www.ti.com 11-Mar-2021 * Catalog - TI's standard catalog product * Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects Addendum-Page 3 PACKAGE MATERIALS INFORMATION www.ti.com 29-Sep-2019 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) LMV7235M5 SOT-23 DBV 5 1000 178.0 8.4 LMV7235M5/NOPB SOT-23 DBV 5 1000 178.0 LMV7235M5X SOT-23 DBV 5 3000 178.0 LMV7235M5X/NOPB SOT-23 DBV 5 3000 LMV7235M7 SC70 DCK 5 W Pin1 (mm) Quadrant 3.2 3.2 1.4 4.0 8.0 Q3 8.4 3.2 3.2 1.4 4.0 8.0 Q3 8.4 3.2 3.2 1.4 4.0 8.0 Q3 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 1000 178.0 8.4 2.25 2.45 1.2 4.0 8.0 Q3 LMV7235M7/NOPB SC70 DCK 5 1000 178.0 8.4 2.25 2.45 1.2 4.0 8.0 Q3 LMV7235M7X/NOPB SC70 DCK 5 3000 178.0 8.4 2.25 2.45 1.2 4.0 8.0 Q3 LMV7239M5 SOT-23 DBV 5 1000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LMV7239M5/NOPB SOT-23 DBV 5 1000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LMV7239M5X SOT-23 DBV 5 3000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LMV7239M5X/NOPB SOT-23 DBV 5 3000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LMV7239M7 SC70 DCK 5 1000 178.0 8.4 2.25 2.45 1.2 4.0 8.0 Q3 LMV7239M7/NOPB SC70 DCK 5 1000 178.0 8.4 2.25 2.45 1.2 4.0 8.0 Q3 LMV7239M7X SC70 DCK 5 3000 178.0 8.4 2.25 2.45 1.2 4.0 8.0 Q3 LMV7239M7X/NOPB SC70 DCK 5 3000 178.0 8.4 2.25 2.45 1.2 4.0 8.0 Q3 LMV7239QDBVRQ1 SOT-23 DBV 5 3000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LMV7239QM7/NOPB SC70 DCK 5 1000 178.0 8.4 2.25 2.45 1.2 4.0 8.0 Q3 LMV7239QM7X/NOPB SC70 DCK 5 3000 178.0 8.4 2.25 2.45 1.2 4.0 8.0 Q3 Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 29-Sep-2019 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) LMV7235M5 SOT-23 DBV 5 1000 210.0 185.0 35.0 LMV7235M5/NOPB SOT-23 DBV 5 1000 210.0 185.0 35.0 LMV7235M5X SOT-23 DBV 5 3000 210.0 185.0 35.0 LMV7235M5X/NOPB SOT-23 DBV 5 3000 210.0 185.0 35.0 LMV7235M7 SC70 DCK 5 1000 210.0 185.0 35.0 LMV7235M7/NOPB SC70 DCK 5 1000 210.0 185.0 35.0 LMV7235M7X/NOPB SC70 DCK 5 3000 210.0 185.0 35.0 LMV7239M5 SOT-23 DBV 5 1000 210.0 185.0 35.0 LMV7239M5/NOPB SOT-23 DBV 5 1000 210.0 185.0 35.0 LMV7239M5X SOT-23 DBV 5 3000 210.0 185.0 35.0 LMV7239M5X/NOPB SOT-23 DBV 5 3000 210.0 185.0 35.0 LMV7239M7 SC70 DCK 5 1000 210.0 185.0 35.0 LMV7239M7/NOPB SC70 DCK 5 1000 210.0 185.0 35.0 LMV7239M7X SC70 DCK 5 3000 210.0 185.0 35.0 LMV7239M7X/NOPB SC70 DCK 5 3000 210.0 185.0 35.0 LMV7239QDBVRQ1 SOT-23 DBV 5 3000 210.0 185.0 35.0 LMV7239QM7/NOPB SC70 DCK 5 1000 210.0 185.0 35.0 LMV7239QM7X/NOPB SC70 DCK 5 3000 210.0 185.0 35.0 Pack Materials-Page 2 PACKAGE OUTLINE DBV0005A SOT-23 - 1.45 mm max height SCALE 4.000 SMALL OUTLINE TRANSISTOR C 3.0 2.6 1.75 1.45 PIN 1 INDEX AREA 1 0.1 C B A 5 2X 0.95 1.9 1.45 0.90 3.05 2.75 1.9 2 4 0.5 5X 0.3 0.2 3 (1.1) C A B 0.15 TYP 0.00 0.25 GAGE PLANE 8 TYP 0 0.22 TYP 0.08 0.6 TYP 0.3 SEATING PLANE 4214839/E 09/2019 NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. Refernce JEDEC MO-178. 4. Body dimensions do not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed 0.15 mm per side. www.ti.com EXAMPLE BOARD LAYOUT DBV0005A SOT-23 - 1.45 mm max height SMALL OUTLINE TRANSISTOR PKG 5X (1.1) 1 5 5X (0.6) SYMM (1.9) 2 2X (0.95) 3 4 (R0.05) TYP (2.6) LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE:15X SOLDER MASK OPENING METAL SOLDER MASK OPENING METAL UNDER SOLDER MASK EXPOSED METAL EXPOSED METAL 0.07 MIN ARROUND 0.07 MAX ARROUND NON SOLDER MASK DEFINED (PREFERRED) SOLDER MASK DEFINED SOLDER MASK DETAILS 4214839/E 09/2019 NOTES: (continued) 5. Publication IPC-7351 may have alternate designs. 6. Solder mask tolerances between and around signal pads can vary based on board fabrication site. www.ti.com EXAMPLE STENCIL DESIGN DBV0005A SOT-23 - 1.45 mm max height SMALL OUTLINE TRANSISTOR PKG 5X (1.1) 1 5 5X (0.6) SYMM (1.9) 2 2X(0.95) 4 3 (R0.05) TYP (2.6) SOLDER PASTE EXAMPLE BASED ON 0.125 mm THICK STENCIL SCALE:15X 4214839/E 09/2019 NOTES: (continued) 7. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 8. Board assembly site may have different recommendations for stencil design. www.ti.com IMPORTANT NOTICE AND DISCLAIMER TI PROVIDES TECHNICAL AND RELIABILITY DATA (INCLUDING DATASHEETS), DESIGN RESOURCES (INCLUDING REFERENCE DESIGNS), APPLICATION OR OTHER DESIGN ADVICE, WEB TOOLS, SAFETY INFORMATION, AND OTHER RESOURCES "AS IS" AND WITH ALL FAULTS, AND DISCLAIMS ALL WARRANTIES, EXPRESS AND IMPLIED, INCLUDING WITHOUT LIMITATION ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF THIRD PARTY INTELLECTUAL PROPERTY RIGHTS. These resources are intended for skilled developers designing with TI products. You are solely responsible for (1) selecting the appropriate TI products for your application, (2) designing, validating and testing your application, and (3) ensuring your application meets applicable standards, and any other safety, security, or other requirements. These resources are subject to change without notice. TI grants you permission to use these resources only for development of an application that uses the TI products described in the resource. Other reproduction and display of these resources is prohibited. No license is granted to any other TI intellectual property right or to any third party intellectual property right. TI disclaims responsibility for, and you will fully indemnify TI and its representatives against, any claims, damages, costs, losses, and liabilities arising out of your use of these resources. TI's products are provided subject to TI's Terms of Sale (https:www.ti.com/legal/termsofsale.html) or other applicable terms available either on ti.com or provided in conjunction with such TI products. TI's provision of these resources does not expand or otherwise alter TI's applicable warranties or warranty disclaimers for TI products.IMPORTANT NOTICE Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265 Copyright (c) 2021, Texas Instruments Incorporated