SN54221, SN54LS221, SN74221, SN74LS221
DUAL MONOSTABLE MULTIVIBRATORS
WITH SCHMITT-TRIGGER INPUTS
SDLS213A – DECEMBER 1983 – REVISED FEBRUAR Y 1998
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
D
Dual Versions of Highly Stable SN54121
and SN74121 One Shots
D
SN54221 and SN74221 Demonstrate
Electrical and Switching Characteristics
That Are Virtually Identical to the SN54121
and SN74121 One Shots
D
Pinout Is Identical to the SN54123,
SN74123, SN54LS123, and SN74LS123
D
Overriding Clear Terminates Output Pulse
D
Package Options Include Plastic
Small-Outline (D), Shrink Small-Outline
(DB) Packages, Ceramic Chip Carriers (FK)
and Flat Packs (W), and Standard Plastic
(N) and Ceramic (J) 300-mil DIPs
TYPE
MAXIMUM
OUTPUT
PULSE
LENGTH(S)
SN54221 21
SN74221 28
SN54LS221 49
SN74LS221 70
description
The ’221 and ’LS221 devices are monolithic dual
multivibrators with performance characteristics
virtually identical to those of the ’121 devices.
Each multivibrator features a negative-transition-
triggered input and a positive-transition-triggered
input, either of which can be used as an inhibit
input.
Pulse triggering occurs at a particular voltage level and is not directly related to the transition time of the input
pulse. Schmitt-trigger input circuitry (TTL hysteresis) for B input allows jitter-free triggering from inputs with
transition rates as slow as 1 V/s, providing the circuit with excellent noise immunity, typically of 1.2 V. A high
immunity to VCC noise, typically of 1.5 V, is also provided by internal latching circuitry.
Once fired, the outputs are independent of further transitions of the A and B inputs and are a function of the timing
components, or the output pulses can be terminated by the overriding clear. Input pulses can be of any duration
relative to the output pulse. Output pulse length can be varied from 35 ns to the maximums shown in the above
table by choosing appropriate timing components. With Rext = 2 kΩ and Cext = 0, an output pulse typically of
30 ns is achieved, which can be used as a dc-triggered reset signal. Output rise and fall times are TTL
compatible and independent of pulse length. T ypical triggering and clearing sequences are shown as a part of
the switching characteristics waveforms.
Pulse-width stability is achieved through internal compensation and is virtually independent of VCC and
temperature. In most applications, pulse stability is limited only by the accuracy of external timing components.
Copyright 1998, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
3212019
910 11 12 13
4
5
6
7
8
18
17
16
15
14
1Cext
1Q
NC
2Q
2CLR
1CLR
1Q
NC
2Q
2Cext
1B
1A
NC
2A
2B V
1R
extGND
NC
1A
1B
1CLR
1Q
2Q
2Cext
2Rext/Cext
GND
VCC
1Rext/Cext
1Cext
1Q
2Q
2CLR
2B
2A
SN54221, SN54LS221 ...J OR W PACKAGE
SN74221 ...N PACKAGE
SN74LS221 . . . D, DB, OR N PACKAGE
(TOP VIEW)
SN54LS221 . . . FK PACKAGE
(TOP VIEW)
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
CC
ext/Cext
2R /Cext
NC – No internal connection
On products compliant to MIL-PRF-38535, all parameters are tested
unless otherwise noted. On all other products, production
processing does not necessarily include testing of all parameters.