Dual-Channel: HCPL2530M, HCPL2531M — 8-Pin DIP High Speed Transistor Optocouplers
©2008 Fairchild Semiconductor Corporation www.fairchildsemi.com
6N13XM, HCPLXXXXM Rev. 1.7
January 2016
Single-Channel: 6N135M, 6N136M, HCPL4503M
Single-Channel: 6N135M, 6N136M, HCPL4503M
Dual-Channel: HCPL2530M, HCPL2531M
8-Pin DIP High Speed Transistor Optocouplers
Features
• High Speed – 1 MBit/s
• Dual-Channel: HCPL2530M, HCPL2531M
• CTR Guaranteed 0°C to 70°C
• No Base Connection for Improved Noise Immunity
(HCPL4503M)
• Superior CMR of 15,000 V/μs Minimum (HCPL4503M)
• Safety and Regulatory Approvals
– UL1577, 5,000 VACRMS for 1 Minute
– DIN EN/IEC60747-5-5
Applications
• Line Receivers
• Pulse Transformer Replacement
• Output Interface to CMOS-LSTTL-TTL
• Wide-Bandwidth Analog Coupling
Description
The 6N135M, 6N136M, HCPL4503M, HCPL2530M, and
HCPL2531M optocouplers consist of an AlGaAs LED
optically coupled to a high speed photodetector transis-
tor for each channel.
A separate connection for the bias of the photodiode
improves the speed by several orders of magnitude over
conventional phototransistor optocouplers by reducing
the base-collector capacitance of the input transistor.
The HCPL4503M has no internal connection to the pho-
totransistor base for improved noise immunity. An inter-
nal noise shield provides superior common mode
rejection of up to 50,000 V/μs.
Related Resources
•www.fairchildsemi.com/products/optoelectronics/
•www.fairchildsemi.com/pf/HC/HCPL0500.html
•www.fairchildsemi.com/pf/FO/FODM452.html
•www.fairchildsemi.com/pf/FO/FOD050L.html
Schematics Package Outlines
1
2
3
4 5
6
7
8
+
_
V
F1
V
CC
V
01
V
02
GND
V
F2
_
+
HCPL2530M, HCPL2531M
1
2
3
4 5
6
7
8
+
_
V
F
V
CC
V
B
V
O
GNDN/C
N/C
6N135M, 6N136M, HCPL4503M
Pin 7 is not connected in the
HCPL4503M
8
8
1
8
1
1
8
1
Figure 1. Schematics
Figure 2. Package Outlines
©2008 Fairchild Semiconductor Corporation www.fairchildsemi.com
6N13XM, HCPLXXXXM Rev. 1.7 2
Dual-Channel: HCPL2530M, HCPL2531M — 8-Pin DIP High Speed Transistor Optocouplers
Single-Channel: 6N135M, 6N136M, HCPL4503M
Safety and Insulation Ratings
As per DIN EN/IEC 60747-5-5, this optocoupler is suitable for “safe electrical insulation” only within the safety limit
data. Compliance with the safety ratings shall be ensured by means of protective circuits.
Note:
1. Safety limit value - maximum values allowed in the event of a failure.
Parameter Characteristics
Installation Classifications per DIN VDE
0110/1.89 Table 1, For Rated Mains Voltage
< 150 VRMS I–IV
< 300 VRMS I–IV
< 450 VRMS I–III
< 600 VRMS I–III
Climatic Classification 40/100/21
Pollution Degree (DIN VDE 0110/1.89) 2
Comparative Tracking Index 175
Symbol Parameter Value Unit
VPR
Input-to-Output Test Voltage, Method A, VIORM x 1.6 = VPR,
Type and Sample Test with tm = 10 s, Partial Discharge < 5 pC 1,335 Vpeak
Input-to-Output Test Voltage, Method B, VIORM x 1.875 = VPR,
100% Production Test with tm = 1 s, Partial Discharge < 5 pC 1,669 Vpeak
VIORM Maximum Working Insulation Voltage 890 Vpeak
VIOTM Highest Allowable Over-Voltage 6,000 Vpeak
External Creepage ≥ 8.0 mm
External Clearance ≥ 7.4 mm
External Clearance (for Option TV, 0.4" Lead Spacing) ≥ 10.16 mm
DTI Distance Through Insulation (Insulation Thickness) ≥ 0.5 mm
TSCase Temperature(1) 150 °C
IS,INPUT Input Current(1) 200 mA
PS,OUTPUT Output Power (Duty Factor ≤ 2.7%)(1) 300 mW
RIO Insulation Resistance at TS, VIO = 500 V(1) > 109Ω
©2008 Fairchild Semiconductor Corporation www.fairchildsemi.com
6N13XM, HCPLXXXXM Rev. 1.7 3
Dual-Channel: HCPL2530M, HCPL2531M — 8-Pin DIP High Speed Transistor Optocouplers
Single-Channel: 6N135M, 6N136M, HCPL4503M
Absolute Maximum Ratings
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.
In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.
The absolute maximum ratings are stress ratings only. TA = 25°C unless otherwise specified.
Notes:
2. Derate linearly above 70°C free-air temperature at a rate of 0.8 mA/°C.
3. Derate linearly above 70°C free-air temperature at a rate of 1.6 mA/°C.
4. Derate linearly above 70°C free-air temperature at a rate of 0.9 mW/°C.
5. Derate linearly above 70°C free-air temperature at a rate of 2.0 mW/°C.
Recommended Operating Conditions
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended
operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not
recommend exceeding them or designing to absolute maximum ratings.
Note:
6. 6.3 mA is a guard banded value which allows for at least 20% CTR degradation. Initial input current threshold value
is 5.0 mA or less.
Symbol Parameter Test Conditions Value Unit
TSTG Storage Temperature -40 to +125 °C
TOPR Operating Temperature -40 to +100 °C
TJJunction Temperature -40 to +125 °C
TSOL Lead Solder Temperature 260 for 10 sec °C
EMITTER
IF (avg) DC/Average Forward Input Current
Each Channel(2) 25 mA
IF (pk) Peak Forward Input Current
Each Channel(3)
50% Duty Cycle,
1 ms P.W. 50 mA
IF (trans) Peak Transient Input Current Each Channel ≤ 1 μs P.W., 300 pps 1.0 A
VRReverse Input Voltage Each Channel 5 V
PDInput Power Dissipation Each Channel(4) 45 mW
DETECTOR
IO (avg) Average Output Current Each Channel 8 mA
IO (pk) Peak Output Current Each Channel 16 mA
VEBR Emitter-Base Reverse Voltage 6N135M and 6N136M 5 V
VCC Supply Voltage -0.5 to 30 V
VOOutput Voltage -0.5 to 20 V
IBBase Current 6N135M and 6N136M 5 mA
PDOutput Power Dissipation Each Channel(5) 100 mW
Symbol Parameter Min. Max. Unit
VCC Supply Voltage 4.5 20.0 V
TAAmbient Operating Temperature 0 70 °C
IFL Input Current, Low Level 0 250 μA
IFH Input Current, High Level(6) 6.3 20.0 mA
©2008 Fairchild Semiconductor Corporation www.fairchildsemi.com
6N13XM, HCPLXXXXM Rev. 1.7 4
Dual-Channel: HCPL2530M, HCPL2531M — 8-Pin DIP High Speed Transistor Optocouplers
Single-Channel: 6N135M, 6N136M, HCPL4503M
Electrical Characteristics
VCC = 5.0 V, TA = 0°C to 70°C unless otherwise specified.
Individual Component Characteristics
Symbol Parameter Device Test Conditions Min. Typ. Max. Unit
EMITTER
VFInput Forward Voltage All IF = 16 mA, TA = 25°C 1.45 1.70 V
All IF = 16 mA 1.80
BVR
Input Reverse
Breakdown Voltage All IR = 10 µA 5 21 V
ΔVF/ΔTA
Temperature Coefficient
of Forward Voltage All IF = 16 mA -1.7 mV/°C
DETECTOR
IOH
Logic High Output
Current
All IF = 0 mA, VO = VCC = 5.5 V,
TA = 25°C 0.0007 0.5
µA
6N135M,
6N136M,
HCPL4503M
IF = 0 mA, VO = VCC = 15 V,
TA = 25°C 0.0019 1
All IF = 0 mA, VO = VCC = 15 V 50
ICCL
Logic Low Supply
Current
6N135M,
6N136M,
HCPL4503M
IF = 16 mA, VO = Open,
VCC = 15 V 163 200
µA
HCPL2530M,
HCPL2531M
IF1 = IF2 = 16 mA,
VO = Open, VCC = 15 V 400
ICCH
Logic High Supply
Current
6N135M,
6N136M,
HCPL4503M
IF = 0 mA, VO = Open,
VCC = 15 V 0.0004 2
µA
HCPL2530M,
HCPL2531M
IF = 0 mA, VO = Open,
VCC = 15 V 4
©2008 Fairchild Semiconductor Corporation www.fairchildsemi.com
6N13XM, HCPLXXXXM Rev. 1.7 5
Dual-Channel: HCPL2530M, HCPL2531M — 8-Pin DIP High Speed Transistor Optocouplers
Single-Channel: 6N135M, 6N136M, HCPL4503M
Electrical Characteristics (continued)
TA = 0°C to 70°C unless otherwise specified.
Transfer Characteristics
Note:
7. Current Transfer Ratio is defined as a ratio of output collector current, IO, to the forward LED input current, IF
, times
100%.
Symbol Parameter Device Test Conditions Min. Typ. Max. Un it
COUPLED
CTR Current Transfer
Ratio(7)
6N135M,
HCPL2530M IF = 16 mA, VO = 0.4 V,
VCC = 4.5 V, TA = 25°C
73850%
6N136M,
HCPL4503M,
HCPL2531M
19 38 50 %
6N135M
IF = 16 mA,
VCC = 4.5 V
VOL = 0.4 V 5%
HCPL2530M VOL = 0.5 V
6N136M,
HCPL4503M VOL = 0.4 V 15 %
HCPL2531M VOL = 0.5 V
VOL
Logic LOW Output
Voltage
6N135M IF = 16 mA, IO = 1.1 mA,
VCC = 4.5 V, TA = 25°C 0.12 0.4
V
HCPL2530M 0.5
6N136M,
HCPL4503M IF = 16 mA, IO = 3 mA,
VCC = 4.5 V, TA = 25°C 0.20 0.4
HCPL2531M 0.5
6N135M,
HCPL2530M
IF = 16 mA, IO = 0.8 mA,
VCC = 4.5 V 0.11 0.5
HCPL4503M,
HCPL2531M
IF = 16 mA, IO = 2.4 mA,
VCC = 4.5 V 0.18 0.5
©2008 Fairchild Semiconductor Corporation www.fairchildsemi.com
6N13XM, HCPLXXXXM Rev. 1.7 6
Dual-Channel: HCPL2530M, HCPL2531M — 8-Pin DIP High Speed Transistor Optocouplers
Single-Channel: 6N135M, 6N136M, HCPL4503M
Electrical Characteristics (continued)
TA = 0°C to 70°C unless otherwise specified.
Switching Characteristics
Notes:
8. The 4.1 kΩ load represents 1 LSTTL unit load of 0.36 mA and 6.1 kΩ pull-up resistor.
9. The 1.9 kΩ load represents 1 TTL unit load of 1.6 mA and 5.6 kΩ pull-up resistor.
10. Common mode transient immunity in logic high level is the maximum tolerable (positive) dVcm/dt on the leading edge
of the common mode pulse signal, VCM, to assure that the output will remain in a logic high state (i.e., VO > 2.0 V).
Common mode transient immunity in logic low level is the maximum tolerable (negative) dVcm/dt on the trailing edge
of the common mode pulse signal, VCM, to assure that the output will remain in a logic low state (i.e., VO < 0.8 V).
Symbol Parameter Device Test Conditions Min. Typ. Max. Unit
tPHL
Propagation Delay
Time to Logic LOW
6N135M TA = 25°C, RL = 4.1 kΩ,
IF = 16 mA(8) (Figure 15)
0.23 1.5 µs
HCPL2530M 0.25
6N136M,
HCPL4503M TA = 25°C, RL = 1.9 kΩ,
IF = 16 mA(9) (Figure 15)
0.25 0.8 µs
HCPL2531M 0.28
6N135M,
HCPL2530M
RL = 4.1 kΩ, IF = 16 mA(8)
(Figure 15) 2.0 µs
6N136M,
HCPL4503M,
HCPL2531M
RL = 1.9 kΩ, IF = 16 mA(9)
(Figure 15) 1.0 µs
tPLH
Propagation Delay
Time to Logic HIGH
6N135M TA = 25°C, RL = 4.1 kΩ,
IF = 16 mA(8) (Figure 15)
0.45 1.5 µs
HCPL2530M 0.29
6N136M,
HCPL4503M TA = 25°C, RL = 1.9 kΩ,
IF = 16 mA(9) (Figure 15)
0.26 0.8 µs
HCPL2531M 0.18
6N135M,
HCPL2530M
RL = 4.1 kΩ, IF = 16 mA(8)
(Figure 15) 2.0 µs
6N136M,
HCPL4503M,
HCPL2531M
RL = 1.9 kΩ, IF = 16 mA(9)
(Figure 15) 1.0 µs
|CMH|
Common Mode
Transient Immunity at
Logic High
6N135M,
HCPL2530M
IF = 0 mA, VCM = 10 VP-P
,
RL = 4.1 kΩ, TA = 25°C(10)
(Figure 16)
10,000
V/µs
6N136M,
HCPL2531M
IF = 0 mA, VCM = 10 VP-P
,
RL = 1.9 kΩ, TA = 25°C(10)
(Figure 16)
10,000
HCPL4503M
IF = 0 mA, VCM = 1,500 VP-P
,
RL = 4.1 kΩ, TA = 25°C(10)
(Figure 16)
15,000 50,000
|CML|
Common Mode
Transient Immunity at
Logic Low
6N135M,
HCPL2530M
IF = 16 mA, VCM = 10 VP-P
,
RL = 4.1 kΩ, TA = 25°C(10)
(Figure 16)
10,000
V/µs
6N136M,
HCPL2531M
IF = 16 mA, VCM = 10 VP-P
,
RL = 1.9 kΩ(10)
(Figure 16)
10,000
HCPL4503M
IF = 0 mA, VCM = 1,500 VP-P
,
RL = 4.1 kΩ, TA = 25°C(10)
(Figure 16)
15,000 50,000
©2008 Fairchild Semiconductor Corporation www.fairchildsemi.com
6N13XM, HCPLXXXXM Rev. 1.7 7
Dual-Channel: HCPL2530M, HCPL2531M — 8-Pin DIP High Speed Transistor Optocouplers
Single-Channel: 6N135M, 6N136M, HCPL4503M
Isolation Characteristics (TA = 25°C unless otherwise specified.)
Notes:
11. Device is considered a two terminal device: pins 1, 2, 3 and 4 are shorted together and pins 5, 6, 7 and 8 are shorted
together.
12. Measured between pins 1 and 2 shorted together, and pins 3 and 4 shorted together.
13. 5000 VRMS for 1 minute duration is equivalent to 6000 VRMS for 1 second duration.
Symbol Parameter Device Test Conditions Min. Typ. Max. Unit
VISO
Withstand Isolation
Test Voltage All
RH ≤ 50%, II-O ≤ 10 µA
t = 1 minute,
f = 50 Hz(11)(13)
5,000 VACRMS
RI-O
Resistance
(Input to Output) All VI-O = 500 VDC(11) 1011 Ω
CI-O
Capacitance
(Input to Output) All f = 1 MHz, VI-O = 0 VDC(11) 1pF
II-I
Input-Input Insulation
Leakage Current
HCPL2530M,
HCPL2531M
RH ≤ 45%,
VI-I = 500 VDC, t = 5 s(12) < 1 nA
RI-I Input-Input Resistance HCPL2530M,
HCPL2531M VI-I = 500 VDC(12) 1012 Ω
CI-I Input-Input Capacitance HCPL2530M,
HCPL2531M f = 1 MHz(12) 0.2 pF
©2008 Fairchild Semiconductor Corporation www.fairchildsemi.com
6N13XM, HCPLXXXXM Rev. 1.7 8
Dual-Channel: HCPL2530M, HCPL2531M — 8-Pin DIP High Speed Transistor Optocouplers
Single-Channel: 6N135M, 6N136M, HCPL4503M
Typical Performance Curves
For single-channel devices; 6N135M, 6N136M, and HCPL4503M.
-40 -20 0 20 40 60 80 100 120
Figure 3. Normalized CTR vs. Forward Current
IF - FORWARD CURRENT (mA)
0.1 1 10 100
CTR (NORMALIZED) CTR(I
F
) / CTR (I
F
= 16 mA)
CTR (NORMALIZED) CTR(T
A
) / CTR (T
A
= 16 mA)
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0.0
Figure 4. Normalized CTR vs. Temperature
TA - TEMPERATURE (°C)
-40 -20 0 20 40 60 80 100 120
-40 -20 0 20 40 60 80 100 120
0.0
0.2
0.4
0.6
0.8
1.0
1.2
Figure 5. Output Current vs. Output Voltage
VO – OUTPUT VOLTAGE (V)
0 2 4 6 8 101214161820
I
O
– OUTPUT CURRENT (mA)
Normalized to:
IF = 16 mA
VO = 0.4 V
VCC = 5 V
TA = 25°C
Normalized to:
TA = 25°C
IF = 16mA
VCC = 4.5V
VO = 0.4V
Figure 6. Logic High Output Current vs. Temperature
TA – TEMPERATURE (°C)
I
OH
– LOGIC HIGH OUTPUT CURRENT (nA)
0.1
100025
20
15
10
5
0
100
10
1
Figure 7. Propagation Delay vs. Temperature
TA – TEMPERATURE (°C)
tP – PROPAGATION DELAY (ns)
0
100
200
300
400
500
600
700
800
RL = 1.9 kΩ (tPHL)
R = 4.1 kΩ (tPHL)
L
RL = 1.9 kΩ (tPLH)
RL
= 4.1 kΩ (tPLH)
Figure 8. Propagation Delay vs. Load Resistance
RL – LOAD RESISTANCE (kΩ)
1 10
T
P
- PROPAGATION DELAY (ns)
100
1000
IF = 16 mA (tPLH)
IF = 16 mA (tPHL)
TA = 25°C
VCC = 5 V IF = 0 mA
VCC = 5.5 V
VO = 5.5 V
Frequency = 10 kHz
Duty Cycle = 10%
VCC = 5 V
IF
35 mA
30 mA
25 mA
20 mA
15 mA
10 mA
5 mA
= 40 mA
Frequency = 10 kHz
Duty Cycle = 10%
VCC = 5 V
IF = 10 mA (tPLH)
IF = 10 mA (tPHL)
©2008 Fairchild Semiconductor Corporation www.fairchildsemi.com
6N13XM, HCPLXXXXM Rev. 1.7 9
Dual-Channel: HCPL2530M, HCPL2531M — 8-Pin DIP High Speed Transistor Optocouplers
Single-Channel: 6N135M, 6N136M, HCPL4503M
Typical Performance Curves (Continued)
For dual-channel devices; HCPL2530M and HCPL2531M.
-40 -20 0 20 40 60 80 100 120
Figure 9. Normalized CTR vs. Forward Current
IF - FORWARD CURRENT (mA)
0.1 1 10 100
CTR (NORMALIZED) CTR(I
F
) / CTR (I
F
= 16 mA)
CTR (NORMALIZED) CTR(T
A
) / CTR (T
A
= 25°C)
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0.0
Figure 10. Normalized CTR vs. Temperature
TA - TEMPERATURE (°C)
-40 -20 0 20 40 60 80 100 120
-40 -20 0 20 40 60 80 100 120
0.0
0.2
0.4
0.6
0.8
1.0
1.2
Figure 11. Output Current vs. Output Voltage
VO – OUTPUT VOLTAGE (V)
0 2 4 6 8 101214161820
I
O
– OUTPUT CURRENT (mA)
Normalized to:
IF = 16 mA
VO = 0.4 V
VCC = 5 V
TA = 25°C
Normalized to:
TA = 25°C
IF = 16 mA
VCC = 4.5 V
VO = 0.4 V
Figure 12. Logic High Output Current vs. Temperature
TA – TEMPERATURE (°C)
I
OH
– LOGIC HIGH OUTPUT CURRENT (nA)
0.1
100020
15
10
5
0
100
10
1
Figure 13. Propagation Delay vs. Temperature
TA – TEMPERATURE (°C)
tP – PROPAGATION DELAY (ns)
600
500
400
300
200
100
0
RL = 4.1 kΩ (tPHL)
R = 1.9 kΩ (tPLH)
L
RL = 1.9 kΩ (tPHL)
RL
= 4.1 kΩ (tPLH)
Figure 14. Propagation Delay vs. Load Resistance
RL – LOAD RESISTANCE (kΩ)
1 10
T
P
- PROPAGATION DELAY (ns)
100
1000
IF = 16 mA (tPLH)
IF = 16 mA (tPHL)
TA = 25°C
VCC = 5 V IF = 0 mA
VCC = 5.5 V
VO = 5.5 V
Frequency = 10 kHz
Duty Cycle = 10%
VCC = 5 V
IF
35 mA
30 mA
25 mA
20 mA
15 mA
10 mA
5 mA
= 40 mA
Frequency = 10 kHz
Duty Cycle = 10%
VCC = 5 V
TA = 25°C
IF = 10 mA (tPLH)
IF = 10 mA (tPHL)
©2008 Fairchild Semiconductor Corporation www.fairchildsemi.com
6N13XM, HCPLXXXXM Rev. 1.7 10
Dual-Channel: HCPL2530M, HCPL2531M — 8-Pin DIP High Speed Transistor Optocouplers
Single-Channel: 6N135M, 6N136M, HCPL4503M
Test Circuits
Pulse Gen
CM
V
V
FF
B
A
+-
+5 V
O
V
–
I
F
3
4
+
F
V
-
2
1
Shield
Noise
6
O
5
GND
7
8
V
B
V
CC
V
L
R
PLH
OL
V
V
O
0
5 V
1.5 V
F
I
1.5 V
T
PHL
T
Switch at A : I = 0 mA
F
Switch at A : I = 16 mA
F
t
r
V
O
O
V
OL
V
5 V
0 V 10 % 10%
90%
CM
V 10 V
4 5
Noise
1
2
3
Shield
8
7
6
+5 V
O
V
V
CC
V
01
V
02
GND
V
F1
-
+
F2
V
-
F
I+
10% DUTY CYCLE
I/f < 100 μS
F
I
MONITOR
L
R
C = 15 pF
L
Pulse
Generator
tr = 5 ns
Z = 50
O
Ω
GND
+
4 5
1
3
2
-
F2
V
V
F1
-
Shield
Noise
+5 V
CC
8
V
L
V
6
02
V
7
R
01
V
O
V
CM
A
B
Pulse Gen
F
I
+-
+
3
I Monitor
F
4
I/f < 100 μs
10% D.C.
tr = 5ns
Generator
Pulse
Z = 50
O
+
V
F
I
Ω
F
-
2
1
Shield
Noise
V
O
O
6
5
GND
7
8
V
B
V
L
R
CC
V+5 V
0.1 μF
L
C = 15 pF
Test Circuit for 6N135M, 6N136M, and HCPL4503M
Test Circuit for HCPL2530M and HCPL2531M
0.1 μF
f
t
0.1 μF
0.1 μF
FF
V
m
R
m
R
90%
Figure 15. Switching Time Test Circuit
Figure 16. Common Mode Immunity Test Circuit
Test Circuit for 6N135M, 6N136M, and HCPL4503M Test Circuit for HCPL2530M and HCPL2531M
©2008 Fairchild Semiconductor Corporation www.fairchildsemi.com
6N13XM, HCPLXXXXM Rev. 1.7 11
Dual-Channel: HCPL2530M, HCPL2531M — 8-Pin DIP High Speed Transistor Optocouplers
Single-Channel: 6N135M, 6N136M, HCPL4503M
Reflow Profile
Figure 17. Relow Profile
Profile Freature Pb-Free Assembly Profile
Temperature Min. (Tsmin) 150°C
Temperature Max. (Tsmax) 200°C
Time (tS) from (Tsmin to Tsmax) 60 to 120 s
Ramp-up Rate (tL to tP) 3°C/second maximum
Liquidous Temperature (TL) 217°C
Time (tL) Maintained Above (TL) 60 to 150 s
Peak Body Package Temperature 260°C +0°C / –5°C
Time (tP) within 5°C of 260°C 30 s
Ramp-down Rate (TP to TL) 6°C/s maximum
Time 25°C to Peak Temperature 8 minutes maximum
Time (seconds)
Temperature (°C)
Time 25°C to Peak
260
240
220
200
180
160
140
120
100
80
60
40
20
0
TL
ts
tL
tP
TP
Tsma x
Tsmi n
120
Preheat Area
Maximum Ramp-up Rate = 3°C/S
Maximum Ramp-down Rate = 6°C/S
240 360
©2008 Fairchild Semiconductor Corporation www.fairchildsemi.com
6N13XM, HCPLXXXXM Rev. 1.7 12
Dual-Channel: HCPL2530M, HCPL2531M — 8-Pin DIP High Speed Transistor Optocouplers
Single-Channel: 6N135M, 6N136M, HCPL4503M
Ordering Information
Note:
The product orderable part number system listed in this table also applies to the 6N136M, HCPL4503M, HCPL2530M,
and HCPL2531M product families.
Marking Information
Part Number Package Packing Method
6N135M DIP 8-Pin Tube (50 units per tube)
6N135SM SMT 8-Pin (Lead Bend) Tube (50 units per tube)
6N135SDM SMT 8-Pin (Lead Bend) Tape and Reel (1,000 units per reel)
6N135VM DIP 8-Pin, DIN EN/IEC 60747-5-5 Option Tube (50 units per tube)
6N135SVM SMT 8-Pin (Lead Bend), DIN EN/IEC 60747-5-5 Option Tube (50 units per tube)
6N135SDVM SMT 8-Pin (Lead Bend), DIN EN/IEC 60747-5-5 Option Tape and Reel (1,000 units per reel)
6N135TVM DIP 8-Pin, 0.4” Lead Spacing, DIN EN/IEC 60747-5-5 Option Tube (50 units per tube)
6N135TSVM SMT 8-Pin, 0.4” Lead Spacing, DIN EN/IEC 60747-5-5 Option Tube (50 units per tube)
6N135TSR2VM SMT 8-Pin, 0.4” Lead Spacing, DIN EN/IEC 60747-5-5 Option Tape and Reel (1,000 units per reel)
1
2
6
43 5
Definitions
1 Fairchild Logo
2 Device Number
3DIN EN/IEC60747-5-5 Option (only appears on component
ordered with this option)
4 Two Digit Year Code, e.g., ‘15’
5 Two Digit Work Week Ranging from ‘01’ to ‘53’
6 Assembly Package Code
6N135
BYY
XXV
Figure 14. Top Mark
©2008 Fairchild Semiconductor Corporation www.fairchildsemi.com
6N13XM, HCPLXXXXM Rev. 1.7 13
Dual-Channel: HCPL2530M, HCPL2531M — 8-Pin DIP High Speed Transistor Optocouplers
Single-Channel: 6N135M, 6N136M, HCPL4503M
Carrier Tape Specifications (Option SD)
Symbol Description Dimension in mm
W Tape Width 16.0 ± 0.3
t Tape Thickness 0.30 ± 0.05
P0Sprocket Hole Pitch 4.0 ± 0.1
D0Sprocket Hole Diameter 1.55 ± 0.05
E Sprocket Hole Location 1.75 ± 0.10
F Pocket Location 7.5 ± 0.1
P22.0 ± 0.1
P Pocket Pitch 12.0 ± 0.1
A0Pocket Dimensions 10.30 ±0.20
B010.30 ±0.20
K04.90 ±0.20
W1Cover Tape Width 13.2 ± 0.2
d Cover Tape Thickness 0.1 Maximum
Maximum Component Rotation or Tilt 10°
R Minimum Bending Radius 30
d
0
P
t2
D0
1
1
W
User Direction of Feed
0
K
B0
A0W
E
D
F
P
P
©2008 Fairchild Semiconductor Corporation www.fairchildsemi.com
6N13XM, HCPLXXXXM Rev. 1.7 14
Dual-Channel: HCPL2530M, HCPL2531M — 8-Pin DIP High Speed Transistor Optocouplers
Single-Channel: 6N135M, 6N136M, HCPL4503M
Carrier Tape Specifications (Option TSR2)
Symbol Description Dimension in mm
W Tape Width 24.0 ± 0.3
t Tape Thickness 0.40 ± 0.1
P0Sprocket Hole Pitch 4.0 ± 0.1
D0Sprocket Hole Diameter 1.55 ± 0.05
E Sprocket Hole Location 1.75 ± 0.10
F Pocket Location 11.5 ± 0.1
P22.0 ± 0.1
P Pocket Pitch 16.0 ± 0.1
A0Pocket Dimensions 12.80 ± 0.1
B010.35 ± 0.1
K05.7 ±0.1
W1Cover Tape Width 21.0 ± 0.1
d Cover Tape Thickness 0.1 Maximum
Maximum Component Rotation or Tilt 10°
R Minimum Bending Radius 30
d
0
P
t2
D0
1
1
W
User Direction of Feed
0
K
B0
A0W
E
D
F
P
P
© Fairchild Semiconductor Corporation www.fairchildsemi.com
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Advance Information Formative / In Design Datasheet contains the design specifications for product development. Specifications may change
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Preliminary First Production
Datasheet contains preliminary data; supplementary data will be published at a later date. Fairchild
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Rev. I77
®
