Document Number: 91237 www.vishay.com
S-81360-Rev. A, 28-Jul-08 1
Power MOSFET
IRFP460, SiHFP460
Vishay Siliconix
FEATURES
• Dynamic dV/dt Rating
• Repetitive Avalanche Rated
• Isolated Central Mounting Hole
• Fast Switching
• Ease of Paralleling
• Simple Drive Requirements
• Lead (Pb)-free Available
DESCRIPTION
Third generation Power MOSFETs from Vishay provide the
designer with the best combination of fast switching,
ruggedized device design, low on-resistance and
cost-effectiveness.
The TO-247 package is preferred for commercial-industrial
applications where higher power levels preclude the use of
TO-220 devices. The TO-247 is similar but superior to the
earlier TO-218 package because its isolated mounting hole.
It also provides greater creepage distances between pins to
meet the requirements of most safety specifications.
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).
b. VDD = 50 V, starting TJ = 25 °C, L = 4.3 mH, RG = 25 Ω, IAS = 20 A (see fig. 12).
c. ISD ≤ 20 A, dI/dt ≤ 160 A/µs, VDD ≤ VDS, TJ ≤ 150 °C.
d. 1.6 mm from case.
PRODUCT SUMMARY
VDS (V) 500
RDS(on) (Ω)V
GS = 10 V 0.27
Qg (Max.) (nC) 210
Qgs (nC) 29
Qgd (nC) 110
Configuration Single
N-Channel MOSFET
G
D
S
TO-247
GD
S
Available
RoHS*
COMPLIANT
ORDERING INFORMATION
Package TO-247
Lead (Pb)-free IRFP460PbF
SiHFP460-E3
SnPb IRFP460
SiHFP460
ABSOLUTE MAXIMUM RATINGS TC = 25 °C, unless otherwise noted
PARAMETER SYMBOL LIMIT UNIT
Drain-Source Voltage VDS 500 V
Gate-Source Voltage VGS ± 20
Continuous Drain Current VGS at 10 V TC = 25 °C ID
20
ATC = 100 °C 13
Pulsed Drain CurrentaIDM 80
Linear Derating Factor 2.2 W/°C
Single Pulse Avalanche EnergybEAS 960 mJ
Repetitive Avalanche CurrentaIAR 20 A
Repetitive Avalanche EnergyaEAR 28 mJ
Maximum Power Dissipation TC = 25 °C PD280 W
Peak Diode Recovery dV/dtcdV/dt 3.5 V/ns
Operating Junction and Storage Temperature Range TJ, Tstg - 55 to + 150 °C
Soldering Recommendations (Peak Temperature) for 10 s 300d
Mounting Torque 6-32 or M3 screw 10 lbf · in
1.1 N · m
* Pb containing terminations are not RoHS compliant, exemptions may apply
www.vishay.com Document Number: 91237
2S-81360-Rev. A, 28-Jul-08
IRFP460, SiHFP460
Vishay Siliconix
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).
b. Pulse width ≤ 300 µs; duty cycle ≤ 2 %.
THERMAL RESISTANCE RATINGS
PARAMETER SYMBOL TYP. MAX. UNIT
Maximum Junction-to-Ambient RthJA -40
°C/WCase-to-Sink, Flat, Greased Surface RthCS 0.24 -
Maximum Junction-to-Case (Drain) RthJC -0.45
SPECIFICATIONS TJ = 25 °C, unless otherwise noted
PARAMETER SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT
Static
Drain-Source Breakdown Voltage VDS VGS = 0 V, ID = 250 µA 500 - - V
VDS Temperature Coefficient ΔVDS/TJ Reference to 25 °C, ID = 1 mA - 0.63 - V/°C
Gate-Source Threshold Voltage VGS(th) VDS = VGS, ID = 250 µA 2.0 - 4.0 V
Gate-Source Leakage IGSS V
GS = ± 20 V - - ± 100 nA
Zero Gate Voltage Drain Current IDSS
VDS = 500 V, VGS = 0 V - - 25 µA
VDS = 400 V, VGS = 0 V, TJ = 125 °C - - 250
Drain-Source On-State Resistance RDS(on) V
GS = 10 V ID = 12 Ab--0.27Ω
Forward Transconductance gfs VDS = 50 V, ID = 12 Ab13 - - S
Dynamic
Input Capacitance Ciss VGS = 0 V,
VDS = 25 V,
f = 1.0 MHz, see fig. 5
- 4200 -
pFOutput Capacitance Coss - 870 -
Reverse Transfer Capacitance Crss - 350 -
Total Gate Charge Qg
VGS = 10 V ID = 20 A, VDS = 400 V
see fig. 6 and 13b
- - 210
nC Gate-Source Charge Qgs --29
Gate-Drain Charge Qgd - - 110
Turn-On Delay Time td(on)
VDD = 250 V, ID = 20 A ,
RG = 4.3 Ω, RD = 13 Ω, see fig. 10b
-18-
ns
Rise Time tr -59-
Turn-Off Delay Time td(off) - 110 -
Fall Time tf -58-
Internal Drain Inductance LD Between lead,
6 mm (0.25") from
package and center of
die contact
-5.0-
nH
Internal Source Inductance LS-13-
Drain-Source Body Diode Characteristics
Continuous Source-Drain Diode Current IS
MOSFET symbol
showing the
integral reverse
p - n junction diode
--20
A
Pulsed Diode Forward CurrentaISM --80
Body Diode Voltage VSD TJ = 25 °C, IS = 20 A, VGS = 0 Vb--1.8V
Body Diode Reverse Recovery Time trr TJ = 25 °C, IF = 20A, dI/dt = 100 A/µsb- 570 860 ns
Body Diode Reverse Recovery Charge Qrr -5.78.6µC
Forward Turn-On Time ton Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD)
D
S
G
S
D
G
Document Number: 91237 www.vishay.com
S-81360-Rev. A, 28-Jul-08 3
IRFP460, SiHFP460
Vishay Siliconix
TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted
Fig. 1 - Typical Output Characteristics, TC = 25 °C
Fig. 2 - Typical Output Characteristics, TC = 150 °C
Fig. 3 - Typical Transfer Characteristics
Fig. 4 - Normalized On-Resistance vs. Temperature
VDS, Drain-to-Source Voltage (V)
ID, Drain Current (A)
20 µs Pulse Width
TC = 25 °C
4.5 V
101
100
100101
Bottom
To p
VGS
15 V
10 V
8.0 V
7.0 V
6.0 V
5.5 V
5.0 V
4.5 V
91237_01
4.5 V
Bottom
To p
VGS
15 V
10 V
8.0 V
7.0 V
6.0 V
5.5 V
5.0 V
4.5 V
20 µs Pulse Width
TC = 150 °C
101
100
100101
I
D
, Drain Current (A)
91237_02
V
DS,
Drain-to-Source Voltage (V)
91237_03
25 °C
150 °C
20 µs Pulse Width
VDS = 50 V
101
100
I
D
, Drain Current (A)
V
GS,
Gate-to-Source Voltage (V)
5678910
4
91237_04
I
D
= 20 A
V
GS
= 10 V
3.5
0.0
0.5
1.0
1.5
2.0
2.5
- 60 - 40 - 20 0 20 40 60 80 100 120 140 160
T
J,
Junction Temperature (°C)
R
DS(on)
, Drain-to-Source On Resistance
(Normalized)
3.0
www.vishay.com Document Number: 91237
4S-81360-Rev. A, 28-Jul-08
IRFP460, SiHFP460
Vishay Siliconix
Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage
Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage
Fig. 7 - Typical Source-Drain Diode Forward Voltage
Fig. 8 - Maximum Safe Operating Area
91237_05
10 000
8000
6000
4000
0
2000
100101
Capacitance (pF)
VDS, Drain-to-Source Voltage (V)
Ciss
Crss
Coss
VGS = 0 V, f = 1 MHz
Ciss = Cgs + Cgd, Cds Shorted
Crss = Cgd
Coss = Cds + Cgd
91237_06
I
D
= 20 A
V
DS
= 250 V
For test circuit
see figure 13
V
DS
= 100 V
V
DS
= 400 V
QG, Total Gate Charge (nC)
VGS, Gate-to-Source Voltage (V)
20
16
12
8
0
4
040 200
160120
80
91237_07
102
VSD, Source-to-Drain Voltage (V)
ISD, Reverse Drain Current (A)
0.6 1.21.00.81.6
1.4
25 °C
150 °C
V
GS
= 0 V
101
1.82.0
91237_08
10 µs
100 µs
1 ms
10 ms
Operation in this area limited
by RDS(on)
TC = 25 °C
TJ = 150 °C
Single Pulse
ID, Drain Current (A)
103
2
5
2
5
2
5
VDS, Drain-to-Source Voltage (V)
110 102103
25 25 25
1
10
102
Document Number: 91237 www.vishay.com
S-81360-Rev. A, 28-Jul-08 5
IRFP460, SiHFP460
Vishay Siliconix
Fig. 9 - Maximum Drain Current vs. Case Temperature
Fig. 10a - Switching Time Test Circuit
Fig. 10b - Switching Time Waveforms
Fig. 11a - Maximum Effective Transient Thermal Impedance, Junction-to-Case
Fig. 12a - Unclamped Inductive Test Circuit Fig. 12b - Unclamped Inductive Waveforms
I
D
, Drain Current (A)
T
C
, Case Temperature (°C)
0
8
12
16
20
25 1501251007550
4
91237_09
Pulse width ≤ 1 µs
Duty factor ≤ 0.1 %
R
D
V
GS
R
G
D.U.T.
10 V
+
-
V
DS
V
DD
VDS
90 %
10 %
VGS
td(on) trtd(off) tf
91237_11
0 - 0.5
0.2
0.1
0.05
0.01
Single Pulse
(Thermal Response)
PDM
t1
t2
Notes:
1. Duty Factor, D = t1/t2
2. Peak Tj = PDM x ZthJC + TC
0.02
Thermal Response (Z
thJC
)
1
0.1
10-3
t
1
, Rectangular Pulse Duration (S)
10-5 10-4 10-3 10-2 0.1 1 10
10-2
R
G
I
AS
0.01 Ω
t
p
D.U.T
L
VDS
+
-V
DD
A
10 V
Vary t
p
to obtain
required I
AS
IAS
VDS
VDD
VDS
tp
www.vishay.com Document Number: 91237
6S-81360-Rev. A, 28-Jul-08
IRFP460, SiHFP460
Vishay Siliconix
Fig. 12c - Maximum Avalanche Energy vs. Drain Current
Fig. 13a - Basic Gate Charge Waveform
Fig. 13b - Gate Charge Test Circuit
91237_12c
Bottom
To p
ID
8.9 A
13 A
20 A
VDD = 50 V
2400
0
400
800
1200
1600
2000
25 150
125
10075
50
Starting T
J
, Junction Temperature (°C)
E
AS
, Single Pulse Energy (mJ)
QGS QGD
QG
V
G
Charge
10 V
D.U.T.
3 mA
VGS
VDS
IGID
0.3 µF
0.2 µF
50 kΩ
12 V
Current regulator
Current sampling resistors
Same type as D.U.T.
+
-
Document Number: 91237 www.vishay.com
S-81360-Rev. A, 28-Jul-08 7
IRFP460, SiHFP460
Vishay Siliconix
Fig. 14 - For N-Channel
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see htt p://www.vishay.com/ppg?91237.
P.W.Period
dI/dt
Diode recovery
dV/dt
Ripple ≤5 %
Body diode forward drop
Re-applied
voltage
Reverse
recovery
current
Body diode forward
current
V
GS
= 10 V*
V
DD
I
SD
Driver gate drive
D.U.T. I
SD
waveform
D.U.T. V
DS
waveform
Inductor current
D = P.W.
Period
+
-
+
+
+
-
-
-
* VGS = 5 V for logic level devices
Peak Diode Recovery dV/dt Test Circuit
VDD
• dV/dt controlled by RG
• Driver same type as D.U.T.
• ISD controlled by duty factor "D"
• D.U.T. - device under test
D.U.T. Circuit layout considerations
• Low stray inductance
• Ground plane
• Low leakage inductance
current transformer
RG
Package Information
www.vishay.com Vishay Siliconix
Revision: 19-Oct-2020 1Document Number: 91360
For technical questions, contact: hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
TO-247AC (High Voltage)
VERSION 1: FACILITY CODE = 9
Notes
(1) Package reference: JEDEC® TO247, variation AC
(2) All dimensions are in mm
(3) Slot required, notch may be rounded
(4) Dimension D and E do not include mold flash. Mold flash shall not exceed 0.127 mm per side. These dimensions are measured at the
outermost extremes of the plastic body
(5) Thermal pad contour optional with dimensions D1 and E1
(6) Lead finish uncontrolled in L1
(7) Ø P to have a maximum draft angle of 1.5° to the top of the part with a maximum hole diameter of 3.91 mm
(8) Dimension b2 and b4 does not include dambar protrusion. Allowable dambar protrusion shall be 0.1 mm total in excess of b2 and b4
dimension at maximum material condition
MILLIMETERS MILLIMETERS
DIM. MIN. MAX. NOTES DIM. MIN. MAX. NOTES
A 4.83 5.21 D1 16.25 16.85 5
A1 2.29 2.55 D2 0.56 0.76
A2 1.50 2.49 E 15.50 15.87 4
b 1.12 1.33 E1 13.46 14.16 5
b1 1.12 1.28 E2 4.52 5.49 3
b2 1.91 2.39 6 e 5.44 BSC
b3 1.91 2.34 L 14.90 15.40
b4 2.87 3.22 6, 8 L1 3.96 4.16 6
b5 2.87 3.18 Ø P 3.56 3.65 7
c 0.55 0.69 6 Ø P1 7.19 ref.
c1 0.55 0.65 Q 5.31 5.69
D 20.40 20.70 4 S 5.54 5.74
Package Information
www.vishay.com Vishay Siliconix
Revision: 19-Oct-2020 2Document Number: 91360
For technical questions, contact: hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
VERSION 2: FACILITY CODE = Y
Notes
(1) Dimensioning and tolerancing per ASME Y14.5M-1994
(2) Contour of slot optional
(3) Dimension D and E do not include mold flash. Mold flash shall not exceed 0.127 mm (0.005") per side. These dimensions are measured at
the outermost extremes of the plastic body
(4) Thermal pad contour optional with dimensions D1 and E1
(5) Lead finish uncontrolled in L1
(6) Ø P to have a maximum draft angle of 1.5 to the top of the part with a maximum hole diameter of 3.91 mm (0.154")
(7) Outline conforms to JEDEC outline TO-247 with exception of dimension c
MILLIMETERS MILLIMETERS
DIM. MIN. MAX. NOTES DIM. MIN. MAX. NOTES
A 4.58 5.31 D2 0.51 1.30
A1 2.21 2.59 E 15.29 15.87
A2 1.17 2.49 E1 13.72 -
b 0.99 1.40 e 5.46 BSC
b1 0.99 1.35 Ø k 0.254
b2 1.53 2.39 L 14.20 16.25
b3 1.65 2.37 L1 3.71 4.29
b4 2.42 3.43 Ø P 3.51 3.66
b5 2.59 3.38 Ø P1 - 7.39
c 0.38 0.86 Q 5.31 5.69
c1 0.38 0.76 R 4.52 5.49
D 19.71 20.82 S 5.51 BSC
D1 13.08 -
0.10 AC
M M
E
E/2
(2)
(4)
R/2
B
2 x R
S
D
See view B
2 x e
b4
3 x b
2 x b2
L
C
L1
123
Q
D
A
A2
A
A
A1
C
Ø k BD
M M
A
ØP (Datum B)
ØP1
D1
4
E1
0.01 BD
M M
View A - A
Thermal pad
D2
DDE E
CC
View B
(b1, b3, b5) Base metal
c1
(b, b2, b4)
Section C - C, D - D, E - E
(c)
Planting
4
3
5
7
4
4
4
Lead Assignments
1. Gate
2. Drain
3. Source
4. Drain
Package Information
www.vishay.com Vishay Siliconix
Revision: 19-Oct-2020 3Document Number: 91360
For technical questions, contact: hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
VERSION 3: FACILITY CODE = N
Notes
(1) Dimensioning and tolerancing per ASME Y14.5M-1994
(2) Contour of slot optional
(3) Dimension D and E do not include mold flash. Mold flash shall not exceed 0.127 mm (0.005") per side. These dimensions are measured at
the outermost extremes of the plastic body
(4) Thermal pad contour optional with dimensions D1 and E1
(5) Lead finish uncontrolled in L1
(6) Ø P to have a maximum draft angle of 1.5 to the top of the part with a maximum hole diameter of 3.91 mm (0.154")
MILLIMETERS MILLIMETERS
DIM. MIN. MAX. DIM. MIN. MAX.
A 4.65 5.31 D2 0.51 1.35
A1 2.21 2.59 E 15.29 15.87
A2 1.17 1.37 E1 13.46 -
b 0.99 1.40 e 5.46 BSC
b1 0.99 1.35 k 0.254
b2 1.65 2.39 L 14.20 16.10
b3 1.65 2.34 L1 3.71 4.29
b4 2.59 3.43 N 7.62 BSC
b5 2.59 3.38 P 3.56 3.66
c 0.38 0.89 P1 - 7.39
c1 0.38 0.84 Q 5.31 5.69
D 19.71 20.70 R 4.52 5.49
D1 13.08 - S 5.51 BSC
ECN: E20-0545-Rev. F, 19-Oct-2020
DWG: 5971
c1
c
b, b2, b4
Plating
Base metal
b1, b3, b5
0.01 M DB
E1
D1
P
A
P1
D2
K
A2
D
A
A1
C
b2
b
b4
e
L
C
L1
D
S
R
Q
N
R/2
E
B
M
MDBM
0.10 M CAM
Legal Disclaimer Notice
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Revision: 01-Jan-2021 1Document Number: 91000
Disclaimer
ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE
RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE.
Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively,
“Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained in any datasheet or in any other
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particular product with the properties described in the product specification is suitable for use in a particular application.
Parameters provided in datasheets and / or specifications may vary in different applications and performance may vary over
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including but not limited to the warranty expressed therein.
Except as expressly indicated in writing, Vishay products are not designed for use in medical, life-saving, or life-sustaining
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