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AAMMIISS--44116688xxFault Tolerant CAN Transceiver Data Sheet
7.0 Functional Description
7.1 Description
AMIS-41682 is a fault tolerant CAN transceiver which works as an
interface between the CAN protocol controller and the physical wires of
the CAN bus (see Figure 2). It is primarily intended for low speed
applications, up to 125kBaud, in passenger cars. The device provides
differential transmit capability to the CAN bus and differential receive
capability to the CAN controller.
The AMIS-41683 has open-drain outputs (RXD and ERR-B pins) that
allow the user to use external pull-up resistors to the required supply
voltage; this can be 5V or 3.3V.
To reduce EME, the rise and fall slope are limited. Together with
matched CANL and CANH output-stages, this allows the use of an
unshielded twisted pair or a parallel pair of wires for the bus lines. The
symmetry of the outputs is guaranteed through the parameters VCM-
peak and VCM-step.
The failure detection logic automatically selects a suitable transmission
mode, differential or single-wire transmission.
Together with the transmission mode, the failure detector will configure
the output stages in such a way that excessive current are avoided and
that the circuit returns to normal operation when the error is removed.
A high common-mode range for the differential and single ended
receiver guarantees reception under worst case conditions and together
with the integrated filter the circuit realizes a excellent immunity against
EMS. The receivers connected to pins CANH and CANL have threshold
voltages that ensure a maximum noise margin in single-wire mode.
A timer has been integrated at pin TXD. This timer prevents the
AMIS-41682 from driving the bus lines to a permanent dominant state.
7.2 Failure Detector
The failure detector is fully active in the normal operating mode. After
the detection of a single bus failure the detector switches to the
appropriate mode. The different wiring failures are depicted in Figure 4.
The figure also indicates the effect of the different wiring failures on the
transmitter and the receiver. The detection circuit itself is not depicted.
The differential receiver threshold voltage is typically set at 3V (VCC =
5V). This ensures correct reception with a noise margin as high as
possible in the normal operating mode and in the event of failures 1, 2,
4, and 6a. These failures, or recovery from them, do not destroy
ongoing transmissions. During the failure, reception is still done by the
differential receiver and the transmitter stays fully active.
To avoid false triggering by external RF influences the single-wire modes
are activated after a certain delay time. When the bus failure disappears
for an other time delay, the transceiver switches back to differential
mode.
When one of the bus failures 3, 5, 6, 6a, and 7 is detected, the
defective bus wire is disabled by switching off the affected bus
termination and the respective output stage. A wake-up from sleep
mode via the bus is possible either via a dominant CANH or CANL line.
This ensures that a wake-up is possible even if one of the failures 1 to
7 occurs. If any of the wiring failure occurs, the output signal on pin ERR
will become low. On error recovery, the output signal on pin ERR will
become high again.
During all single-wire transmissions, the EMC performance (both
immunity and emission) is worse than in the differential mode. The
integrated receiver filters suppress any HF noise induced into the bus
wires. The cut-off frequency of these filters is a compromise between
propagation delay and HF suppression. In the single-wire mode, LF noise
cannot be distinguished from the required signal.