February 1996
NDS9948
Dual P-Channel Enhancement Mode Field Effect Transistor
General Description Features
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Absolute Maximum Ratings TA = 25°C unless otherwise noted
Symbol Parameter NDS9948 Units
VDSS Drain-Source Voltage -60 V
VGSS Gate-Source Voltage ± 20 V
IDDrain Current - Continuous TA = 25°C (Note 1a) ± 2.3 A
- Pulsed TA = 25°C ± 10
- Continuous TA = 70°C (Note 1a) ± 1.8
PDPower Dissipation for Dual Operation 2W
Power Dissipation for Single Operation (Note 1a) 1.6
(Note 1b) 1
(Note 1c) 0.9
TJ,TSTG Operating and Storage Temperature Range -55 to 150 °C
THERMAL CHARACTERISTICS
RθJA Thermal Resistance, Junction-to-Ambient (Note 1a) 78 °C/W
RθJC Thermal Resistance, Junction-to-Case (Note 1) 40 °C/W
NDS9948.SAM
These P-Channel enhancement mode power field effect
transistors are produced using National's proprietary, high cell
density, DMOS technology. This very high density process has
been especially tailored to minimize on-state resistance, provide
superior switching performance, and withstand high energy
pulses in the avalanche and commutation modes. These
devices are particularly suited for low voltage applications such
as notebook computer power management and other battery
powered circuits where fast switching, low in-line power loss,
and resistance to transients are needed.
-2.3A, -60V. RDS(ON) = 0.25Ω @ VGS = -10V.
High density cell design for low RDS(ON).
High power and current handling capability in a widely
used surface mount package.
Dual MOSFET in surface mount package.
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