User's Guide SNVA391D - May 2009 - Revised May 2013 AN-1954 LM3409 Demonstration Board 1 Introduction This demonstration board showcases the LM3409 PFET controller for a buck current regulator. It is designed to drive 4 LEDs (VO = 15V) at a maximum average LED current (ILED = 1A) from a DC input voltage (VIN = 24V). The switching frequency (fSW = 525 kHz) is targeted for the nominal operating point, however fSW varies across the entire operating range. The circuit can accept an input voltage of 6V-42V. However, if the input voltage drops below the regulated LED string voltage, the converter goes into dropout and VO = VIN ideally. The PCB is made using 2 layers of 2 oz. copper with FR4 dielectric. The board showcases several features of the LM3409 including both analog dimming using a potentiometer (R5) tied to the IADJ pin and internal PWM dimming using the EN pin. There is a header (J1) with a removable jumper, which is used to select PWM dimming or low power shutdown. The board has a right angle connector (J2) which can mate with an external LED load board allowing for the LEDs to be mounted close to the driver. This reduces potential ringing when there is no output capacitor. Alternatively, the LED+ and LED- turrets can be used to connect the LED load. This board can be easily modified to demonstrate other operating points as shown in Section 8. The LM3409 / LM3409HV / LM3409Q / LM3409QHV / LM3409N PFET Buck Controller for High Power LED Drivers (SNVS602) data sheet's Design Procedure can be used to design for any set of specifications. 100 EFFICIENCY (%) 95 90 85 80 75 15 20 25 30 35 40 45 INPUT VOLTAGE (V) Figure 1. Efficiency with 4 Series LEDS AT 1A All trademarks are the property of their respective owners. SNVA391D - May 2009 - Revised May 2013 Submit Documentation Feedback AN-1954 LM3409 Demonstration Board Copyright (c) 2009-2013, Texas Instruments Incorporated 1 Schematic 2 www.ti.com Schematic R3 U1 R2 1 VIN UVLO 10 VADJ 2 VIN C4 VCC IADJ C1 C2 9 GND LED+ R5 C6 3 J1 R1 LM3409 EN CSP 8 J2 R4 4 COFF CSN C3 7 DAP 5 GND PGATE 6 1 14 2 13 3 12 5 10 6 9 7 8 Q1 L1 C5 D1 LEDFigure 2. Board Schematic 3 2 Pin Descriptions Pin(s) Name Description 1 UVLO Input under-voltage lockout Connect to a resistor divider from VIN and GND. Turn-on threshold is 1.24V and hysteresis for turn-off is provided by a 22A current source. 2 IADJ Analog LED current adjust Apply a voltage between 0 - 1.24V, connect a resistor to GND, or leave open to set the current sense threshold voltage. 3 EN Logic level enable 4 COFF Off-time programming 5 GND Ground 6 PGATE Gate drive 7 CSN Negative current sense Connect to the negative side of the sense resistor. 8 CSP Positive current sense Connect to the positive side of the sense resistor (VIN). 9 VCC VIN- referenced linear regulator output 10 VIN Input voltage DAP DAP Thermal pad on bottom of IC Application Information Apply a voltage >1.74V to enable device, a PWM signal to dim, or a voltage <0.5V for low power shutdown. Connect resistor to VO, and capacitor to GND to set the off-time. Connect to the system ground. Connect to the gate of the external PFET. Connect at least a 1F ceramic capacitor to VIN. The regulator provides power for the PFET drive. Connect to the input voltage. Connect to pin 5 (GND). Place 4-6 vias from DAP to bottom GND plane. AN-1954 LM3409 Demonstration Board Copyright (c) 2009-2013, Texas Instruments Incorporated SNVA391D - May 2009 - Revised May 2013 Submit Documentation Feedback Bill of Materials www.ti.com 4 Bill of Materials Table 1. Bill of Materials Qty Part ID Part Value Manufacturer Part Number 1 U1 Buck controller Texas Instruments LM3409 1 C1 4.7F X7R 20% 50V MURATA GRM55ER71H475MA01L 1 C2, C5 No Load 1 C3 470pF X7R 10% 50V TDK C1608X7R1H471K 1 C4 1.0F X7R 10% 16V TDK C1608X7R1C105K 1 C6 0.1F 50V 10% X7R MURATA C1608X7R1C104K 1 Q1 PMOS 70V 5.7A ZETEX ZXMP7A17KTC 1 D1 Schottky 60V 5A VISHAY CDBC560-G 1 L1 22 H 20% 3.5A TDK SLF12565T-220M3R5 1 R1 15.4k 1% VISHAY CRCW060315K4FKEA 1 R2 6.98k 1% VISHAY CRCW06036K98FKEA 1 R3 49.9k 1% VISHAY CRCW060349K9FKEA 1 R4 0.2 1% 1W VISHAY WSL2512R2000FEA 1 R5 250k potentiometer BOURNS 3352P-1-254 1 J1 MOLEX 22-28-4033 1 J2 SAMTEC TSSH-107-01-S-D-RA 2 VIN, GND KEYSTONE 575-8 3 VADJ, LED+, LED- KEYSTONE 1502-2 SNVA391D - May 2009 - Revised May 2013 Submit Documentation Feedback AN-1954 LM3409 Demonstration Board Copyright (c) 2009-2013, Texas Instruments Incorporated 3 PCB Layout 5 www.ti.com PCB Layout Figure 3. Top Layer Figure 4. Bottom Layer 4 AN-1954 LM3409 Demonstration Board Copyright (c) 2009-2013, Texas Instruments Incorporated SNVA391D - May 2009 - Revised May 2013 Submit Documentation Feedback Design Procedure www.ti.com 6 Design Procedure 6.1 Specifications VIN = 24V; VIN-MAX = 42V VO = 15V fSW = 525kHz ILED = 1A iLED-PP = iL-PP = 450mA vIN-PP = 720mV VTURN-ON = 10V; VHYS = 1.1V = 0.95 6.2 Nominal Switching Frequency Assume C3 = 470pF and = 0.95. Solve for R1: R1 = VO * - 1 (c) K x VIN 1.24V* (C3 + 20 pF) x fSW x ln 1 (c) VO 15V * - 1 (c) 0.95 x 24V R1 = = 15.4 k: 1.24V* 490 pF x 525 kHz x ln 1 (c) 15V (1) The closest 1% tolerance resistor is 15.4 k therefore the actual tOFF and target fSW are: 1.24V* tOFF = - (C3+20pF) x R1 x ln 1VO (c) 1.24V* = 651 ns t OFF = - 490 pF x 15.4 k: x ln 1(c) 15V (2) V * * 1 - O 1 - 15V (c)0.95 x 24V 525 kHz (c)K x VIN fSW = t = = 651 ns OFF (3) The chosen components from step 1 are: C3 = 470 pF R1 = 15.4 k: 6.3 (4) Inductor Ripple Current Solve for L1: L1 = VO x t OFF 15V x 651 ns = = 21.7 PH 'iL - PP 450 mA (5) The closest standard inductor value is 22 H therefore the actual iL-PP is: 'iL- PP = VO x t OFF 15V x 651 ns = = 444 mA L1 22 PH (6) The chosen component from step 2 is: L1 = 22 PH SNVA391D - May 2009 - Revised May 2013 Submit Documentation Feedback (7) AN-1954 LM3409 Demonstration Board Copyright (c) 2009-2013, Texas Instruments Incorporated 5 Design Procedure 6.4 www.ti.com Average LED Current Determine IL-MAX: IL- MAX = ILED + 'iL - PP 444 mA = 1A + = 1. 22 A 2 2 (8) Assume VADJ = 1.24V and solve for R4: R4 = VADJ 1.24V = = 0.203: 5 x IL- MAX 5 x 1.22A (9) The closest 1% tolerance resistor is 0.2 therefore the ILED is: VADJ 'i - L- PP 5 x R4 2 ILED = ILED = 1.24V 444 mA = 1.02 A 2 5 x 0.2 : (10) The chosen component from step 3 is: R4 = 0. 2 : 6.5 (11) Output Capacitance No output capacitance is necessary. 6.6 Input Capacitance Determine tON: t ON = 1 1 -t - 651 ns = 1.25 Ps = fSW OFF 525 kHz (12) Solve for CIN-MIN: CIN - MIN = ILED x t ON 1.02A x 1.25 Ps = = 1.77 PF 'vIN - PP 720 mV (13) Choose CIN: CIN = CIN - MIN x 2 = 3.54 PF (14) Determine IIN-RMS: IIN - RMS = ILED x fSW x t ON x t OFF IIN- RMS =1.02 A x 525 kHz x 1.25 Ps x 651 ns = 483 mA (15) The chosen components from step 5 are: C1 = 4.7 PF 6.7 (16) P-Channel MOSFET Determine minimum Q1 voltage rating and current rating: VT- MAX = VIN - MAX = 42V (17) V xI 15V x 1. 02 A IT = D x ILED = O LED = = 670 mA 24V x 0.95 VIN x K (18) A 70V, 5.7A PFET is chosen with RDS-ON = 190m and Qg = 20nC. Determine IT-RMS and PT: 6 AN-1954 LM3409 Demonstration Board Copyright (c) 2009-2013, Texas Instruments Incorporated SNVA391D - May 2009 - Revised May 2013 Submit Documentation Feedback Design Procedure www.ti.com 2* 1 'i L-PP* x IT- RMS = ILED x D x 1 + 12 (c) ILED (c) IT- RMS = 1.02A x 2 1 444 mA* * 15V x 1 + x 24V x 0.95 12 (c) 1.02A (c) IT- RMS = 830 mA (19) 2 PT = IT- RMS x R DSON = 830 mA2 x 190 m: = 132 mW (20) The chosen component from step 6 is: Q1o 5.7 A , 70V, DPAK 6.8 (21) Re-Circulating Diode Determine minimum D1 voltage rating and current rating: VD - MAX = VIN - MAX = 42V (22) VO * xI ID = (1- D) x ILED = 1V x K LED IN (c) 15V * ID = 1 x 1.02 A = 348 mA (c) 24V x 0.95 (23) A 60V, 5A diode is chosen with VD = 750mV. Determine PD: PD = ID x VD = 348 mA x 750 mV = 261 mW (24) The chosen component from step 7 is: D1 o 5 A, 60V, SMC 6.9 (25) Input Under-Voltage Lockout (UVLO) Solve for R3: R3 = VHYS 1.1V 50 k: = = 22 PA 22 PA (26) The closest 1% tolerance resistor is 49.9 k therefore VHYS is: VHYS = R3 x 22 PA = 49.9 k: x 22 PA = 1.1V (27) Solve for R2: R2 = 1.24V x 49.9 k: 1. 24V x R3 = = 7.06 k: VTURN - ON - 1.24V 10V - 1.24V (28) The closest 1% tolerance resistor is 6.98 k therefore VTURN-ON is: VTURN-ON = VTURN-ON = 1. 24V x (R2 + R3) R2 1. 24V x (6.98 k: + 49.9 k:) 6.98 k: = 10.1V (29) The chosen components from step 8 are: R2 = 6.98 k: R3 = 49.9 k: SNVA391D - May 2009 - Revised May 2013 Submit Documentation Feedback (30) AN-1954 LM3409 Demonstration Board Copyright (c) 2009-2013, Texas Instruments Incorporated 7 Design Procedure www.ti.com 6.10 IADJ Connection Method The IADJ pin controls the high-side current sense threshold as outlined in the data sheet. The LM3409 demonstration board allows for two methods to be evaluated using the IADJ pin. The desired method is chosen as follows: Method #1: Applying an external voltage to the VADJ terminal between 0 and 1.24V linearly scales the current sense threshold between 0 and 248mV nominally. Method #2:If no voltage is applied to the VADJ terminal, the internal 5A current source will bias the voltage across the external potentiometer (R5). The potentiometer can be used to adjust the current sense threshold also. It is sized knowing the maximum desired average LED current which is chosen as ILED = 1A: 'i * 444 mA* ILED + L-PP x R4 1.02A + x 200 m: 2 2 (c) R5 = (c) = 1 PA 1 PA R5 = 248 k: (31) The next highest standard potentiometer of 250k is used. A 0.1F capacitor (C6) is added from the IADJ pin to GND in order to eliminate unwanted high frequency noise coupling on the IADJ pin. The chosen components from step 9 are: R5 = 250 k : C6 = 0.1 PF (32) The Section 7Typical Waveforms shows a typical LED current waveform when analog dimming using the potentiometer. See the Alternate Designs section for two designs that are optimized to improve analog dimming range by reducing the switching frequency, increasing the inductance, and adding output capacitance. 8 AN-1954 LM3409 Demonstration Board Copyright (c) 2009-2013, Texas Instruments Incorporated SNVA391D - May 2009 - Revised May 2013 Submit Documentation Feedback Design Procedure www.ti.com 6.11 PWM Dimming / Shutdown Method The LM3409 demonstration board allows for PWM dimming and low power shutdown to be evaluated. The desired method is chosen as follows: 1: No PWM, EN = VIN 2: Shutdown, EN = GND 3: Internal PWM, using EN 1 1 2 3 3 2 J1 Method #1: If no PWM dimming is desired, a jumper should be placed in position 1 (shorts pins 1 and 2) on header J1. This shorts VIN and EN which ensures the controller is always enabled if an input voltage greater than 1.74V is applied. Method #2: Low power shutdown (typically 110A) can be evaluated by placing the jumper in position 2 (shorts pins 2 and 3) on header J1. This shorts EN and GND which ensures the controller is shutdown. Method #3: Internal PWM dimming using the EN pin can be evaluated by removing the jumper from header J1. An external PWM signal can then be applied to the EN terminal to provide PWM dimming. The R5 potentiometer should be rotated fully clockwise to use PWM dimming across the entire LED current range of the demonstration board. The Typical Waveforms section shows a typical LED current waveform during PWM dimming. 6.12 11. Bypass Capacitor The internal regulator requires at least 1F of ceramic capacitance with a voltage rating of 16V. The chosen component from step 11 is: C4 = 1.0 PF SNVA391D - May 2009 - Revised May 2013 Submit Documentation Feedback (33) AN-1954 LM3409 Demonstration Board Copyright (c) 2009-2013, Texas Instruments Incorporated 9 Typical Waveforms 7 www.ti.com Typical Waveforms TA = +25C, VIN = 24V and VO = 15V. 1.5 7 12 1.0 6 0.0 6 -0.5 1.5 5 1.2 4 ILED 3 0.9 -1.0 2 0.6 2 -1.5 1 0.3 0 -2.0 0 -2.5 -1 4 VEN -2 Figure 6. 20kHz 50% EN pin PWM dimming (rising edge) 0.3 70 60 0.2 60 ILED 0.1 30 ILED (A) 70 40 ILED 1.5 1.0 -2.8E-17 0.0 40 0.5 -0.1 30 VSW 20 -0.2 10 -0.3 0 -10 2.0 50 VSW (V) VSW (V) -0.3 1 Ps/DIV Figure 5. 20kHz 50% EN pin PWM dimming 50 0.0 2 Ps 10 Ps/DIV VSW 0.0 20 -0.5 10 -1.0 -0.4 0 -1.5 -0.5 -10 400 ns/DIV -2.0 1 Ps/DIV Figure 7. Analog dimming minimum (R5 fully counterclockwise) 10 ILED (A) 8 1.8 ILED (A) VEN (V) ILED 2.1 VEN VEN (V) 0.5 10 ILED (A) 14 Figure 8. Analog dimming with maximum (R5 fully clockwise) AN-1954 LM3409 Demonstration Board Copyright (c) 2009-2013, Texas Instruments Incorporated SNVA391D - May 2009 - Revised May 2013 Submit Documentation Feedback Alternate Designs www.ti.com 8 Alternate Designs Alternate designs with the LM3409 demonstration board are possible with very few changes to the existing hardware. The evaluation board FETs and diodes are already rated higher than necessary for design flexibility. The input UVLO can remain the same and the input capacitance is sufficient for most designs, though the input voltage ripple will change. Other designs can be evaluated by changing R1, R4, L1, and C5. The table below gives the main specifications for four different designs and the corresponding values for R1, R4, L1, and C5. The RMS current rating of L1 should be at least 50% higher than the specified ILED. Designs 2 and 4 are optimized for best analog dimming range, while designs 1 and 3 are optimized for best PWM dimming range. These are just examples, however any combination of specifications can be achieved by following the Design Procedure in the LM3409 / LM3409HV / LM3409Q / LM3409QHV / LM3409N PFET Buck Controller for High Power LED Drivers (SNVS602) data sheet. Specification / Component Design 1 Design 2 Design 3 Design 4 Dimming Method PWM Analog PWM Analog VIN 24V 12V 36V 42V VO 14V 7V 24V 35V 300 kHz fSW 500 kHz 250 kHz 450 kHz ILED 1A 3A 700 mA 2A iLED 450 mA 70 mA 250 mA 60 mA R1 15.4 k 15.4 k 25.5 k 24.9 k R4 0.2 0.08 0.3 0.12 L1 22 H 33 H 68 H 68 H C5 None 1 F None 1 F SNVA391D - May 2009 - Revised May 2013 Submit Documentation Feedback AN-1954 LM3409 Demonstration Board Copyright (c) 2009-2013, Texas Instruments Incorporated 11 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. 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