INPUT VOLTAGE (V)
EFFICIENCY (%)
100
95
90
85
80
75
15 20 25 30 35 40 45
User's Guide
SNVA391D–May 2009–Revised May 2013
AN-1954 LM3409 Demonstration Board
1 Introduction
This demonstration board showcases the LM3409 PFET controller for a buck current regulator. It is
designed to drive 4 LEDs (VO= 15V) at a maximum average LED current (ILED = 1A) from a DC input
voltage (VIN = 24V). The switching frequency (fSW = 525 kHz) is targeted for the nominal operating point,
however fSW varies across the entire operating range. The circuit can accept an input voltage of 6V-42V.
However, if the input voltage drops below the regulated LED string voltage, the converter goes into
dropout and VO= VIN ideally.
The PCB is made using 2 layers of 2 oz. copper with FR4 dielectric. The board showcases several
features of the LM3409 including both analog dimming using a potentiometer (R5) tied to the IADJ pin and
internal PWM dimming using the EN pin. There is a header (J1) with a removable jumper, which is used to
select PWM dimming or low power shutdown.
The board has a right angle connector (J2) which can mate with an external LED load board allowing for
the LEDs to be mounted close to the driver. This reduces potential ringing when there is no output
capacitor. Alternatively, the LED+ and LED- turrets can be used to connect the LED load.
This board can be easily modified to demonstrate other operating points as shown in Section 8. The
LM3409 / LM3409HV / LM3409Q / LM3409QHV / LM3409N PFET Buck Controller for High Power LED
Drivers (SNVS602) data sheet's Design Procedure can be used to design for any set of specifications.
Figure 1. Efficiency with 4 Series LEDS AT 1A
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1
SNVA391D–May 2009–Revised May 2013 AN-1954 LM3409 Demonstration Board
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IADJ
EN
CSN
LM3409
UVLO
C1 VIN
VCC
COFF
GND
CSP
C4
R1
PGATE
C3
R3
R2
DAP
VIN
R4
1
2
3
4
5 6
7
8
9
10
R5
C5
GND
U1
C2
LED+
LED-
1
2
3
5
6
7
14
13
12
10
9
8
J2
D1
L1
Q1
J1
VADJ
C6
Schematic
www.ti.com
2 Schematic
Figure 2. Board Schematic
3 Pin Descriptions
Pin(s) Name Description Application Information
1 UVLO Input under-voltage lockout Connect to a resistor divider from VIN and GND. Turn-on threshold is
1.24V and hysteresis for turn-off is provided by a 22µA current source.
2 IADJ Analog LED current adjust Apply a voltage between 0 - 1.24V, connect a resistor to GND, or leave
open to set the current sense threshold voltage.
3 EN Logic level enable Apply a voltage >1.74V to enable device, a PWM signal to dim, or a
voltage <0.5V for low power shutdown.
4 COFF Off-time programming Connect resistor to VO, and capacitor to GND to set the off-time.
5 GND Ground Connect to the system ground.
6 PGATE Gate drive Connect to the gate of the external PFET.
7 CSN Negative current sense Connect to the negative side of the sense resistor.
8 CSP Positive current sense Connect to the positive side of the sense resistor (VIN).
9 VCC VIN- referenced linear regulator Connect at least a 1µF ceramic capacitor to VIN. The regulator provides
output power for the PFET drive.
10 VIN Input voltage Connect to the input voltage.
DAP DAP Thermal pad on bottom of IC Connect to pin 5 (GND). Place 4-6 vias from DAP to bottom GND plane.
2AN-1954 LM3409 Demonstration Board SNVA391D–May 2009–Revised May 2013
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Bill of Materials
4 Bill of Materials
Table 1. Bill of Materials
Qty Part ID Part Value Manufacturer Part Number
1 U1 Buck controller Texas Instruments LM3409
1 C1 4.7µF X7R 20% 50V MURATA GRM55ER71H475MA01L
1 C2, C5 No Load
1 C3 470pF X7R 10% 50V TDK C1608X7R1H471K
1 C4 1.0µF X7R 10% 16V TDK C1608X7R1C105K
1 C6 0.1µF 50V 10% X7R MURATA C1608X7R1C104K
1 Q1 PMOS 70V 5.7A ZETEX ZXMP7A17KTC
1 D1 Schottky 60V 5A VISHAY CDBC560-G
1 L1 22 µH 20% 3.5A TDK SLF12565T-220M3R5
1 R1 15.4kΩ1% VISHAY CRCW060315K4FKEA
1 R2 6.98kΩ1% VISHAY CRCW06036K98FKEA
1 R3 49.9kΩ1% VISHAY CRCW060349K9FKEA
1 R4 0.2Ω1% 1W VISHAY WSL2512R2000FEA
1 R5 250kΩpotentiometer BOURNS 3352P-1-254
1 J1 MOLEX 22-28-4033
1 J2 SAMTEC TSSH-107-01-S-D-RA
2 VIN, GND KEYSTONE 575-8
3 VADJ, LED+, LED- KEYSTONE 1502-2
3
SNVA391D–May 2009–Revised May 2013 AN-1954 LM3409 Demonstration Board
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H22L1 P
=
= = H22P444
=
651nsV15 x
L1
tV OFFO x
iPPL
'-mA
=H7.21 P
=
L1=iPPL
'-
tV OFFO xns651V15 x mA450
=pF470C3
:
=k4.15R1
tOFF
fSW = = ns651 =kHz525
1-¸
¹
·
¨
©
§V2495.0 xV15
¸
¸
¹
·
¨
¨
©
§VO
VIN
xK
1-
1lnk4.15pF490tOFF -x:x
-
=¨
¨
©
§ns651
=
¸
¸
¹
·
V24.1 V15
(C3+20pF)tOFF -
=x R1 x 1
1ln - ¸
¸
¹
·
¨
¨
©
§
VO
V24.
=
R1 -- 1¸
¸
¹
·
¨
¨
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§VO
xKVIN
=
R1 :
=k4.15
x lnpF490 xkHz525 ¨
©
§-
1V15 ¸
¹
·
V24.1
-- 1
¨
©
§¸
¹
·
V15
x V2495.0
-
xx 1lnf(C3 + 20 pF) SW ¸
¸
¹
·
¨
¨
©
§VO
V24.1
www.ti.com
Design Procedure
6 Design Procedure
6.1 Specifications
VIN = 24V; VIN-MAX = 42V
VO= 15V
fSW = 525kHz
ILED = 1A
ΔiLED-PP =ΔiL-PP = 450mA
ΔvIN-PP = 720mV
VTURN-ON = 10V; VHYS = 1.1V
η= 0.95
6.2 Nominal Switching Frequency
Assume C3 = 470pF and η= 0.95. Solve for R1:
(1)
The closest 1% tolerance resistor is 15.4 kΩtherefore the actual tOFF and target fSW are:
(2)
(3)
The chosen components from step 1 are:
(4)
6.3 Inductor Ripple Current
Solve for L1:
(5)
The closest standard inductor value is 22 µH therefore the actual ΔiL-PP is:
(6)
The chosen component from step 2 is:
(7)
5
SNVA391D–May 2009–Revised May 2013 AN-1954 LM3409 Demonstration Board
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=mA670
=
A02.1V15 x 95.0V24 x
IDI LEDT =
x
=VIN Kx
IV LEDO x
V42VV MAXINMAXT == --
F7.4C1 P
=
IRMSIN- kHz525A02.1 xx
=mA483
=
ns651s25.1 xP
tt OFFON xfII SWLEDRMSIN xx
=
-
2C MININ =
x
=-F54.3 PCIN
CMININ =
-= = F77.1 P
mV720
A02.1 x s25.1 P
vPPIN
'-
tI ONLED x
1
tON =1
tOFF =
- - ns651 =s25.1 P
kHz525
fSW
=
R4 :2.0
ILED =2
444
-A02.1
=
2.05 :xV24.1
ILED =R45x -2
iPPL
'-
VADJ
mA
=
R4 VADJ
x-
I5 MAXL = = :203.0
V24.1
x5 A22.1
II LEDMAXL +
=
-2
A1 +
=A22.1
=
2
iPPL
'-444mA
Design Procedure
www.ti.com
6.4 Average LED Current
DetermineIL-MAX:
(8)
Assume VADJ = 1.24V and solve for R4:
(9)
The closest 1% tolerance resistor is 0.2 Ωtherefore the ILED is:
(10)
The chosen component from step 3 is:
(11)
6.5 Output Capacitance
No output capacitance is necessary.
6.6 Input Capacitance
Determine tON:
(12)
Solve for CIN-MIN:
(13)
Choose CIN:
(14)
DetermineIIN-RMS:
(15)
The chosen components from step 5 are:
(16)
6.7 P-Channel MOSFET
Determine minimum Q1 voltage rating and current rating:
(17)
(18)
A 70V, 5.7A PFET is chosen with RDS-ON = 190mΩand Qg= 20nC. Determine IT-RMS and PT:
6AN-1954 LM3409 Demonstration Board SNVA391D–May 2009–Revised May 2013
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:
=
:
=k9.49R3 k98.6R2
=V1.10
k98.6 :
( )k9.49k98.6V24.1 :+:x
VONTURN =
-
VONTURN =
-V24.1 ( )R3R2+xR2
=:
=k06.7
:
xk9.49V24.1 - V24.1V10
=
R2 xR3V24.1 -
-V24.1V ONTURN
1k9.49A22R3VHYS x:
=
Px
=V1.A22 =
P
== V
R3 HYS =:k50
PA22PA22 V1.1
SMC,V60,A5D1o
mA348VDx=x mV750 = mW261IP DD =
( ) 1ID1I LEDD -
=
x-
=¨
¨
©
§ILED
x
¸
¸
¹
·
VIN Kx
VO
mA348A02.1 =
x
¸
¸
¹
·
V15
1ID-
=¨
¨
©
§95.0V24 x
VV MAXINMAXD == -- V42
Q1o5.7 DPAK,V70,A
mW132m190mARIP 2
DSON
2
RMSTT =:
x
=
x
=-830
11.02A x
+
xx
=¨
¨
©
§
V15 12
1
95.0V24 x
IRMST-
2
¸
¸
¹
·
¸
¸
¹
·
¨
¨
©
§444 mA
1.02A
830 mA
=
IRMST-
ILED x
=1D 2
x
+
x¸
¸
¸
¹
·
¸
¸
¹
·
¨
¨
©
§
¨
¨
¨
©
§
12
1iL-PP
'
ILED
IRMST-
www.ti.com
Design Procedure
(19)
(20)
The chosen component from step 6 is:
(21)
6.8 Re-Circulating Diode
Determine minimum D1 voltage rating and current rating:
(22)
(23)
A 60V, 5A diode is chosen with VD= 750mV. Determine PD:
(24)
The chosen component from step 7 is:
(25)
6.9 Input Under-Voltage Lockout (UVLO)
Solve for R3:
(26)
The closest 1% tolerance resistor is 49.9 kΩtherefore VHYS is:
(27)
Solve for R2:
(28)
The closest 1% tolerance resistor is 6.98 kΩtherefore VTURN-ON is:
(29)
The chosen components from step 8 are:
(30)
7
SNVA391D–May 2009–Revised May 2013 AN-1954 LM3409 Demonstration Board
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:
=k250R5
P
=F
0.1C6
R5 =A1P
=
ILED
¨
¨
©
§+2
L-PP
'i4Rx
¸
¸
¹
·
A1 P
2
444 mA
¨
©
§+200 m:
x
¸
¹
·
A02.1
248 k:
=
R5
Design Procedure
www.ti.com
6.10 IADJ Connection Method
The IADJ pin controls the high-side current sense threshold as outlined in the data sheet. The LM3409
demonstration board allows for two methods to be evaluated using the IADJ pin. The desired method is
chosen as follows:
Method #1: Applying an external voltage to the VADJ terminal between 0 and 1.24V linearly scales the
current sense threshold between 0 and 248mV nominally.
Method #2:If no voltage is applied to the VADJ terminal, the internal 5µA current source will bias the
voltage across the external potentiometer (R5). The potentiometer can be used to adjust the current sense
threshold also. It is sized knowing the maximum desired average LED current which is chosen as ILED =
1A:
(31)
The next highest standard potentiometer of 250kΩis used. A 0.1µF capacitor (C6) is added from the IADJ
pin to GND in order to eliminate unwanted high frequency noise coupling on the IADJ pin.
The chosen components from step 9 are:
(32)
The Section 7Typical Waveforms shows a typical LED current waveform when analog dimming using the
potentiometer. See the Alternate Designs section for two designs that are optimized to improve analog
dimming range by reducing the switching frequency, increasing the inductance, and adding output
capacitance.
8AN-1954 LM3409 Demonstration Board SNVA391D–May 2009–Revised May 2013
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P
=F0.1C4
1
2
3
12
1: No PWM, EN = VIN
2: Shutdown, EN = GND
3: Internal PWM, using EN 3
J1
www.ti.com
Design Procedure
6.11 PWM Dimming / Shutdown Method
The LM3409 demonstration board allows for PWM dimming and low power shutdown to be evaluated. The
desired method is chosen as follows:
Method #1: If no PWM dimming is desired, a jumper should be placed in position 1 (shorts pins 1 and 2)
on header J1. This shorts VIN and EN which ensures the controller is always enabled if an input voltage
greater than 1.74V is applied.
Method #2: Low power shutdown (typically 110µA) can be evaluated by placing the jumper in position 2
(shorts pins 2 and 3) on header J1. This shorts EN and GND which ensures the controller is shutdown.
Method #3: Internal PWM dimming using the EN pin can be evaluated by removing the jumper from
header J1. An external PWM signal can then be applied to the EN terminal to provide PWM dimming. The
R5 potentiometer should be rotated fully clockwise to use PWM dimming across the entire LED current
range of the demonstration board. The Typical Waveforms section shows a typical LED current waveform
during PWM dimming.
6.12 11. Bypass Capacitor
The internal regulator requires at least 1µF of ceramic capacitance with a voltage rating of 16V.
The chosen component from step 11 is:
(33)
9
SNVA391D–May 2009–Revised May 2013 AN-1954 LM3409 Demonstration Board
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ILED (A)
VSW (V)
70
60
50
40
30
20
10
0
-10
2.0
1.5
1.0
0.5
0.0
-0.5
-1.0
-1.5
-2.0
ILED
1 Ps/DIV
VSW
ILED (A)
VSW (V)
70
60
50
40
30
20
10
0
-10
0.3
0.2
0.1
-2.8E-17
-0.1
-0.2
-0.3
-0.4
-0.5
ILED
400 ns/DIV
0.0
VSW
ILED (A)
VEN (V)
14
12
10
8
6
4
2
0
-2
1.5
1.0
0.5
0.0
-0.5
-1.0
-1.5
-2.0
-2.5
ILED
10 Ps/DIV
VEN
ILED (A)
VEN (V)
7
6
5
4
3
2
1
0
-1
2.1
1.8
1.5
1.2
0.9
0.6
0.3
0.0
-0.3
ILED
1 Ps/DIV
2 Ps
VEN
Typical Waveforms
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7 Typical Waveforms
TA= +25°C, VIN = 24V and VO= 15V.
Figure 5. 20kHz 50% EN pin PWM dimming Figure 6. 20kHz 50% EN pin PWM dimming (rising
edge)
Figure 7. Analog dimming minimum (R5 fully Figure 8. Analog dimming with maximum (R5 fully
counterclockwise) clockwise)
10 AN-1954 LM3409 Demonstration Board SNVA391D–May 2009–Revised May 2013
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Alternate Designs
8 Alternate Designs
Alternate designs with the LM3409 demonstration board are possible with very few changes to the existing
hardware. The evaluation board FETs and diodes are already rated higher than necessary for design
flexibility. The input UVLO can remain the same and the input capacitance is sufficient for most designs,
though the input voltage ripple will change. Other designs can be evaluated by changing R1, R4, L1, and
C5.
The table below gives the main specifications for four different designs and the corresponding values for
R1, R4, L1, and C5. The RMS current rating of L1 should be at least 50% higher than the specified ILED.
Designs 2 and 4 are optimized for best analog dimming range, while designs 1 and 3 are optimized for
best PWM dimming range. These are just examples, however any combination of specifications can be
achieved by following the Design Procedure in the LM3409 / LM3409HV / LM3409Q / LM3409QHV /
LM3409N PFET Buck Controller for High Power LED Drivers (SNVS602) data sheet.
Specification / Design 1 Design 2 Design 3 Design 4
Component
Dimming Method PWM Analog PWM Analog
VIN 24V 12V 36V 42V
VO14V 7V 24V 35V
fSW 500 kHz 250 kHz 450 kHz 300 kHz
ILED 1A 3A 700 mA 2A
ΔiLED 450 mA 70 mA 250 mA 60 mA
R1 15.4 kΩ15.4 kΩ25.5 kΩ24.9 kΩ
R4 0.2Ω0.08Ω0.3Ω0.12Ω
L1 22 µH 33 µH 68 µH 68 µH
C5 None 1 µF None 1 µF
11
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