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Document Number: 71939
S09-1501-Rev. B, 10-Aug-09
Vishay Siliconix
SUP28N15-52
Notes:
a. Guaranteed by design, not subject to production testing.
b. Pulse test; pulse width ≤ 300 µs, duty cycle ≤ 2 %.
c. Independent of operating temperature.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect device reliability.
SPECIFICATIONS TJ = 25 °C, unless otherwise noted
Parameter Symbol Test Conditions Min. Typ.a Max. Unit
Static
Drain-Source Breakdown Voltage VDS VGS = 0 V, ID = 250 µA 150 V
Gate Threshold Voltage VGS(th) VDS = VGS, ID = 250 µA 24.5
Gate-Body Leakage IGSS VDS = 0 V, VGS = ± 20 V ± 100 nA
Zero Gate Voltage Drain Current IDSS
VDS = 120 V, VGS = 0 V 1
µA
VDS = 120 V, VGS = 0 V, TJ = 125 °C 50
VDS = 120 V, VGS = 0 V, TJ = 175 °C 250
On-State Drain CurrentbID(on) V
DS = 5 V, VGS = 10 V 50 A
Drain-Source On-State ResistancebRDS(on)
VGS = 10 V, ID = 5 A 0.042 0.052
Ω
VGS = 10 V, ID = 5 A, TJ = 125 °C 0.109
VGS = 10 V, ID = 5 A, TJ = 175 °C 0.145
VGS = 6 V, ID = 5 A 0.047 0.060
Forward Transconductancebgfs VDS = 15 V, ID = 25 A 40 S
Dynamica
Input Capacitance Ciss
VGS = 0 V, VDS = 25 V, f = 1 MHz
1725
pFOutput Capacitance Coss 216
Reverse Transfer Capacitance Crss 100
Total Gate ChargecQg
VDS = 75 V, VGS = 10 V, ID = 28 A
33 40
nC
Gate-Source ChargecQgs 9
Gate-Drain ChargecQgd 12
Tur n - O n D e l ay Timectd(on)
VDD = 50 V, RL = 3 Ω
ID ≅ 28 A, VGEN = 10 V, Rg = 2.5 Ω
15 25
ns
Rise Timectr70 100
Turn-Off Delay Timectd(off) 25 40
Fall Timectf60 90
Source-Drain Diode Ratings and Characteristics TC = 25 °C
Pulsed Current ISM 50 A
Diode Forward VoltagebVSD IF = 25 A, VGS = 0 V 0.9 1.5 V
Source-Drain Reverse Recovery Time trr IF = 28 A, dI/dt = 100 A/µs 95 140 ns